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182 Commits

Author SHA1 Message Date
Willem Melching 59bd58c940 Remove unused path offset learner 2020-02-06 13:48:56 -08:00
Willem Melching 105b95ffd7 Cancel lane change on blinker off 2020-02-06 13:48:20 -08:00
Willem Melching fdabd57e7e Add extra engine FW for Corolla LE 2020-02-06 11:22:38 -08:00
Willem Melching 719e0572e1 Fix fw_versions.py --scan 2020-02-06 10:58:18 -08:00
Adeeb 0ad5715255 use services.h in loggerd (#1056)
* loggerd: use services.h

* don't need yaml-cpp anymore

* forgot that
2020-02-06 10:56:01 -08:00
Adeeb 30dffb486a test car models: fix random hanging (#1055)
* debug print

* unlogger doesn't need fcamera.hevc

* only need the rlog

* tiemout for log downloading

* try again after timeout
2020-02-06 10:53:59 -08:00
Harald Schafer 0728e57578 bump fix 2020-02-05 13:55:21 -08:00
Harald Schafer c2d5deeccc bump laika 2020-02-05 13:41:21 -08:00
robbederks d0c1f9a864 Added hw status to ublox test scripts and ubloxGnss packet (#1054)
* Added hw status to ublox test scripts and ubloxGnss packet

* Added extra config to boardd

* Implemented new ublox message handler in ubloxd

* Fixed debug text

* Added some explanation and cereal bump
2020-02-05 11:12:03 -08:00
Harald Schafer 920572442b remove lambda 2020-02-04 19:55:17 -08:00
George Hotz c50c718293 Cleanup simulator and add usage instructions (#1050)
* cleanup simulator files

* minor updates

* update readme

* keras runner builds

* hmm, still doesn't work

* keras runner works

* should work with python3 keras mod

* touchups
2020-02-04 19:46:57 -08:00
Harald Schafer 6b1506740e comments 2020-02-04 16:48:45 -08:00
Harald Schafer f50e016c12 better comments 2020-02-04 14:07:35 -08:00
Harald Schafer bc725b98c9 reverse geocoder 2020-02-04 13:44:39 -08:00
George Hotz 9c5e035838 add zmq to rpath on x64 2020-02-03 18:14:45 -08:00
Harald Schafer 6d5cde3412 add tf model 2020-02-03 18:10:26 -08:00
Willem Melching 07264699b7 bump opendbc: add Lexus NX300H 2020-02-03 16:42:54 -08:00
Willem Melching 37a73d5c94 specify commaai in submodules url (#1049) 2020-02-03 16:33:49 -08:00
Andy Haden 79c149f42d Update APKs 2020-02-03 16:14:03 -08:00
Andy Haden 47f4396d7d Replace 'EON' in offroad alerts 2020-02-03 16:09:08 -08:00
Andy Haden e8959e6b1a get_network_type: Sort, correct cell network lookup and fix for pc 2020-02-03 15:52:06 -08:00
Willem Melching c770f54103 Fix dirty files reporting 2020-02-03 15:12:59 -08:00
Willem Melching a98000849e Removed old signed firmware during release build 2020-02-03 15:01:36 -08:00
Willem Melching e32e754a74 Cleanup files_common for phone release 2020-02-03 14:41:43 -08:00
Willem Melching 118198605f Use full name for docker caching 2020-02-03 14:12:35 -08:00
Willem Melching 0fb9971728 Only add the file list to the release 2020-02-03 14:11:23 -08:00
Willem Melching 2fe75cb7d0 Noqa on release build script 2020-02-03 13:37:57 -08:00
George Hotz 6797910ab0 fix releases.md typo 2020-02-03 13:35:31 -08:00
Willem Melching 5ea95c3d87 Use dockerhub 2020-02-03 13:33:21 -08:00
Harald Schafer fe250d6a9e make it converge within 1min 2020-02-03 13:24:33 -08:00
Willem Melching 58f4f5aac4 use base docker container when building 2020-02-03 13:10:38 -08:00
Willem Melching 0e1fc45bc3 Update release files 2020-02-03 12:52:20 -08:00
Willem Melching 64feca5692 Fix bias state number in paramsd too 2020-02-03 12:47:04 -08:00
Harald Schafer 1db7b43870 fix 2020-02-03 12:45:12 -08:00
Andy Haden 9b1f2d5c64 manager: verify daemon process cmdline 2020-02-03 12:27:13 -08:00
Willem Melching a53577ed35 Remove unused states from locationd yawrate kalman filer 2020-02-03 12:23:41 -08:00
Willem Melching 77cb0b1464 Add pipfile to release files so CI can run 2020-02-03 12:16:38 -08:00
Willem Melching f609507afd Update release notes 2020-02-03 12:16:06 -08:00
Willem Melching 98f5d30455 Handle get_network_type exception 2020-02-03 11:29:05 -08:00
HaraldSchafer f610e596c4 Multipath supercombo (#1036)
* exclude stuff outside of validity window

* 94dd2da7-23ae-4628-9d12-37f58b379110/10

* fbe443fd-1d65-4b4d-8e3a-3817b58bacd0/50

* sanity clip
2020-02-03 11:25:22 -08:00
Willem Melching 7c94b36171 Add some more firmware fingerprints 2020-02-03 11:24:25 -08:00
illumiN8i 39c9c85562 2020 Lexus RX 350 (#1046)
* Lexus RX 2020

* Update test_car_models.py
2020-02-03 10:12:13 -08:00
illumiN8i 831cb68a64 Added Central Europe Prime (#1047)
Co-authored-by: ErichMoraga <33645296+ErichMoraga@users.noreply.github.com>
2020-02-03 09:18:04 -08:00
Drew Hintz 5aff2b6885 support for Chrysler Pacifica 2020 Hybrid (#1021)
* support for Chrysler Pacifica 2020 Hybrid
Thanks to Benson in Discord.
Example segment: 8190c7275a24557b|2020-01-29--08-33-58--7

* Add relevant route to selfdrive/test/test_car_models.py

* fix segment test name
2020-02-03 09:17:45 -08:00
George Hotz 811b3b7a9a Fix ui on mac (#1044)
* remove line_shader dead code

* fix glfwCreateWindow

* don't assert on ipc socket failure

* window now appears on mac
2020-02-02 22:19:26 -08:00
George Hotz c42e2ecc50 manager runs on Mac, and other openpilot for PC fixes (#1037)
* use the openpilot/persist directory on PC

* manager runs on mac

* sim runs w/o carla

* fix params location in test

* that rmtree can fail and it's okay

* refactor params clear functionality

* set PARAMS_PATH
2020-02-02 12:15:02 -08:00
cfranhonda 0470b25071 FP 2019 Civic Hatchback EX (#1040)
* add 2019 Civic Hatchback EX

@dvburke4 For support with Black Panda comma power. Fp taken from [1]

* missing ] oops
2020-02-02 11:23:27 -08:00
George Hotz f72f78f2b9 Support scons build on Mac (#1034)
* fix clock and add Darwin sconstruct

* it builds, this changes should be simplifications too

* fix boardd build

* that's the real type of EGLClientBuffer

* remove extra lines

* ui needs opencl on phone
2020-02-01 23:36:50 -08:00
Willem Melching df6fa7acbd move fw query debug script 2020-02-01 18:53:43 -08:00
Adeeb d4c3c7f6f8 test_car_models: fail if a model has no routes (#1029) 2020-02-01 18:41:25 -08:00
illumiN8i a7efc8a897 2020 Toyota Prius Prime LE (#1032) 2020-02-01 18:41:00 -08:00
Willem Melching 822b32656b Add fingerprint test to ci 2020-02-01 18:40:04 -08:00
Willem Melching bfa2d030d2 Add batch of firmware versions 2020-02-01 13:06:05 -08:00
robbederks 3f92bc2061 Bumped panda (#1027) 2020-02-01 12:16:50 -08:00
Andrew Valish 770903520d Add network_type to thermald (#1030)
* add network_type to thermal log

* move get_network_type to android library
2020-02-01 12:11:10 -08:00
Arne Schwarck 75fdebb1ee Add German RAV4H_TSS2 Lounge FP (#1031)
2f210c724fd9f73b|2020-01-31--14-12-53--0
2020-02-01 10:45:41 -08:00
illumiN8i c9d49b8e4a Sort cars (#1026) 2020-01-31 08:30:32 -08:00
ZwX1616 6322a275d6 dmonitoringd (#1016) 2020-01-30 19:12:44 -08:00
Willem Melching b7aeb5d64d Cache FW query (#1025)
* split fw query and matching

* Read cached firmware versions

* add tests

* this works
2020-01-30 17:57:20 -08:00
Comma Device 58262bac9d use proper timeout on frontFrame to turn off IR leds 2020-01-30 15:52:27 -08:00
Willem Melching a75891f099 remove old README 2020-01-30 14:55:38 -08:00
Willem Melching a053244a5a log fingerprint source 2020-01-30 14:39:26 -08:00
Willem Melching 356f353489 FW fingerprint for Honda & Toyota (#961)
* add script to process logs

* Skip rav4 ESP

* Improve gathering script

* Update firmware versions for honda and toyota

* more firmware versions

* If FW query returns 1 candidate, use it

* Add FW versions

* Fix COROLLA_TSS2 two enigine addresses

* uncomment rav4h tss2

* add progress bar to test script

* Batch with more ecu versions
2020-01-30 14:32:26 -08:00
Willem Melching c9501cc164 Also show top 10 procs by RAM usage 2020-01-30 14:17:09 -08:00
Willem Melching 4dac1128f1 Only ignition_last is global 2020-01-30 13:53:19 -08:00
Willem Melching 3a65206c8d Disable IR leds when no ignition detected 2020-01-30 13:42:40 -08:00
Willem Melching 4d5957432e Add dockerfile to release files 2020-01-30 13:36:15 -08:00
illumiN8i 3ebb0bc46f Lexus RX 2016-2017 (#1001)
fix dbc name

Add Lexus RX to test_car_models.py

correct route in Lexus RX test

Update test_car_models.py
2020-01-30 13:32:30 -08:00
Willem Melching a2fe62ce77 Fix source brnach in master-ci push 2020-01-30 13:31:14 -08:00
Willem Melching a97ebc28b5 Fix ci routes sync script target path 2020-01-30 13:21:14 -08:00
Willem Melching ada141e5e3 Fix target branch on master release build 2020-01-30 13:21:04 -08:00
Willem Melching 0319861700 Jenkins pipeline to create master-ci (#1019)
* Added Jenkinsfile

* Added Jenkinsfile

* Added Jenkinsfile

* change order

* sudo

* whoami?

* Added Jenkinsfile

* install git

* Untested build scripts

* Add lockable resource

* Fix syntax

* Only one stage

* fix target dir

* Use deploy key

* noqa on test_openpilot

* Fix version.h path

* Cleanup release files

* Add linter scripts to release

* Update jenkinsfile

* Fix path

* this should work

* Use python3 docker container

* Run in correct directory

* Setup /data/pythonpath

Co-authored-by: commaci-public <60409688+commaci-public@users.noreply.github.com>
2020-01-30 13:06:45 -08:00
Drew Hintz f81a43381f add submodule commands for master (#1024) 2020-01-30 10:45:36 -08:00
Adeeb 44e97ead7b process replay: fix output after timeout added (#1020)
* process replay: fix output after timeout added

* better error
2020-01-29 09:44:14 -08:00
Comma Device 8507e683ae remove empty line in launch script 2020-01-28 17:12:51 -08:00
Comma Device 05cbd3d58c test commit from phone 2020-01-28 17:10:38 -08:00
Willem Melching 1de0b9c233 Fix version.py in case of no branch 2020-01-28 16:18:26 -08:00
Willem Melching b552a627e1 cleanup version.py 2020-01-28 15:55:24 -08:00
illumiN8i 277b187a29 Longer fingerprint for 2019 Camry XSE (#1002)
Adds additonal values to 2019 Camry XSE fingerprint to support discord user phantomarrowwolf's car
2020-01-28 10:55:18 -08:00
Andy Haden 6762447ae7 logging: imports for stack info 2020-01-28 08:35:25 -08:00
Andy Haden 41e4ad5d1d logging: Vendor findCaller for correct stack frame info in logs 2020-01-27 21:10:47 -08:00
Andy Haden e400aa0205 Remove unused logging_es 2020-01-27 19:59:52 -08:00
Willem Melching 393c4987c8 Fix junk data in initParams 2020-01-27 17:08:57 -08:00
Willem Melching 47492e77eb Subaru continuous blinker signals for assisted lane change (#1000) 2020-01-27 16:39:41 -08:00
Willem Melching fe9ccb27b1 Remember lane change direction when blinker turns off 2020-01-27 16:19:22 -08:00
Willem Melching 25f799bb8e Fix linter 2020-01-27 13:50:59 -08:00
Willem Melching 413a432b13 Speed up longitudinal tests and add retry 2020-01-27 12:35:43 -08:00
Willem Melching 2571453a54 Add script to nicely print logMessages 2020-01-27 11:47:41 -08:00
illumiN8i 0c06f15ea9 Fingerprint 2018 Highlander Limited Platinum (#1008)
from discord user Ryan R
2020-01-27 11:40:59 -08:00
Nelson Chen d658767236 Add Corolla Hatchback 2020 to README (#1006)
The Comma Two worked "out of the box" (*after OP install*, but you all know what I mean) for my Corolla Hatchback 2020 SE w/ BSM.
2020-01-25 18:46:35 -08:00
Adeeb 361be2630f process replay: add timeout to prevent hanging when tested process crashes (#1007) 2020-01-25 18:45:51 -08:00
illumiN8i 9a05283566 Restore Lexus ES 2019 to README.md (#1009)
non-hybrid
2020-01-25 18:45:23 -08:00
Harald Schafer a06bb77f6b use alpha 2 codes 2020-01-24 13:24:13 -08:00
Arne Schwarck 3c6ba22931 Add Country South Africa to list of RHD countries (#999) 2020-01-24 13:20:11 -08:00
robbederks 339e6986cf Bump panda (#997) 2020-01-23 18:51:11 -08:00
Willem Melching 0c1d70ac92 Changing alert text changed the test ref 2020-01-23 17:13:09 -08:00
illumiN8i 21af1bad2b RAV4 Hybrid TSS2 Support (#962)
* merge wocsor RAV4_HYBRID_TSS2 branch

From wocsor's PR #740

cleanup fingerprint

2020 rav4 hybrid confirmed working

* 2019 RAV4 Hybrid Limited

Adds additional messages for Limited trim. XSE and XLE still contained within this longer Limited fingerprint.

* Support Swiss 2019 RAV4 Hybrid XLE

Adds 913:8 value from discord user RDuke

* Separated RAV4 ICE and Hybrid

* Add route to test_car_models.py

* Revert "Toyota Corolla Hatchback Hybrid 2019 Excite (Israel)"

This reverts commit f1d6f68625.
2020-01-23 16:48:01 -08:00
Willem Melching b9b90267c5 Limit comma two fan speed to 30% when car is not running 2020-01-23 16:41:29 -08:00
Willem Melching ba4bf07db2 EON -> Device 2020-01-23 16:38:10 -08:00
Willem Melching 09a1691caf add default EON private key 2020-01-23 14:42:06 -08:00
Willem Melching 09283f4d6a Fix CI sync script 2020-01-23 13:06:05 -08:00
Willem Melching e2c784740a CI: remove header hacks when checking out submodules (#995) 2020-01-23 12:40:40 -08:00
Harald Schafer 9ff1a54c8d bump laika 2020-01-23 11:47:45 -08:00
Willem Melching 61c104b392 update test reference after calibrationd changes 2020-01-23 11:40:34 -08:00
Willem Melching fb8efbed2d always upload artifacts 2020-01-23 11:35:07 -08:00
ga 7f6c9ebaf7 [Memory leak]uniq_ptr for tmsg (#985)
* uniq_ptr for tmsg

* Added header
2020-01-23 11:25:54 -08:00
mosh-een 53933ebf5b Update gps_helpers.py (#994) 2020-01-23 11:24:42 -08:00
Harald Schafer 48b4a57980 needs to be array 2020-01-23 11:08:05 -08:00
Willem Melching 50e859e6b1 Add timeout to github actions and remove old azure-pipelines file 2020-01-23 11:02:37 -08:00
Harald Schafer ba6fd511b6 sanity clip every vp 2020-01-22 13:09:03 -08:00
Harald Schafer c32ebcb2c6 simplify and better 2020-01-21 16:37:22 -08:00
Harald Schafer bbb37309fc need lock too 2020-01-21 14:42:07 -08:00
Harald Schafer df6b16c7f6 tf 2.1 has issues 2020-01-21 14:28:49 -08:00
Willem Melching ec6e83ca2d Fix locationd_yawrate A matrix 2020-01-21 13:52:45 -08:00
ZwX1616 cf70368f67 replace numpy funs and shorten green prompt (#989) 2020-01-21 13:40:26 -08:00
Adeeb 28af44d199 GitHub Actions for CI (#986)
* basic github actions config

* submodules

* pwd

* docker save

* unit tests

* add rest of tests

* fix unit tests

* artifacts

* container name

* does this work?

* no --rm when we want artifacts

* clean up

* fix artifact paths

* name

* rerun travis

* remove travis config
2020-01-21 12:26:10 -08:00
Arne Schwarck 855abbd99e Subsock no longer exsists (#987)
* Subsock no longer exsists

use the new SubSocket as SubSock has been removed

* fix poller syntax

update to the new syntax and remove unused messaging library
2020-01-21 11:25:12 -08:00
Adeeb f13c5d74aa disable LDW when calibration is incomplete (#984) 2020-01-20 21:43:38 -08:00
Willem Melching 6f703eaf4e Installer: disable SSH and safer continue.sh write 2020-01-20 15:16:24 -08:00
illumiN8i 689d49f3f8 add 2017 Lexus RX 450h (#981)
fingerprint from discord user elihaddad
2020-01-20 13:38:40 -08:00
Adeeb 87f9e14e9c speed up car model test (#977) 2020-01-20 12:56:14 -08:00
Adeeb 7129dc8c6a add missing unit tests to travis config (#979) 2020-01-20 12:46:38 -08:00
Willem Melching 20745fe1d7 add bug report template 2020-01-20 12:15:55 -08:00
Willem Melching f6835e9490 Add cloudlog for is_on_wifi fail 2020-01-20 11:25:16 -08:00
Harald Schafer deef19ff19 bump adding camodom to qlog 2020-01-20 10:59:17 -08:00
Willem Melching 6adbe24d4c catch CalledProcessError in uploader wifi check 2020-01-20 10:57:08 -08:00
andyh2 79122ae662 apk lib: Grant offroad access to TelephonyManager 2020-01-19 18:05:31 -05:00
andyh2 8d7bb87e7e offroad apk @ openpilot-apks#530fcb19d 2020-01-19 16:39:57 -05:00
illumiN8i 5560ef0521 Add 2019XSECAMRY fingerprint (#971)
From discord user 2019XSECAMRY

add comment
2020-01-19 10:43:44 -08:00
Willem Melching 53d9975947 installer: add reset to make sure latest is checked out if branch doesnt change 2020-01-19 10:01:11 -08:00
Willem Melching d9e054477b Panda signature needs to be bytes 2020-01-19 09:40:37 -08:00
cfranhonda a93375882a add 2017 Civic Hatchback LX fp (#966) 2020-01-19 00:24:50 -08:00
Adeeb dafdb79db2 Clean up ECU redundancy in selfdrive/car/* (#963)
* clean up ecu redundancy in selfdrive/car

* clean up gear parsing
2020-01-18 23:35:10 -08:00
Comma Device 0fa10e4dd7 wait for NTP time sync before starting install 2020-01-19 05:25:15 +00:00
Bar Harel f1d6f68625 Toyota Corolla Hatchback Hybrid 2019 Excite (Israel) 2020-01-18 15:28:12 -08:00
Willem Melching 757c29e1ae bump panda 2020-01-18 13:28:12 -08:00
Comma Device 1989df2fac change install location in internal launch script 2020-01-18 20:54:46 +00:00
Willem Melching 65a40149d8 startup alert, handle case where param returns none 2020-01-17 21:30:14 -08:00
George Hotz adb5fe1fa9 Merge pull request #964 from commaai/branch-alert
Add orange alert if you are not running a devel or release branch
2020-01-17 17:52:14 -08:00
George Hotz c7bc8ee00f python 3 issue 2020-01-17 17:50:43 -08:00
George Hotz dcd0807d7e whitelist, don't blacklist 2020-01-17 17:46:17 -08:00
George Hotz 013166a34e add alert 2020-01-17 17:46:17 -08:00
George Hotz 6ceffe68d0 base SNPE path off home dir, still not really generic 2020-01-17 17:45:38 -08:00
George Hotz c26d893a77 allow non android to be identified differently 2020-01-17 17:38:31 -08:00
George Hotz a3dde4e7fe ui was gitignored 2020-01-17 17:34:23 -08:00
Harald Schafer e4472d0d46 deprecated 2020-01-17 16:24:40 -08:00
Willem Melching f3c1992b10 Merge pull request #960 from ZwX1616/patch-1
not to change awareness to npfloat64
2020-01-17 14:20:14 -08:00
ZwX1616 12f72fb8e2 Update test_monitoring.py 2020-01-17 14:15:08 -08:00
ZwX1616 2f19eed023 Update test_monitoring.py 2020-01-17 14:02:59 -08:00
Willem Melching dfded79673 Tools is now in openpilot, and use prebuilt capnp 2020-01-17 13:13:02 -08:00
ZwX1616 b013a00095 not to change awareness to np 2020-01-17 13:12:18 -08:00
Willem Melching 7f813d23ce cleanup and make linting part of ci work 2020-01-17 13:03:44 -08:00
George Hotz 59b3d06417 tools is local now 2020-01-17 12:51:19 -08:00
George Hotz b0260dadba selfdrive/controls 2020-01-17 12:48:30 -08:00
George Hotz fcf8efb826 selfdrive/locationd 2020-01-17 11:39:56 -08:00
Willem Melching 5f2a5e5bad use relative urls in submodules 2020-01-17 11:27:29 -08:00
George Hotz f467642a1c selfdrive/debug 2020-01-17 11:23:21 -08:00
George Hotz da079d47d7 logcatd, loggerd, mapd, modeld, proclogd 2020-01-17 11:20:17 -08:00
George Hotz 5c9afcc785 selfdrive/sensord 2020-01-17 11:17:58 -08:00
George Hotz c0bfbc12c7 selfdrive/test 2020-01-17 11:16:14 -08:00
George Hotz aeb2fff068 selfdrive/ui 2020-01-17 11:05:23 -08:00
George Hotz 2f9379a139 selfdrive/*.py 2020-01-17 11:03:42 -08:00
George Hotz 368a956b96 selfdrive/common 2020-01-17 11:01:02 -08:00
George Hotz 71ead9adea selfdrive/car 2020-01-17 10:58:43 -08:00
George Hotz 978e0eb986 selfdrive/clocksd 2020-01-17 10:57:08 -08:00
George Hotz 341c0da987 selfdrive/athenad 2020-01-17 10:54:24 -08:00
George Hotz 84560ccd55 selfdrive/camerad 2020-01-17 10:52:42 -08:00
George Hotz ef93a715e1 selfdrive/boardd 2020-01-17 10:51:01 -08:00
George Hotz 41d99c3b70 selfdrive/assets 2020-01-17 10:47:43 -08:00
George Hotz d4d57ed7fe bring over scripts 2020-01-17 10:41:41 -08:00
George Hotz d2a564b9c7 bring over installer 2020-01-17 10:39:50 -08:00
George Hotz da6863f427 bring over phonelibs minus frida-gum and qsml 2020-01-17 10:37:11 -08:00
George Hotz 6abffe0ede external folder 2020-01-17 10:33:21 -08:00
George Hotz 23c2d02682 latest models 2020-01-17 10:30:34 -08:00
George Hotz e8d888c45b common folder 2020-01-17 10:28:44 -08:00
George Hotz c4e5ce685e latest built apks 2020-01-17 10:26:31 -08:00
George Hotz c8a04d25c9 root directory hidden files 2020-01-17 10:25:50 -08:00
George Hotz 012535a84e root directory non hidden files 2020-01-17 10:22:00 -08:00
George Hotz 3fe9bbe665 merge in pyextra 2020-01-17 10:08:05 -08:00
George Hotz 29ac3da7b8 merge in tools 2020-01-17 10:07:22 -08:00
George Hotz 80d6953862 submodules 2020-01-17 10:05:09 -08:00
George Hotz 6c33a5c1f3 root commit 2020-01-17 10:02:52 -08:00
5216 changed files with 1126877 additions and 586020 deletions
+3
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@@ -0,0 +1,3 @@
((c++-mode (flycheck-gcc-language-standard . "c++11")
(flycheck-clang-language-standard . "c++11")
))
+24
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@@ -0,0 +1,24 @@
.git
.DS_Store
notebooks
phone
massivemap
neos
installer
chffr/app2
chffr/backend/env
selfdrive/nav
selfdrive/baseui
chffr/lib/vidindex/vidindex
chffr/lib/index_log/index_log
selfdrive/test/simulator2
**/cache_data
xx/chffr/lib/index_log/index_log
xx/chffr/lib/vidindex/vidindex
xx/plus
xx/community
xx/projects
!xx/projects/eon_testing_master
!xx/projects/map3d
xx/ops
xx/junk
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root = true
[*]
end_of_line = lf
insert_final_newline = true
trim_trailing_whitespace = true
[{*.py, *.pyx, *pxd}]
charset = utf-8
indent_style = space
indent_size = 2
+27
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@@ -0,0 +1,27 @@
*.keras filter=lfs diff=lfs merge=lfs -text
*.dlc filter=lfs diff=lfs merge=lfs -text
*.pb filter=lfs diff=lfs merge=lfs -text
*.bin filter=lfs diff=lfs merge=lfs -text
*.apk filter=lfs diff=lfs merge=lfs -text
*.ipynb filter=nbstripout -diff
external/ffmpeg/bin/ffmpeg_cuda filter=lfs diff=lfs merge=lfs -text
models/segnet.keras filter=lfs diff=lfs merge=lfs -text
external/zmq/lib/libzmq.a filter=lfs diff=lfs merge=lfs -text
external/zmq/lib/libczmq.a filter=lfs diff=lfs merge=lfs -text
phonelibs/acado/x64/lib/libacado_toolkit.a filter=lfs diff=lfs merge=lfs -text
phonelibs/acado/x64/lib/libacado_toolkit_s.so.1.2.2beta filter=lfs diff=lfs merge=lfs -text
phonelibs/acado/x64/lib/libacado_casadi.a filter=lfs diff=lfs merge=lfs -text
phonelibs/acado/x64/lib/libacado_csparse.a filter=lfs diff=lfs merge=lfs -text
phonelibs/acado/x64/lib/libacado_qpoases.a filter=lfs diff=lfs merge=lfs -text
phonelibs/acado/aarch64/lib/libacado_toolkit.a filter=lfs diff=lfs merge=lfs -text
phonelibs/acado/aarch64/lib/libacado_toolkit_s.so.1.2.2beta filter=lfs diff=lfs merge=lfs -text
phonelibs/acado/aarch64/lib/libacado_casadi.a filter=lfs diff=lfs merge=lfs -text
phonelibs/acado/aarch64/lib/libacado_csparse.a filter=lfs diff=lfs merge=lfs -text
phonelibs/acado/aarch64/lib/libacado_qpoases.a filter=lfs diff=lfs merge=lfs -text
phonelibs/fastcv/aarch64/libfastcvopt.so filter=lfs diff=lfs merge=lfs -text
phonelibs/fastcv/aarch64/libfastcvadsp_stub.so filter=lfs diff=lfs merge=lfs -text
external/mac/MP4Box filter=lfs diff=lfs merge=lfs -text
models/segnet2.keras filter=lfs diff=lfs merge=lfs -text
external/opencl/*.deb filter=lfs diff=lfs merge=lfs -text
phonelibs/zmq/aarch64-linux/lib/libzmq.a filter=lfs diff=lfs merge=lfs -text
external/azcopy/azcopy filter=lfs diff=lfs merge=lfs -text
+25
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@@ -0,0 +1,25 @@
---
name: Bug report
about: Create a report to help us improve openpilot
title: ''
labels: ''
assignees: ''
---
**Describe the bug**
A clear and concise description of what the bug is.
**How to reproduce or log data**
Steps to reproduce the behavior, or a explorer/cabana link to the exact drive and timestamp of when the bug occurred.
**Expected behavior**
A clear and concise description of what you expected to happen.
**Device/Version information (please complete the following information):**
- Device: [e.g. EON/EON Gold]
- Version: [e.g. 0.6.4], or commit hash when on devel
- Car make/model [e.g. Toyota Prius 2016]
**Additional context**
Add any other context about the problem here.
+125
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@@ -0,0 +1,125 @@
name: Openpilot Tests
on: [push, pull_request]
env:
RUN: docker run --shm-size 1G --rm tmppilot /bin/sh -c
LOAD: docker load -i tmppilot.tar.gz/tmppilot.tar.gz
UNIT_TEST: cd /tmp/openpilot && python -m unittest discover
jobs:
build:
name: build
runs-on: ubuntu-16.04
steps:
- uses: actions/checkout@v2
- name: Checkout submodules
run: |
git submodule update --init
- run: |
docker pull $(grep -ioP '(?<=^from)\s+\S+' Dockerfile.openpilot) || true
docker pull docker.io/commaai/openpilot:latest || true
docker build --cache-from docker.io/commaai/openpilot:latest -t tmppilot -f Dockerfile.openpilot .
docker save tmppilot:latest | gzip > tmppilot.tar.gz
- uses: actions/upload-artifact@v1
with:
name: tmppilot.tar.gz
path: tmppilot.tar.gz
linter:
name: linter
runs-on: ubuntu-16.04
needs: build
steps:
- uses: actions/download-artifact@v1
with:
name: tmppilot.tar.gz
- name: Load image
run: $LOAD
- name: flake8
run: $RUN "cd /tmp/openpilot/ && ./flake8_openpilot.sh"
- name: pylint
run: $RUN "cd /tmp/openpilot/ && ./pylint_openpilot.sh"
unit_tests:
name: unit tests
runs-on: ubuntu-16.04
needs: build
steps:
- uses: actions/download-artifact@v1
with:
name: tmppilot.tar.gz
- name: Load image
run: $LOAD
- name: Run unit tests
run: |
$RUN cd /tmp/openpilot/selfdrive/test/test_fingerprints.py
$RUN "$UNIT_TEST common"
$RUN "$UNIT_TEST opendbc/can"
$RUN "$UNIT_TEST selfdrive/boardd"
$RUN "$UNIT_TEST selfdrive/controls"
$RUN "$UNIT_TEST selfdrive/loggerd"
$RUN "$UNIT_TEST selfdrive/car"
$RUN "$UNIT_TEST selfdrive/locationd"
$RUN "$UNIT_TEST selfdrive/athena"
process_replay:
name: process replay
runs-on: ubuntu-16.04
needs: build
timeout-minutes: 30
steps:
- uses: actions/download-artifact@v1
with:
name: tmppilot.tar.gz
- name: Load image
run: $LOAD
- name: Run replay
run: |
CONTAINER_NAME="tmppilot_${GITHUB_SHA}"
docker run --shm-size 1G --name ${CONTAINER_NAME} tmppilot /bin/sh -c "cd /tmp/openpilot/selfdrive/test/process_replay && CI=1 ./test_processes.py"
docker cp $CONTAINER_NAME:/tmp/openpilot/selfdrive/test/process_replay/diff.txt diff.txt
docker rm $CONTAINER_NAME
- uses: actions/upload-artifact@v1
if: always()
with:
name: process_replay_diff.txt
path: diff.txt
test_longitudinal:
name: longitudinal
runs-on: ubuntu-16.04
needs: build
timeout-minutes: 30
steps:
- uses: actions/download-artifact@v1
with:
name: tmppilot.tar.gz
- name: Load image
run: $LOAD
- name: Test longitudinal
run: |
CONTAINER_NAME="tmppilot_${GITHUB_SHA}"
docker run --shm-size 1G --name ${CONTAINER_NAME} tmppilot /bin/sh -c "cd /tmp/openpilot/selfdrive/test/longitudinal_maneuvers && OPTEST=1 ./test_longitudinal.py"
mkdir out
docker cp $CONTAINER_NAME:/tmp/openpilot/selfdrive/test/longitudinal_maneuvers/out/longitudinal/ out/
docker rm $CONTAINER_NAME
- uses: actions/upload-artifact@v1
if: always()
with:
name: longitudinal
path: out
test_car_models:
name: test car models
runs-on: ubuntu-16.04
needs: build
timeout-minutes: 30
steps:
- uses: actions/download-artifact@v1
with:
name: tmppilot.tar.gz
- name: Load image
run: $LOAD
- name: Test car models
run: $RUN "mkdir -p /data/params && cd /tmp/openpilot/selfdrive/test/ && ./test_car_models.py"
+9 -39
View File
@@ -1,8 +1,4 @@
venv/
.venv/
.ci_cache
.env
.clang-format
.DS_Store
.tags
.ipynb_checkpoints
@@ -10,9 +6,9 @@ venv/
.overlay_init
.overlay_consistent
.sconsign.dblite
.vscode
model2.png
a.out
.hypothesis
*.dylib
*.DSYM
@@ -24,66 +20,40 @@ a.out
.*.un~
*.tmp
*.o
*.o-*
*.os
*.os-*
*.so
*.a
*.clb
*.class
*.pyxbldc
*.vcd
*.qm
config.json
clcache
compile_commands.json
compare_runtime*.html
persist
board/obj/
selfdrive/boardd/boardd
selfdrive/logcatd/logcatd
selfdrive/mapd/default_speeds_by_region.json
system/proclogd/proclogd
selfdrive/ui/translations/alerts_generated.h
selfdrive/ui/translations/tmp
selfdrive/proclogd/proclogd
selfdrive/ui/_ui
selfdrive/test/longitudinal_maneuvers/out
selfdrive/car/tests/cars_dump
system/camerad/camerad
system/camerad/test/ae_gray_test
selfdrive/visiond/visiond
selfdrive/loggerd/loggerd
selfdrive/sensord/_gpsd
selfdrive/sensord/_sensord
selfdrive/camerad/camerad
selfdrive/modeld/_modeld
selfdrive/modeld/_navmodeld
selfdrive/modeld/_dmonitoringmodeld
/src/
one
openpilot
notebooks
xx
yy
hyperthneed
panda_jungle
provisioning
.coverage*
coverage.xml
htmlcov
pandaextra
.mypy_cache/
flycheck_*
cppcheck_report.txt
comma*.sh
selfdrive/modeld/thneed/compile
selfdrive/modeld/models/*.thneed
selfdrive/modeld/models/*.pkl
*.bz2
build/
!**/.gitkeep
poetry.toml
Pipfile
+16
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@@ -0,0 +1,16 @@
[submodule "panda"]
path = panda
url = ../../commaai/panda.git
[submodule "opendbc"]
path = opendbc
url = ../../commaai/opendbc.git
[submodule "laika_repo"]
path = laika_repo
url = ../../commaai/laika.git
[submodule "apks"]
path = apks
url = ../../commaai/openpilot-apks.git
[submodule "cereal"]
path = cereal
url = ../../commaai/cereal.git
+585
View File
@@ -0,0 +1,585 @@
[MASTER]
# A comma-separated list of package or module names from where C extensions may
# be loaded. Extensions are loading into the active Python interpreter and may
# run arbitrary code
extension-pkg-whitelist=scipy
# Add files or directories to the blacklist. They should be base names, not
# paths.
ignore=CVS
# Add files or directories matching the regex patterns to the blacklist. The
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ignore-patterns=
# Python code to execute, usually for sys.path manipulation such as
# pygtk.require().
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persistent=yes
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#rcfile=
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suggestion-mode=yes
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unsafe-load-any-extension=no
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old-style-class,
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len-as-condition,
unneeded-not,
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multiple-imports,
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logging-not-lazy,
fixme,
redefined-outer-name,
unused-variable,
unsubscriptable-object,
expression-not-assigned,
too-many-boolean-expressions,
consider-using-ternary,
invalid-unary-operand-type,
relative-import,
deprecated-lambda
# Enable the message, report, category or checker with the given id(s). You can
# either give multiple identifier separated by comma (,) or put this option
# multiple time (only on the command line, not in the configuration file where
# it should appear only once). See also the "--disable" option for examples.
enable=c-extension-no-member
[REPORTS]
# Python expression which should return a note less than 10 (10 is the highest
# note). You have access to the variables errors warning, statement which
# respectively contain the number of errors / warnings messages and the total
# number of statements analyzed. This is used by the global evaluation report
# (RP0004).
evaluation=10.0 - ((float(5 * error + warning + refactor + convention) / statement) * 10)
# Template used to display messages. This is a python new-style format string
# used to format the message information. See doc for all details
#msg-template=
# Set the output format. Available formats are text, parseable, colorized, json
# and msvs (visual studio).You can also give a reporter class, eg
# mypackage.mymodule.MyReporterClass.
output-format=text
# Tells whether to display a full report or only the messages
reports=no
# Activate the evaluation score.
score=yes
[REFACTORING]
# Maximum number of nested blocks for function / method body
max-nested-blocks=5
# Complete name of functions that never returns. When checking for
# inconsistent-return-statements if a never returning function is called then
# it will be considered as an explicit return statement and no message will be
# printed.
never-returning-functions=optparse.Values,sys.exit
[LOGGING]
# Logging modules to check that the string format arguments are in logging
# function parameter format
logging-modules=logging
[SPELLING]
# Limits count of emitted suggestions for spelling mistakes
max-spelling-suggestions=4
# Spelling dictionary name. Available dictionaries: none. To make it working
# install python-enchant package.
spelling-dict=
# List of comma separated words that should not be checked.
spelling-ignore-words=
# A path to a file that contains private dictionary; one word per line.
spelling-private-dict-file=
# Tells whether to store unknown words to indicated private dictionary in
# --spelling-private-dict-file option instead of raising a message.
spelling-store-unknown-words=no
[MISCELLANEOUS]
# List of note tags to take in consideration, separated by a comma.
notes=FIXME,
XXX,
TODO
[SIMILARITIES]
# Ignore comments when computing similarities.
ignore-comments=yes
# Ignore docstrings when computing similarities.
ignore-docstrings=yes
# Ignore imports when computing similarities.
ignore-imports=no
# Minimum lines number of a similarity.
min-similarity-lines=4
[TYPECHECK]
# List of decorators that produce context managers, such as
# contextlib.contextmanager. Add to this list to register other decorators that
# produce valid context managers.
contextmanager-decorators=contextlib.contextmanager
# List of members which are set dynamically and missed by pylint inference
# system, and so shouldn't trigger E1101 when accessed. Python regular
# expressions are accepted.
generated-members=capnp.* cereal.* pygame.* zmq.* setproctitle.* smbus2.* usb1.* serial.* cv2.*
# Tells whether missing members accessed in mixin class should be ignored. A
# mixin class is detected if its name ends with "mixin" (case insensitive).
ignore-mixin-members=yes
# This flag controls whether pylint should warn about no-member and similar
# checks whenever an opaque object is returned when inferring. The inference
# can return multiple potential results while evaluating a Python object, but
# some branches might not be evaluated, which results in partial inference. In
# that case, it might be useful to still emit no-member and other checks for
# the rest of the inferred objects.
ignore-on-opaque-inference=yes
# List of class names for which member attributes should not be checked (useful
# for classes with dynamically set attributes). This supports the use of
# qualified names.
ignored-classes=optparse.Values,thread._local,_thread._local
# List of module names for which member attributes should not be checked
# (useful for modules/projects where namespaces are manipulated during runtime
# and thus existing member attributes cannot be deduced by static analysis. It
# supports qualified module names, as well as Unix pattern matching.
ignored-modules=flask setproctitle usb1 flask.ext.socketio smbus2 usb1.*
# Show a hint with possible names when a member name was not found. The aspect
# of finding the hint is based on edit distance.
missing-member-hint=yes
# The minimum edit distance a name should have in order to be considered a
# similar match for a missing member name.
missing-member-hint-distance=1
# The total number of similar names that should be taken in consideration when
# showing a hint for a missing member.
missing-member-max-choices=1
[VARIABLES]
# List of additional names supposed to be defined in builtins. Remember that
# you should avoid to define new builtins when possible.
additional-builtins=
# Tells whether unused global variables should be treated as a violation.
allow-global-unused-variables=yes
# List of strings which can identify a callback function by name. A callback
# name must start or end with one of those strings.
callbacks=cb_,
_cb
# A regular expression matching the name of dummy variables (i.e. expectedly
# not used).
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# Argument names that match this expression will be ignored. Default to name
# with leading underscore
ignored-argument-names=_.*|^ignored_|^unused_
# Tells whether we should check for unused import in __init__ files.
init-import=no
# List of qualified module names which can have objects that can redefine
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redefining-builtins-modules=six.moves,past.builtins,future.builtins
[FORMAT]
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expected-line-ending-format=
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ignore-long-lines=^\s*(# )?<?https?://\S+>?$
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# tab).
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# List of optional constructs for which whitespace checking is disabled. `dict-
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no-space-check=trailing-comma,
dict-separator
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[BASIC]
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bar,
baz,
toto,
tutu,
tata
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good-names=i,
j,
k,
ex,
Run,
_
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name-group=
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property-classes=abc.abstractproperty
# Naming style matching correct variable names
variable-naming-style=snake_case
# Regular expression matching correct variable names. Overrides variable-
# naming-style
#variable-rgx=
[DESIGN]
# Maximum number of arguments for function / method
max-args=5
# Maximum number of attributes for a class (see R0902).
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max-statements=50
# Minimum number of public methods for a class (see R0903).
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[CLASSES]
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defining-attr-methods=__init__,
__new__,
setUp
# List of member names, which should be excluded from the protected access
# warning.
exclude-protected=_asdict,
_fields,
_replace,
_source,
_make
# List of valid names for the first argument in a class method.
valid-classmethod-first-arg=cls
# List of valid names for the first argument in a metaclass class method.
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[IMPORTS]
# Allow wildcard imports from modules that define __all__.
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# Analyse import fallback blocks. This can be used to support both Python 2 and
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# only in one or another interpreter, leading to false positives when analysed.
analyse-fallback-blocks=no
# Deprecated modules which should not be used, separated by a comma
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TERMIOS,
Bastion,
rexec
# Create a graph of external dependencies in the given file (report RP0402 must
# not be disabled)
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# not be disabled)
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# Force import order to recognize a module as part of a third party library.
known-third-party=enchant
[EXCEPTIONS]
# Exceptions that will emit a warning when being caught. Defaults to
# "Exception"
overgeneral-exceptions=Exception
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# How to contribute
Our software is open source so you can solve your own problems without needing help from others. And if you solve a problem and are so kind, you can upstream it for the rest of the world to use.
Most open source development activity is coordinated through our [Discord](https://discord.comma.ai). A lot of documentation is available on our [medium](https://medium.com/@comma_ai/)
## Getting Started
* Join our [Discord](https://discord.comma.ai)
* Make sure you have a [GitHub account](https://github.com/signup/free)
* Fork [our repositories](https://github.com/commaai) on GitHub
## Testing
### Local Testing
You can test your changes on your machine by running `run_docker_tests.sh`. This will run some automated tests in docker against your code.
### Automated Testing
All PRs are automatically checked by travis. Check out `.travis.yml` for what travis runs. Any new tests sould be added to travis.
### Code Style and Linting
Code is automatically check for style by travis as part of the automated tests. You can also run these yourself by running `check_code_quality.sh`.
## Car Ports (openpilot)
We've released a [Model Port guide](https://medium.com/@comma_ai/openpilot-port-guide-for-toyota-models-e5467f4b5fe6) for porting to Toyota/Lexus models.
If you port openpilot to a substantially new car brand, see this more generic [Brand Port guide](https://medium.com/@comma_ai/how-to-write-a-car-port-for-openpilot-7ce0785eda84). You might also be eligible for a bounty. See our bounties at [comma.ai/bounties.html](https://comma.ai/bounties.html)
## Pull Requests
Pull requests should be against the master branch. Before running master on in-car hardware, you'll need to run
```
git submodule init
git submodule update
```
in order to pull down the submodules, such as `panda` and `opendbc`.
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FROM ubuntu:16.04
ENV PYTHONUNBUFFERED 1
RUN apt-get update && apt-get install -y \
autoconf \
build-essential \
bzip2 \
clang \
cmake \
curl \
ffmpeg \
git \
libarchive-dev \
libbz2-dev \
libcurl4-openssl-dev \
libeigen3-dev \
libffi-dev \
libglew-dev \
libgles2-mesa-dev \
libglfw3-dev \
libglib2.0-0 \
liblzma-dev \
libmysqlclient-dev \
libomp-dev \
libopencv-dev \
libssl-dev \
libsqlite3-dev \
libtool \
libusb-1.0-0-dev \
libzmq5-dev \
locales \
ocl-icd-libopencl1 \
ocl-icd-opencl-dev \
opencl-headers \
python-dev \
python-pip \
screen \
sudo \
vim \
wget
RUN sed -i -e 's/# en_US.UTF-8 UTF-8/en_US.UTF-8 UTF-8/' /etc/locale.gen && locale-gen
ENV LANG en_US.UTF-8
ENV LANGUAGE en_US:en
ENV LC_ALL en_US.UTF-8
RUN curl -L https://github.com/pyenv/pyenv-installer/raw/master/bin/pyenv-installer | bash
ENV PATH="/root/.pyenv/bin:/root/.pyenv/shims:${PATH}"
RUN pyenv install 3.7.3
RUN pyenv global 3.7.3
RUN pyenv rehash
RUN pip install pipenv==2018.11.26
COPY Pipfile /tmp/
COPY Pipfile.lock /tmp/
RUN python --version
RUN cd /tmp && pipenv install --system --deploy
# Install subset of dev dependencies needed for CI
RUN pip install matplotlib==3.1.1 dictdiffer==0.8.0 fastcluster==1.1.25 aenum==2.2.1 scipy==1.3.1 lru-dict==1.1.6 tenacity==5.1.1 azure-common==1.1.23 azure-nspkg==3.0.2 azure-storage-blob==2.1.0 azure-storage-common==2.1.0 azure-storage-nspkg==3.1.0 pycurl==7.43.0.3
ENV PATH="/tmp/openpilot/external/bin:${PATH}"
ENV PYTHONPATH /tmp/openpilot:${PYTHONPATH}
RUN mkdir -p /tmp/openpilot
COPY ./flake8_openpilot.sh /tmp/openpilot/
COPY ./pylint_openpilot.sh /tmp/openpilot/
COPY ./.pylintrc /tmp/openpilot/
COPY ./release /tmp/openpilot/release
COPY ./common /tmp/openpilot/common
COPY ./cereal /tmp/openpilot/cereal
COPY ./opendbc /tmp/openpilot/opendbc
COPY ./selfdrive /tmp/openpilot/selfdrive
COPY ./phonelibs /tmp/openpilot/phonelibs
COPY ./pyextra /tmp/openpilot/pyextra
COPY ./panda /tmp/openpilot/panda
COPY ./external /tmp/openpilot/external
COPY ./tools /tmp/openpilot/tools
COPY SConstruct /tmp/openpilot/SConstruct
RUN mkdir -p /tmp/openpilot/selfdrive/test/out
RUN cd /tmp/openpilot && scons -j$(nproc)
Vendored
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pipeline {
agent {
docker {
image 'python:3.7.3'
args '--user=root'
}
}
stages {
stage('EON Build/Test') {
steps {
lock(resource: "", label: 'eon', inversePrecedence: true, variable: 'eon_name', quantity: 1){
timeout(time: 30, unit: 'MINUTES') {
dir(path: 'release') {
sh 'pip install paramiko'
sh 'python remote_build.py'
}
}
}
}
}
}
}
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[[source]]
name = "pypi"
url = "https://pypi.org/simple"
verify_ssl = true
[dev-packages]
opencv-python= "==3.4.2.17"
PyQt5 = "*"
ipython = "*"
networkx = "==2.3"
azure-core = "==1.1.1"
azure-common = "==1.1.24"
azure-nspkg = "==3.0.2"
azure-storage-blob = "==2.1.0"
azure-storage-common = "==2.1.0"
azure-storage-nspkg = "==3.1.0"
boto = "*"
"boto3" = "*"
control = "*"
datadog = "*"
dlib = "*"
elasticsearch = "*"
future = "*"
futures = "*"
pycocotools = {git = "https://github.com/cocodataset/cocoapi.git",subdirectory = "PythonAPI"}
gunicorn = "*"
"h5py" = "*"
hexdump = "*"
"html5lib" = "*"
imageio = "*"
ipykernel = "*"
joblib = "*"
json-logging-py = "*"
jupyter = "*"
libarchive = "*"
lru-dict = "*"
"mpld3" = "*"
msgpack-python = "*"
nbstripout = "*"
numpy = "*"
osmium = "*"
pbr = "*"
percache = "*"
pprofile = "*"
pycurl = "*"
git-pylint-commit-hook = "*"
pymongo = "*"
"pynmea2" = "*"
pypolyline = "*"
python-logstash = "*"
redis = "*"
"s2sphere" = "*"
scikit-image = "*"
"subprocess32" = "*"
tenacity = "*"
tensorflow-gpu = "==2.0"
PyJWT = "==1.4.1"
PyMySQL = "==0.9.2"
Werkzeug = "*"
"backports.lzma" = "*"
Flask-Cors = "*"
Flask-SocketIO = "*"
"GeoAlchemy2" = "*"
Pygments = "*"
PyNaCl = "*"
"PySDL2" = "*"
reverse_geocoder = "*"
Shapely = "*"
SQLAlchemy = "*"
scipy = "*"
fastcluster = "*"
backports-abc = "*"
pygame = "*"
simplejson = "*"
python-logstash-async = "*"
seaborn = "*"
pyproj = "*"
mock = "*"
matplotlib = "*"
dictdiffer = "*"
aenum = "*"
coverage = "*"
azure-cli-core = "*"
paramiko = "*"
aiohttp = "*"
[packages]
overpy = {git = "https://github.com/commaai/python-overpy.git",ref = "f86529af402d4642e1faeb146671c40284007323"}
atomicwrites = "*"
cffi = "*"
crcmod = "*"
hexdump = "*"
libusb1 = "*"
numpy = "*"
psutil = "*"
pycapnp = "*"
cryptography = "*"
pyserial = "*"
python-dateutil = "*"
pyzmq = "*"
raven = "*"
requests = "*"
setproctitle = "*"
six = "*"
smbus2 = "*"
sympy = "*"
tqdm = "*"
Cython = "*"
PyYAML = "*"
websocket_client = "*"
Logentries = {git = "https://github.com/commaai/le_python.git",ref = "feaeacb48f7f4bdb02c0a8fc092326d4e101b7f2"}
urllib3 = "*"
chardet = "*"
idna = "*"
gunicorn = "*"
utm = "*"
json-rpc = "*"
Flask = "*"
PyJWT = "*"
"Jinja2" = "*"
nose = "*"
flake8 = "*"
pylint = "*"
pycryptodome = "*"
pillow = "*"
scons = "*"
cysignals = "*"
[requires]
python_version = "3.7.3"
Generated
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[![openpilot on the comma 3X](https://i.imgur.com/6l2qbf5.png)](https://comma.ai/shop/comma-3x)
[![](https://i.imgur.com/UelUjKAh.png)](#)
Table of Contents
=======================
* [What is openpilot?](#what-is-openpilot)
* [Integration with Stock Features](#integration-with-stock-features)
* [Supported Hardware](#supported-hardware)
* [Supported Cars](#supported-cars)
* [Community Maintained Cars and Features](#community-maintained-cars-and-features)
* [Installation Instructions](#installation-instructions)
* [Limitations of openpilot ALC and LDW](#limitations-of-openpilot-alc-and-ldw)
* [Limitations of openpilot ACC and FCW](#limitations-of-openpilot-acc-and-fcw)
* [Limitations of openpilot DM](#limitations-of-openpilot-dm)
* [User Data and comma Account](#user-data-and-comma-account)
* [Safety and Testing](#safety-and-testing)
* [Testing on PC](#testing-on-pc)
* [Community and Contributing](#community-and-contributing)
* [Directory Structure](#directory-structure)
* [Licensing](#licensing)
---
What is openpilot?
------
[openpilot](http://github.com/commaai/openpilot) is an open source driver assistance system. Currently, openpilot performs the functions of Adaptive Cruise Control (ACC), Automated Lane Centering (ALC), Forward Collision Warning (FCW), and Lane Departure Warning (LDW) for a growing variety of [supported car makes, models, and model years](docs/CARS.md). In addition, while openpilot is engaged, a camera-based Driver Monitoring (DM) feature alerts distracted and asleep drivers. See more about [the vehicle integration](docs/INTEGRATION.md) and [limitations](docs/LIMITATIONS.md).
[openpilot](http://github.com/commaai/openpilot) is an open source driver assistance system. Currently, openpilot performs the functions of Adaptive Cruise Control (ACC), Automated Lane Centering (ALC), Forward Collision Warning (FCW) and Lane Departure Warning (LDW) for a growing variety of supported [car makes, models and model years](#supported-cars). In addition, while openpilot is engaged, a camera based Driver Monitoring (DM) feature alerts distracted and asleep drivers.
<table>
<tr>
<td><a href="https://youtu.be/NmBfgOanCyk" title="Video By Greer Viau"><img src="https://github.com/commaai/openpilot/assets/8762862/2f7112ae-f748-4f39-b617-fabd689c3772"></a></td>
<td><a href="https://youtu.be/VHKyqZ7t8Gw" title="Video By Logan LeGrand"><img src="https://github.com/commaai/openpilot/assets/8762862/92351544-2833-40d7-9e0b-7ef7ae37ec4c"></a></td>
<td><a href="https://youtu.be/SUIZYzxtMQs" title="A drive to Taco Bell"><img src="https://github.com/commaai/openpilot/assets/8762862/05ceefc5-2628-439c-a9b2-89ce77dc6f63"></a></td>
<td><a href="https://www.youtube.com/watch?v=mgAbfr42oI8" title="YouTube" rel="noopener"><img src="https://i.imgur.com/kAtT6Ei.png"></a></td>
<td><a href="https://www.youtube.com/watch?v=394rJKeh76k" title="YouTube" rel="noopener"><img src="https://i.imgur.com/lTt8cS2.png"></a></td>
<td><a href="https://www.youtube.com/watch?v=1iNOc3cq8cs" title="YouTube" rel="noopener"><img src="https://i.imgur.com/ANnuSpe.png"></a></td>
<td><a href="https://www.youtube.com/watch?v=Vr6NgrB-zHw" title="YouTube" rel="noopener"><img src="https://i.imgur.com/Qypanuq.png"></a></td>
</tr>
<tr>
<td><a href="https://www.youtube.com/watch?v=Ug41KIKF0oo" title="YouTube" rel="noopener"><img src="https://i.imgur.com/3caZ7xM.png"></a></td>
<td><a href="https://www.youtube.com/watch?v=NVR_CdG1FRg" title="YouTube" rel="noopener"><img src="https://i.imgur.com/bAZOwql.png"></a></td>
<td><a href="https://www.youtube.com/watch?v=tkEvIdzdfUE" title="YouTube" rel="noopener"><img src="https://i.imgur.com/EFINEzG.png"></a></td>
<td><a href="https://www.youtube.com/watch?v=_P-N1ewNne4" title="YouTube" rel="noopener"><img src="https://i.imgur.com/gAyAq22.png"></a></td>
</tr>
</table>
What is FrogPilot? 🐸
Integration with Stock Features
------
FrogPilot is a fully open-sourced fork of openpilot, featuring clear and concise commits striving to be a resource for the openpilot developer community. It thrives on contributions from both users and developers, focusing on a collaborative, community-led approach to deliver an advanced openpilot experience for everyone!
In all supported cars:
* Stock Lane Keep Assist (LKA) and stock ALC are replaced by openpilot ALC, which only functions when openpilot is engaged by the user.
* Stock LDW is replaced by openpilot LDW.
------
FrogPilot was last updated on:
Additionally, on specific supported cars (see ACC column in [supported cars](#supported-cars)):
* Stock ACC is replaced by openpilot ACC.
* openpilot FCW operates in addition to stock FCW.
**June 1st, 2024**
openpilot should preserve all other vehicle's stock features, including, but are not limited to: FCW, Automatic Emergency Braking (AEB), auto high-beam, blind spot warning, and side collision warning.
Features
Supported Hardware
------
FrogPilot offers a wide range of customizable features that are easily toggled on or off to suit your preferences. Whether you want a completely stock openpilot experience, or want to add some fun and personal touches, FrogPilot has you covered! Some of the features include:
At the moment, openpilot supports the [EON DevKit](https://comma.ai/shop/products/eon-dashcam-devkit) and the [comma two](https://comma.ai/shop/products/comma-two-devkit). A [car harness](https://comma.ai/shop/products/car-harness) is recommended to connect the EON or comma two to the car. In the future, we'd like to support other platforms as well, like gaming PCs.
------
**Advanced Customizations:**
- "Alert Volume Controller" to set the volume level for each of of openpilot's sounds
- Customize the following distance and jerk values for each personality profile
- Fine tune your car's "Steer Ratio" to perfect your lateral control
- Increase the distance when stopped behind lead vehicles
- Increase the max set speed by a custom interval (i.e. 2, 3, 4, 5, 6, etc. instead of just 1)
- Select between past, present, and future openpilot driving models
------
🎨 **Custom Themes:**
- 🐸 Frog theme (with a bonus 🐐 sound effect)
- <img src="https://images.emojiterra.com/google/noto-emoji/unicode-15/color/512px/1f1f7-1f1fa.png" width="15" height="12"> Russia / Joseph Stalin theme
- 🔌 Tesla theme
- Holiday themes! Minor holidays last a day, while major holidays (Easter, Halloween, Thanksgiving, Christmas) last a week
- Random events triggered by specific actions while driving with openpilot
- 📢 Want to add a theme? Request one in the "feature-request" channel in the FrogPilot Discord!
------
🚀 **Conditional Experimental Mode:**
- Auto-activates "Experimental Mode" under several conditions, including:
- Approaching intersections and turns while using navigation
- Approaching slower vehicles to take advantage of "Experimental Mode"'s smoother braking
- Curve and stop light/stop sign detection
- Driving below a set speed
- Turn signal activation below 55mph for turn assistance
------
📊 **Developer UI:**
- Display various driving logics such as the distance, speed, and the desired following distance to your lead vehicle
- Lane measuring of the adjacent lanes for lane detection
- Tap the "VEHICLE ONLINE"/"CPU"/"GPU" gauge to toggle between CPU and GPU monitoring
- Tap the "CONNECT ONLINE"/"MEMORY"/"LEFT"/"USED" gauge to toggle between RAM and storage monitoring
------
🛠 **Device Management:**
- Adjustable screen brightness for both onroad and offroad states
- Adjustable screen timeout times for both onroad and offroad states
- Backup and restore previous versions of FrogPilot
- Backup and restore previous versions of toggle configurations
- Battery level threshold to automatically shut the device down after you car's battery falls below a set voltage limit when offroad
- Delete stored driving data for increased privacy/space via the "Device" panel
- Device can operate offline indefinitely
- Disable logging and/or uploading
- Disable uploads while onroad to help reduce data usage
- Flash the Panda within the "Device" menu
- "Standby Mode" that wakes the screen up between engagement states or when important alerts are triggered
- Timer to automatically shut down after going offroad
------
🚖 **Lateral Adjustments:**
- Activate lateral control by simply pressing the "Cruise Control" button
- Force comma's auto tuning for unsupported vehicles
- Lateral control won't disengage on gas or brake
- Nudgeless lane changes with lane detection to prevent driving into curbs or going offroad
- Pause lateral control when below a set speed
- Pause lateral control when pressing the brake
- Pause lateral control when turn signals are active
- Precise turns by using turn desires when below the minimum lane change speed
- [Twilsonco's NNFF](https://github.com/twilsonco/openpilot) for smoother steering control
------
🚘 **Longitudinal Adjustments:**
- Aggressive acceleration when following a lead vehicle from a stop
- "Map Turn Speed Controller" to slow down for curves based on stored map data
- With an additional toggle to fine tune the speed aggressiveness
- Smoother braking behind slower leads
- "Speed Limit Controller" to adjust your speed to the posted speed limit
- With additional toggles to set offsets for "0-34 mph", "35-54 mph", "55-64 mph", and "65-99 mph"
- "Sport" and "Eco" acceleration and deceleration profiles
- "Traffic Mode" tailored towards driving in traffic
- Tweak the lead detection threshold to detect leads sooner for smoother braking on stopped/slower vehicles
- "Vision Turn Speed Controller" for smoother handling of curves
- With additional toggles to fine tune the speed aggressiveness and curve detection sensitivity
------
🗺️ **Navigation:**
- 3D buildings
- Custom map styles
- Full screen map that takes up the entire screen for a more expansive map view
- iOS shortcuts to quickly set navigation destinations
- Navigate on openpilot without a comma prime subscription
- Offline maps
- "Open Street Maps" integration for speed limit control and road name view
------
🎮 **Onroad UI:**
- Compass that rotates according to the direction you're driving
- FPS counter in the screen's border
- Hide various UI elements on the screen for a cleaner UI
- Pedals on the onroad UI indicate when the gas/brake pedals are being used
- Road UI Customizations:
- Acceleration path to show the model's desired acceleration/deceleration
- Blind spot path when a vehicle is detected in your blind spot
- Increase/decrease the lane line, path, and road edge widths
- Path edge colors based on specific driving statuses:
- 🔵 Blue - Navigation active
- 🟦 Light Blue - "Always On Lateral" active
- 🟢 Green - Default
- 🟠 Orange - "Experimental Mode" active
- 🔴 Red - "Traffic Mode" active
- 🟡 Yellow - "Conditional Experimental Mode" overridden
- "Unlimited" road UI that extends out as far as the model can see
- Sidebar retains it's previous position between reboots/ignition cycles
- Steering wheel icons
- 📢 Request your own steering wheel icon in the "feature-request" channel!
- Steering wheel in the onroad UI rotates alongside your physical steering wheel
------
🚙 **Vehicle Specific Additions:**
- Automatic/manual fingerprint selection to force a selected fingerprint
- Custom longitudinal tunings for GM EVs and trucks for smoother gas and brake control
- Custom longitudinal tunings for Toyota/Lexus for smoother gas and brake control
- Disable openpilot longitudinal control to use your car's stock cruise control
- GM Volt support
- Honda Clarity support
- Increased torque for the Subaru Crosstrek
- Lock doors automatically when in the drive gear for Toyota/Lexus and unlock when in park
- openpilot longitudinal control for GM vehicles without ACC
- Pedal interceptor support for GM vehicles
- "Stop and Go" hack for Toyota's without stop and go functionality
- ZSS support for the Toyota Prius and Sienna
------
🚦 **Quality of Life Features:**
- Automatic updates for a completely "set and forget" experience
- Camera view selection
- Custom alerts for green lights, vehicles in blindspot, lead departing, and the current speed limit changing
- Display the driver camera when in reverse
- Driving statistics to show how many hours and miles you've driven on the home screen
- Fleet Manager to easily access your driving data and screen recordings
- Numerical temperature gauge
- Retain tethering status between reboots
- Screenrecorder
- Toggle "Experimental Mode" via the "Lane Departure Alert" button, holding down the "Distance" button for 0.5+ seconds, or by double tapping the screen
How to Install
Supported Cars
------
Easiest way to install FrogPilot is via this URL at the installation screen:
| Make | Model (US Market Reference) | Supported Package | ACC | No ACC accel below | No ALC below |
| ----------| ------------------------------| ------------------| -----------------| -------------------| -------------|
| Acura | ILX 2016-18 | AcuraWatch Plus | openpilot | 25mph<sup>5</sup> | 25mph |
| Acura | RDX 2016-18 | AcuraWatch Plus | openpilot | 25mph<sup>5</sup> | 12mph |
| Chrysler | Pacifica 2017-18 | Adaptive Cruise | Stock | 0mph | 9mph |
| Chrysler | Pacifica Hybrid 2017-18 | Adaptive Cruise | Stock | 0mph | 9mph |
| Chrysler | Pacifica Hybrid 2019-20 | Adaptive Cruise | Stock | 0mph | 39mph |
| Honda | Accord 2018-19 | All | Stock | 0mph | 3mph |
| Honda | Accord Hybrid 2018-19 | All | Stock | 0mph | 3mph |
| Honda | Civic Hatchback 2017-19 | Honda Sensing | Stock | 0mph | 12mph |
| Honda | Civic Sedan/Coupe 2016-18 | Honda Sensing | openpilot | 0mph | 12mph |
| Honda | Civic Sedan/Coupe 2019 | Honda Sensing | Stock | 0mph | 2mph |
| Honda | CR-V 2015-16 | Touring | openpilot | 25mph<sup>5</sup> | 12mph |
| Honda | CR-V 2017-19 | Honda Sensing | Stock | 0mph | 12mph |
| Honda | CR-V Hybrid 2017-2019 | Honda Sensing | Stock | 0mph | 12mph |
| Honda | Fit 2018-19 | Honda Sensing | openpilot | 25mph<sup>5</sup> | 12mph |
| Honda | Odyssey 2018-20 | Honda Sensing | openpilot | 25mph<sup>5</sup> | 0mph |
| Honda | Passport 2019 | All | openpilot | 25mph<sup>5</sup> | 12mph |
| Honda | Pilot 2016-18 | Honda Sensing | openpilot | 25mph<sup>5</sup> | 12mph |
| Honda | Pilot 2019 | All | openpilot | 25mph<sup>5</sup> | 12mph |
| Honda | Ridgeline 2017-19 | Honda Sensing | openpilot | 25mph<sup>5</sup> | 12mph |
| Hyundai | Elantra 2017-19<sup>1</sup> | SCC + LKAS | Stock | 19mph | 34mph |
| Hyundai | Genesis 2018<sup>1</sup> | All | Stock | 19mph | 34mph |
| Hyundai | Santa Fe 2019<sup>1</sup> | All | Stock | 0mph | 0mph |
| Jeep | Grand Cherokee 2016-18 | Adaptive Cruise | Stock | 0mph | 9mph |
| Jeep | Grand Cherokee 2019 | Adaptive Cruise | Stock | 0mph | 39mph |
| Kia | Optima 2019<sup>1</sup> | SCC + LKAS | Stock | 0mph | 0mph |
| Kia | Sorento 2018<sup>1</sup> | All | Stock | 0mph | 0mph |
| Kia | Stinger 2018<sup>1</sup> | SCC + LKAS | Stock | 0mph | 0mph |
| Lexus | CT Hybrid 2017-18 | All | Stock<sup>4</sup>| 0mph | 0mph |
| Lexus | ES 2019 | All | openpilot | 0mph | 0mph |
| Lexus | ES Hybrid 2019 | All | openpilot | 0mph | 0mph |
| Lexus | IS 2017-2019 | All | Stock | 22mph | 0mph |
| Lexus | IS Hybrid 2017 | All | Stock | 0mph | 0mph |
| Lexus | RX 2016-17 | All | Stock<sup>4</sup>| 0mph | 0mph |
| Lexus | RX 2020 | All | openpilot | 0mph | 0mph |
| Lexus | RX Hybrid 2016-19 | All | Stock<sup>4</sup>| 0mph | 0mph |
| Subaru | Crosstrek 2018-19 | EyeSight | Stock | 0mph | 0mph |
| Subaru | Impreza 2019-20 | EyeSight | Stock | 0mph | 0mph |
| Toyota | Avalon 2016 | TSS-P | Stock<sup>4</sup>| 20mph<sup>5</sup> | 0mph |
| Toyota | Avalon 2017-18 | All | Stock<sup>4</sup>| 20mph<sup>5</sup> | 0mph |
| Toyota | Camry 2018-19 | All | Stock | 0mph<sup>2</sup> | 0mph |
| Toyota | Camry Hybrid 2018-19 | All | Stock | 0mph<sup>2</sup> | 0mph |
| Toyota | C-HR 2017-19 | All | Stock | 0mph | 0mph |
| Toyota | C-HR Hybrid 2017-19 | All | Stock | 0mph | 0mph |
| Toyota | Corolla 2017-19 | All | Stock<sup>4</sup>| 20mph<sup>5</sup> | 0mph |
| Toyota | Corolla 2020 | All | openpilot | 0mph | 0mph |
| Toyota | Corolla Hatchback 2019-20 | All | openpilot | 0mph | 0mph |
| Toyota | Corolla Hybrid 2020 | All | openpilot | 0mph | 0mph |
| Toyota | Highlander 2017-19 | All | Stock<sup>4</sup>| 0mph | 0mph |
| Toyota | Highlander Hybrid 2017-19 | All | Stock<sup>4</sup>| 0mph | 0mph |
| Toyota | Prius 2016 | TSS-P | Stock<sup>4</sup>| 0mph | 0mph |
| Toyota | Prius 2017-19 | All | Stock<sup>4</sup>| 0mph | 0mph |
| Toyota | Prius Prime 2017-20 | All | Stock<sup>4</sup>| 0mph | 0mph |
| Toyota | Rav4 2016 | TSS-P | Stock<sup>4</sup>| 20mph<sup>5</sup> | 0mph |
| Toyota | Rav4 2017-18 | All | Stock<sup>4</sup>| 20mph<sup>5</sup> | 0mph |
| Toyota | Rav4 2019 | All | openpilot | 0mph | 0mph |
| Toyota | Rav4 Hybrid 2016 | TSS-P | Stock<sup>4</sup>| 0mph | 0mph |
| Toyota | Rav4 Hybrid 2017-18 | All | Stock<sup>4</sup>| 0mph | 0mph |
| Toyota | Rav4 Hybrid 2019-20 | All | openpilot | 0mph | 0mph |
| Toyota | Sienna 2018 | All | Stock<sup>4</sup>| 0mph | 0mph |
| Volkswagen| Golf 2016-19<sup>3</sup> | Driver Assistance | Stock | 0mph | 0mph |
```
frogpilot.download
```
<sup>1</sup>Requires a [panda](https://comma.ai/shop/products/panda-obd-ii-dongle) and open sourced [Hyundai giraffe](https://github.com/commaai/neo/tree/master/giraffe/hyundai), designed for the 2019 Sante Fe; pinout may differ for other Hyundai and Kia models. <br />
<sup>2</sup>28mph for Camry 4CYL L, 4CYL LE and 4CYL SE which don't have Full-Speed Range Dynamic Radar Cruise Control. <br />
<sup>3</sup>Requires a [custom connector](https://community.comma.ai/wiki/index.php/Volkswagen#Integration_at_R242_Camera) for the [car harness](https://comma.ai/shop/products/car-harness) <br />
DO NOT install the "FrogPilot-Development" branch. I'm constantly breaking things on there, so unless you don't want to use openpilot, NEVER install it!
![](https://i.imgur.com/swr0kqJ.png)
Bug reports / Feature Requests
Community Maintained Cars and Features
------
If you encounter any issues or bugs while using FrogPilot, or if you have any suggestions for new features or improvements, please don't hesitate to post about it on the Discord! I'm always looking for ways to improve the fork and provide a better experience for everyone!
| Make | Model (US Market Reference) | Supported Package | ACC | No ACC accel below | No ALC below |
| ----------| ------------------------------| ------------------| -----------------| -------------------| -------------|
| Buick | Regal 2018<sup>6</sup> | Adaptive Cruise | openpilot | 0mph | 7mph |
| Cadillac | ATS 2018<sup>6</sup> | Adaptive Cruise | openpilot | 0mph | 7mph |
| Chevrolet | Malibu 2017<sup>6</sup> | Adaptive Cruise | openpilot | 0mph | 7mph |
| Chevrolet | Volt 2017-18<sup>6</sup> | Adaptive Cruise | openpilot | 0mph | 7mph |
| GMC | Acadia Denali 2018<sup>6</sup>| Adaptive Cruise | openpilot | 0mph | 7mph |
| Holden | Astra 2017<sup>6</sup> | Adaptive Cruise | openpilot | 0mph | 7mph |
To report a bug or request a new feature, make a post in the #bug-reports or #feature-requests channel respectively on the FrogPilot Discord. Please provide as much detail as possible about the issue you're experiencing or the feature you'd like to see added. Photos, videos, log files, or other relevant information are very helpful!
<sup>4</sup>When disconnecting the Driver Support Unit (DSU), openpilot ACC will replace stock ACC. For DSU locations, see [Toyota Wiki page](https://community.comma.ai/wiki/index.php/Toyota). ***NOTE: disconnecting the DSU disables Automatic Emergency Braking (AEB).*** <br />
<sup>5</sup>[Comma Pedal](https://community.comma.ai/wiki/index.php/Comma_Pedal) is used to provide stop-and-go capability to some of the openpilot-supported cars that don't currently support stop-and-go. Here is how to [build a Comma Pedal](https://medium.com/@jfrux/comma-pedal-building-with-macrofab-6328bea791e8). ***NOTE: The Comma Pedal is not officially supported by [comma](https://comma.ai).*** <br />
<sup>6</sup>Requires a [panda](https://comma.ai/shop/products/panda-obd-ii-dongle) and [community built giraffe](https://zoneos.com/volt/). ***NOTE: disconnecting the ASCM disables Automatic Emergency Braking (AEB).*** <br />
I will do my best to respond to bug reports and feature requests in a timely manner, but please understand that I may not be able to address every request immediately. Your feedback and suggestions are valuable, and I appreciate your help in making FrogPilot the best it can be!
Community Maintained Cars and Features are not verified by comma to meet our [safety model](SAFETY.md). Be extra cautious using them. They are only available after enabling the toggle in `Settings->Developer->Enable Community Features`.
Discord
Installation Instructions
------
[Join the FrogPilot Community Discord!](https://discord.gg/frogpilot)
Install openpilot on a EON by entering ``https://openpilot.comma.ai`` during the installer setup.
Credits
Follow this [video instructions](https://youtu.be/3nlkomHathI) to properly mount the EON on the windshield. Note: openpilot features an automatic pose calibration routine and openpilot performance should not be affected by small pitch and yaw misalignments caused by imprecise EON mounting.
Before placing the device on your windshield, check the state and local laws and ordinances where you drive. Some state laws prohibit or restrict the placement of objects on the windshield of a motor vehicle.
You will be able to engage openpilot after reviewing the onboarding screens and finishing the calibration procedure.
Limitations of openpilot ALC and LDW
------
* [AlexandreSato](https://github.com/AlexandreSato)
* [Crwusiz](https://github.com/crwusiz)
* [DragonPilot](https://github.com/dragonpilot-community)
* [ErichMoraga](https://github.com/ErichMoraga)
* [Garrettpall](https://github.com/garrettpall)
* [Mike8643](https://github.com/mike8643)
* [Neokii](https://github.com/Neokii)
* [OPGM](https://github.com/opgm)
* [OPKR](https://github.com/openpilotkr)
* [Pfeiferj](https://github.com/pfeiferj)
* [ServerDummy](https://github.com/ServerDummy)
* [Twilsonco](https://github.com/twilsonco)
openpilot ALC and openpilot LDW do not automatically drive the vehicle or reduce the amount of attention that must be paid to operate your vehicle. The driver must always keep control of the steering wheel and be ready to correct the openpilot ALC action at all times.
While changing lanes, openpilot is not capable of looking next to you or checking your blind spot. Only nudge the wheel to initiate a lane change after you have confirmed it's safe to do so.
Many factors can impact the performance of openpilot ALC and openpilot LDW, causing them to be unable to function as intended. These include, but are not limited to:
* Poor visibility (heavy rain, snow, fog, etc.) or weather conditions that may interfere with sensor operation.
* The road facing camera is obstructed, covered or damaged by mud, ice, snow, etc.
* Obstruction caused by applying excessive paint or adhesive products (such as wraps, stickers, rubber coating, etc.) onto the vehicle.
* The EON is mounted incorrectly.
* When in sharp curves, like on-off ramps, intersections etc...; openpilot is designed to be limited in the amount of steering torque it can produce.
* In the presence of restricted lanes or construction zones.
* When driving on highly banked roads or in presence of strong cross-wind.
* Extremely hot or cold temperatures.
* Bright light (due to oncoming headlights, direct sunlight, etc.).
* Driving on hills, narrow, or winding roads.
The list above does not represent an exhaustive list of situations that may interfere with proper operation of openpilot components. It is the driver's responsibility to be in control of the vehicle at all times.
Limitations of openpilot ACC and FCW
------
openpilot ACC and openpilot FCW are not systems that allow careless or inattentive driving. It is still necessary for the driver to pay close attention to the vehicles surroundings and to be ready to re-take control of the gas and the brake at all times.
Many factors can impact the performance of openpilot ACC and openpilot FCW, causing them to be unable to function as intended. These include, but are not limited to:
* Poor visibility (heavy rain, snow, fog, etc.) or weather conditions that may interfere with sensor operation.
* The road facing camera or radar are obstructed, covered, or damaged by mud, ice, snow, etc.
* Obstruction caused by applying excessive paint or adhesive products (such as wraps, stickers, rubber coating, etc.) onto the vehicle.
* The EON is mounted incorrectly.
* Approaching a toll booth, a bridge or a large metal plate.
* When driving on roads with pedestrians, cyclists, etc...
* In presence of traffic signs or stop lights, which are not detected by openpilot at this time.
* When the posted speed limit is below the user selected set speed. openpilot does not detect speed limits at this time.
* In presence of vehicles in the same lane that are not moving.
* When abrupt braking maneuvers are required. openpilot is designed to be limited in the amount of deceleration and acceleration that it can produce.
* When surrounding vehicles perform close cut-ins from neighbor lanes.
* Driving on hills, narrow, or winding roads.
* Extremely hot or cold temperatures.
* Bright light (due to oncoming headlights, direct sunlight, etc.).
* Interference from other equipment that generates radar waves.
The list above does not represent an exhaustive list of situations that may interfere with proper operation of openpilot components. It is the driver's responsibility to be in control of the vehicle at all times.
Limitations of openpilot DM
------
openpilot DM should not be considered an exact measurements of the status of alertness of the driver.
Many factors can impact the performance of openpilot DM, causing it to be unable to function as intended. These include, but are not limited to:
* Low light conditions, such as driving at night or in dark tunnels.
* Bright light (due to oncoming headlights, direct sunlight, etc.).
* The driver face is partially or completely outside field of view of the driver facing camera.
* Right hand driving vehicles.
* The driver facing camera is obstructed, covered, or damaged.
The list above does not represent an exhaustive list of situations that may interfere with proper operation of openpilot components. A driver should not rely on openpilot DM to assess their level of attention.
User Data and comma Account
------
By default, openpilot uploads the driving data to our servers. You can also access your data by pairing with the comma connect app ([iOS](https://apps.apple.com/us/app/comma-connect/id1456551889), [Android](https://play.google.com/store/apps/details?id=ai.comma.connect&hl=en_US)). We use your data to train better models and improve openpilot for everyone.
openpilot is open source software: the user is free to disable data collection if they wish to do so.
openpilot logs the road facing camera, CAN, GPS, IMU, magnetometer, thermal sensors, crashes, and operating system logs.
The driver facing camera is only logged if you explicitly opt-in in settings. The microphone is not recorded.
By using openpilot, you agree to [our Privacy Policy](https://my.comma.ai/privacy). You understand that use of this software or its related services will generate certain types of user data, which may be logged and stored at the sole discretion of comma. By accepting this agreement, you grant an irrevocable, perpetual, worldwide right to comma for the use of this data.
Safety and Testing
----
* openpilot observes ISO26262 guidelines, see [SAFETY.md](SAFETY.md) for more detail.
* openpilot has software in the loop [tests](run_docker_tests.sh) that run on every commit.
* The safety model code lives in panda and is written in C, see [code rigor](https://github.com/commaai/panda#code-rigor) for more details.
* panda has software in the loop [safety tests](https://github.com/commaai/panda/tree/master/tests/safety).
* Internally, we have a hardware in the loop Jenkins test suite that builds and unit tests the various processes.
* panda has additional hardware in the loop [tests](https://github.com/commaai/panda/blob/master/Jenkinsfile).
* We run the latest openpilot in a testing closet containing 10 EONs continuously replaying routes.
Testing on PC
------
Check out the tools directory in master: lots of tools you can use to replay driving data, test and develop openpilot from your pc.
Community and Contributing
------
openpilot is developed by [comma](https://comma.ai/) and by users like you. We welcome both pull requests and issues on [GitHub](http://github.com/commaai/openpilot). Bug fixes and new car ports are encouraged.
You can add support for your car by following guides we have written for [Brand](https://medium.com/@comma_ai/how-to-write-a-car-port-for-openpilot-7ce0785eda84) and [Model](https://medium.com/@comma_ai/openpilot-port-guide-for-toyota-models-e5467f4b5fe6) ports. Generally, a car with adaptive cruise control and lane keep assist is a good candidate. [Join our Discord](https://discord.comma.ai) to discuss car ports: most car makes have a dedicated channel.
Want to get paid to work on openpilot? [comma is hiring](https://comma.ai/jobs/). We also have a [bounty program](https://comma.ai/bounties.html).
And [follow us on Twitter](https://twitter.com/comma_ai).
Directory Structure
------
.
├── apk # The apk files used for the UI
├── cereal # The messaging spec and libs used for all logs on EON
├── common # Library like functionality we've developed here
├── installer/updater # Manages auto-updates of openpilot
├── opendbc # Files showing how to interpret data from cars
├── panda # Code used to communicate on CAN
├── phonelibs # Libraries used on EON
├── pyextra # Libraries used on EON
└── selfdrive # Code needed to drive the car
├── assets # Fonts and images for UI
├── athena # Allows communication with the app
├── boardd # Daemon to talk to the board
├── camerad # Driver to capture images from the camera sensors
├── car # Car specific code to read states and control actuators
├── common # Shared C/C++ code for the daemons
├── controls # Perception, planning and controls
├── debug # Tools to help you debug and do car ports
├── locationd # Soon to be home of precise location
├── logcatd # Android logcat as a service
├── loggerd # Logger and uploader of car data
├── modeld # Driving and monitoring model runners
├── proclogd # Logs information from proc
├── sensord # IMU / GPS interface code
├── tests # Unit tests, system tests and a car simulator
└── ui # The UI
To understand how the services interact, see `cereal/service_list.yaml`.
Licensing
------
openpilot is released under the MIT license. Some parts of the software are released under other licenses as specified.
Any user of this software shall indemnify and hold harmless Comma.ai, Inc. and its directors, officers, employees, agents, stockholders, affiliates, subcontractors and customers from and against all allegations, claims, actions, suits, demands, damages, liabilities, obligations, losses, settlements, judgments, costs and expenses (including without limitation attorneys fees and costs) which arise out of, relate to or result from any use of this software by user.
Any user of this software shall indemnify and hold harmless comma.ai, Inc. and its directors, officers, employees, agents, stockholders, affiliates, subcontractors and customers from and against all allegations, claims, actions, suits, demands, damages, liabilities, obligations, losses, settlements, judgments, costs and expenses (including without limitation attorneys fees and costs) which arise out of, relate to or result from any use of this software by user.
**THIS IS ALPHA QUALITY SOFTWARE FOR RESEARCH PURPOSES ONLY. THIS IS NOT A PRODUCT.
YOU ARE RESPONSIBLE FOR COMPLYING WITH LOCAL LAWS AND REGULATIONS.
@@ -223,6 +304,3 @@ NO WARRANTY EXPRESSED OR IMPLIED.**
---
<img src="https://d1qb2nb5cznatu.cloudfront.net/startups/i/1061157-bc7e9bf3b246ece7322e6ffe653f6af8-medium_jpg.jpg?buster=1458363130" width="75"></img> <img src="https://cdn-images-1.medium.com/max/1600/1*C87EjxGeMPrkTuVRVWVg4w.png" width="225"></img>
![openpilot tests](https://github.com/commaai/openpilot/actions/workflows/selfdrive_tests.yaml/badge.svg)
[![codecov](https://codecov.io/gh/commaai/openpilot/branch/master/graph/badge.svg)](https://codecov.io/gh/commaai/openpilot)
+52 -566
View File
@@ -1,517 +1,3 @@
Version 0.9.7 (2024-XX-XX)
========================
* New driving model
* Adjust driving personality with the follow distance button
* Support for hybrid variants of supported Ford models
Version 0.9.6 (2024-02-27)
========================
* New driving model
* Vision model trained on more data
* Improved driving performance
* Directly outputs curvature for lateral control
* New driver monitoring model
* Trained on larger dataset
* Model path UI
* Shows where driving model wants to be
* Shows what model is seeing more clearly, but more jittery
* AGNOS 9
* comma body streaming and controls over WebRTC
* Improved fuzzy fingerprinting for many makes and models
* Alpha longitudinal support for new Toyota models
* Chevrolet Equinox 2019-22 support thanks to JasonJShuler and nworb-cire!
* Dodge Durango 2020-21 support
* Hyundai Staria 2023 support thanks to sunnyhaibin!
* Kia Niro Plug-in Hybrid 2022 support thanks to sunnyhaibin!
* Lexus LC 2024 support thanks to nelsonjchen!
* Toyota RAV4 2023-24 support
* Toyota RAV4 Hybrid 2023-24 support
Version 0.9.5 (2023-11-17)
========================
* New driving model
* Improved navigate on openpilot performance using navigation instructions as an additional model input
* Do lateral planning inside the model
* New vision transformer architecture
* Cadillac Escalade ESV 2019 support thanks to twilsonco!
* Hyundai Azera 2022 support thanks to sunnyhaibin!
* Hyundai Azera Hybrid 2020 support thanks to chanhojung and haram-KONA!
* Hyundai Custin 2023 support thanks to sunnyhaibin and Saber422!
* Hyundai Ioniq 6 2023 support thanks to sunnyhaibin and alamo3!
* Hyundai Kona Electric 2023 (Korean version) support thanks to sunnyhaibin and haram-KONA!
* Kia K8 Hybrid (with HDA II) 2023 support thanks to sunnyhaibin!
* Kia Optima Hybrid 2019 support
* Kia Sorento Hybrid 2023 support thanks to sunnyhaibin!
* Lexus GS F 2016 support thanks to snyperifle!
* Lexus IS 2023 support thanks to L3R5!
Version 0.9.4 (2023-07-27)
========================
* comma 3X support
* Navigate on openpilot in Experimental mode
* When navigation has a destination, openpilot will input the map information into the model, which provides useful context to help the model understand the scene
* When navigating on openpilot, openpilot will keep left or right appropriately at forks and exits
* When navigating on openpilot, lane change behavior is unchanged and still activated by the driver
* When navigate on openpilot is active, the path on the map is green
* UI updates
* Navigation settings moved to home screen and map
* Border color always shows engagement status. Blue means disengaged, green means engaged, and grey means engaged with human overriding
* Alerts are shown inside the border. Black means info, orange means warning, and red means critical alert
* Bookmarked segments are preserved on the device's storage
* Ford Focus 2018 support
* Kia Carnival 2023 support thanks to sunnyhaibin!
Version 0.9.3 (2023-06-29)
========================
* New driving model
* Improved height estimation and added height tracking in liveCalibration
* Model inputs refactor
* New driving personality setting
* Three settings: aggressive, standard, and relaxed
* Standard is recommended and the default
* In aggressive mode, lead follow distance is shorter and acceleration response is quicker
* In relaxed mode, lead follow distance is longer
* Improved fuzzy fingerprinting for Hyundai, Kia, and Genesis
* Improved thermal management logic
Version 0.9.2 (2023-05-22)
========================
* New driving model
* Reduced turn diving
* Trained on a new dataset
* UI updates
* New experimental mode visualization
* Draw MPC path instead of model-predicted path
* AGNOS 7
* Faster boot time
* Fixes rare no sounds bug
* Fixes bootsplash bug at extreme temperatures
* Buick LaCrosse 2017-19 support thanks to koch-cf!
* Chevrolet Trailblazer 2021-22 support thanks to TurboCE!
* Ford Bronco Sport 2021-22 support
* Ford Escape 2020-22 support
* Ford Explorer 2020-22 support
* Ford Kuga 2020-22 support
* Ford Maverick 2022-23 support
* Genesis GV80 2023 support thanks to JWingate80!
* Honda HR-V 2023 support thanks to AlexandreSato and galegozi!
* Kia Niro EV 2023 support thanks to JosselinLecocq!
* Lexus ES 2017-18 support
* Lincoln Aviator 2021 support
* Škoda Fabia 2022-23 support thanks to jyoung8607!
Version 0.9.1 (2023-02-28)
========================
* New driving model
* 30% improved height estimation resulting in better driving performance for tall cars
* Driver monitoring: removed timer resetting on user interaction if distracted
* UI updates
* Adjust alert volume using ambient noise level
* Driver monitoring icon shows driver's head pose
* German translation thanks to Vrabetz and CzokNorris!
* Cadillac Escalade 2017 support thanks to rickygilleland!
* Chevrolet Bolt EV 2022-23 support thanks to JasonJShuler!
* Genesis GV60 2023 support thanks to sunnyhaibin!
* Hyundai Tucson 2022-23 support
* Kia K5 Hybrid 2020 support thanks to sunnyhaibin!
* Kia Niro Hybrid 2023 support thanks to sunnyhaibin!
* Kia Sorento 2022-23 support thanks to sunnyhaibin!
* Kia Sorento Plug-in Hybrid 2022 support thanks to sunnyhaibin!
* Toyota C-HR 2021 support thanks to eFiniLan!
* Toyota C-HR Hybrid 2022 support thanks to Korben00!
* Volkswagen Crafter and MAN TGE 2017-23 support thanks to jyoung8607!
Version 0.9.0 (2022-11-21)
========================
* New driving model
* Internal feature space information content increased tenfold during training to ~700 bits, which makes the model dramatically more accurate
* Less reliance on previous frames makes model more reactive and snappy
* Trained in new reprojective simulator
* Trained in 36 hours from scratch, compared to one week for previous releases
* Training now simulates both lateral and longitudinal behavior, which allows openpilot to slow down for turns, stop at traffic lights, and more in experimental mode
* Experimental driving mode
* End-to-end longitudinal control
* Stops for traffic lights and stop signs
* Slows down for turns
* openpilot defaults to chill mode, enable experimental mode in settings
* Driver monitoring updates
* New bigger model with added end-to-end distracted trigger
* Reduced false positives during driver calibration
* Self-tuning torque controller: learns parameters live for each car
* Torque controller used on all Toyota, Lexus, Hyundai, Kia, and Genesis models
* UI updates
* Matched speeds shown on car's dash
* Multi-language in navigation
* Improved update experience
* Border turns grey while overriding steering
* Bookmark events while driving; view them in comma connect
* New onroad visualization for experimental mode
* tools: new and improved cabana thanks to deanlee!
* Experimental longitudinal support for Volkswagen, CAN-FD Hyundai, and new GM models
* Genesis GV70 2022-23 support thanks to zunichky and sunnyhaibin!
* Hyundai Santa Cruz 2021-22 support thanks to sunnyhaibin!
* Kia Sportage 2023 support thanks to sunnyhaibin!
* Kia Sportage Hybrid 2023 support thanks to sunnyhaibin!
* Kia Stinger 2022 support thanks to sunnyhaibin!
Version 0.8.16 (2022-08-26)
========================
* New driving model
* Reduced turn cutting
* Auto-detect right hand drive setting with driver monitoring model
* Improved fan controller for comma three
* New translations
* Japanese thanks to cydia2020!
* Brazilian Portuguese thanks to AlexandreSato!
* Chevrolet Bolt EUV 2022-23 support thanks to JasonJShuler!
* Chevrolet Silverado 1500 2020-21 support thanks to JasonJShuler!
* GMC Sierra 1500 2020-21 support thanks to JasonJShuler!
* Hyundai Ioniq 5 2022 support thanks to sunnyhaibin!
* Hyundai Kona Electric 2022 support thanks to sunnyhaibin!
* Hyundai Tucson Hybrid 2022 support thanks to sunnyhaibin!
* Subaru Legacy 2020-22 support thanks to martinl!
* Subaru Outback 2020-22 support
Version 0.8.15 (2022-07-20)
========================
* New driving model
* Path planning uses end-to-end output instead of lane lines at all times
* Reduced ping pong
* Improved lane centering
* New lateral controller based on physical wheel torque model
* Much smoother control that's consistent across the speed range
* Effective feedforward that uses road roll
* Simplified tuning, all car-specific parameters can be derived from data
* Used on select Toyota and Hyundai models at first
* Significantly improved control on TSS-P Prius
* New driver monitoring model
* Bigger model, covering full interior view from driver camera
* Works with a wider variety of mounting angles
* 3x more unique comma three training data than previous
* Navigation improvements
* Speed limits shown while navigating
* Faster position fix by using raw GPS measurements
* UI updates
* Multilanguage support for settings and home screen
* New font
* Refreshed max speed design
* More consistent camera view perspective across cars
* Reduced power usage: device runs cooler and fan spins less
* AGNOS 5
* Support VSCode remote SSH target
* Support for delta updates to reduce data usage on future OS updates
* Chrysler ECU firmware fingerprinting thanks to realfast!
* Honda Civic 2022 support
* Hyundai Tucson 2021 support thanks to bluesforte!
* Kia EV6 2022 support
* Lexus NX Hybrid 2020 support thanks to AlexandreSato!
* Ram 1500 2019-21 support thanks to realfast!
Version 0.8.14 (2022-06-01)
========================
* New driving model
* Bigger model, using both of comma three's road-facing cameras
* Better at cut-in detection and tight turns
* New driver monitoring model
* Tweaked network structure to improve output resolution for DSP
* Fixed bug in quantization aware training to reduce quantizing errors
* Resulted in 7x less MSE and no more random biases at runtime
* Added toggle to disable disengaging on the accelerator pedal
* comma body support
* Audi RS3 support thanks to jyoung8607!
* Hyundai Ioniq Plug-in Hybrid 2019 support thanks to sunnyhaibin!
* Hyundai Tucson Diesel 2019 support thanks to sunnyhaibin!
* Toyota Alphard Hybrid 2021 support
* Toyota Avalon Hybrid 2022 support
* Toyota RAV4 2022 support
* Toyota RAV4 Hybrid 2022 support
Version 0.8.13 (2022-02-18)
========================
* Improved driver monitoring
* Re-tuned driver pose learner for relaxed driving positions
* Added reliance on driving model to be more scene adaptive
* Matched strictness between comma two and comma three
* Improved performance in turns by compensating for the road bank angle
* Improved camera focus on the comma two
* AGNOS 4
* ADB support
* improved cell auto configuration
* NEOS 19
* package updates
* stability improvements
* Subaru ECU firmware fingerprinting thanks to martinl!
* Hyundai Santa Fe Plug-in Hybrid 2022 support thanks to sunnyhaibin!
* Mazda CX-5 2022 support thanks to Jafaral!
* Subaru Impreza 2020 support thanks to martinl!
* Toyota Avalon 2022 support thanks to sshane!
* Toyota Prius v 2017 support thanks to CT921!
* Volkswagen Caravelle 2020 support thanks to jyoung8607!
Version 0.8.12 (2021-12-15)
========================
* New driving model
* Improved behavior around exits
* Better pose accuracy at high speeds, allowing max speed of 90mph
* Fully incorporated comma three data into all parts of training stack
* Improved follow distance
* Better longitudinal policy, especially in low speed traffic
* New alert sounds
* AGNOS 3
* Display burn in mitigation
* Improved audio amplifier configuration
* System reliability improvements
* Update Python to 3.8.10
* Raw logs upload moved to connect.comma.ai
* Fixed HUD alerts on newer Honda Bosch thanks to csouers!
* Audi Q3 2020-21 support thanks to jyoung8607!
* Lexus RC 2020 support thanks to ErichMoraga!
Version 0.8.11 (2021-11-29)
========================
* Support for CAN FD on the red panda
* Support for an external panda on the comma three
* Navigation: Show more detailed instructions when approaching maneuver
* Fixed occasional steering faults on GM cars thanks to jyoung8607!
* Nissan ECU firmware fingerprinting thanks to robin-reckmann, martinl, and razem-io!
* Cadillac Escalade ESV 2016 support thanks to Gibby!
* Genesis G70 2020 support thanks to tecandrew!
* Hyundai Santa Fe Hybrid 2022 support thanks to sunnyhaibin!
* Mazda CX-9 2021 support thanks to Jacar!
* Volkswagen Polo 2020 support thanks to jyoung8607!
* Volkswagen T-Roc 2021 support thanks to jyoung8607!
Version 0.8.10 (2021-11-01)
========================
* New driving model
* Trained on one million minutes!!!
* Fixed lead training making lead predictions significantly more accurate
* Fixed several localizer dataset bugs and loss function bugs, overall improved accuracy
* New driver monitoring model
* Trained on latest data from both comma two and comma three
* Increased model field of view by 40% on comma three
* Improved model stability on masked users
* Improved pose prediction with reworked ground-truth stack
* Lateral and longitudinal planning MPCs now in ACADOS
* Combined longitudinal MPCs
* All longitudinal planning now happens in a single MPC system
* Fixed instability in MPC problem to prevent sporadic CPU usage
* AGNOS 2: minor stability improvements and builder repo open sourced
* tools: new and improved replay thanks to deanlee!
* Moved community-supported cars outside of the Community Features toggle
* Improved FW fingerprinting reliability for Hyundai/Kia/Genesis
* Added prerequisites for longitudinal control on Hyundai/Kia/Genesis and Honda Bosch
* Audi S3 2015 support thanks to jyoung8607!
* Honda Freed 2020 support thanks to belm0!
* Hyundai Ioniq Hybrid 2020-2022 support thanks to sunnyhaibin!
* Hyundai Santa Fe 2022 support thanks to sunnyhaibin!
* Kia K5 2021 support thanks to sunnyhaibin!
* Škoda Kamiq 2021 support thanks to jyoung8607!
* Škoda Karoq 2019 support thanks to jyoung8607!
* Volkswagen Arteon 2021 support thanks to jyoung8607!
* Volkswagen California 2021 support thanks to jyoung8607!
* Volkswagen Taos 2022 support thanks to jyoung8607!
Version 0.8.9 (2021-09-14)
========================
* Improved fan control on comma three
* AGNOS 1.5: improved stability
* Honda e 2020 support
Version 0.8.8 (2021-08-27)
========================
* New driving model with improved laneless performance
* Trained on 5000+ hours of diverse driving data from 3000+ users in 40+ countries
* Better anti-cheating methods during simulator training ensure the model hugs less when in laneless mode
* All new desire ground-truthing stack makes the model better at lane changes
* New driver monitoring model: improved performance on comma three
* NEOS 18 for comma two: update packages
* AGNOS 1.3 for comma three: fix display init at high temperatures
* Improved auto-exposure on comma three
* Improved longitudinal control on Honda Nidec cars
* Hyundai Kona Hybrid 2020 support thanks to haram-KONA!
* Hyundai Sonata Hybrid 2021 support thanks to Matt-Wash-Burn!
* Kia Niro Hybrid 2021 support thanks to tetious!
Version 0.8.7 (2021-07-31)
========================
* comma three support!
* Navigation alpha for the comma three!
* Volkswagen T-Cross 2021 support thanks to jyoung8607!
Version 0.8.6 (2021-07-21)
========================
* Revamp lateral and longitudinal planners
* Refactor planner output API to be more readable and verbose
* Planners now output desired trajectories for speed, acceleration, curvature, and curvature rate
* Use MPC for longitudinal planning when no lead car is present, makes accel and decel smoother
* Remove "CHECK DRIVER FACE VISIBILITY" warning
* Fixed cruise fault on some TSS2.5 Camrys and international Toyotas
* Hyundai Elantra Hybrid 2021 support thanks to tecandrew!
* Hyundai Ioniq PHEV 2020 support thanks to YawWashout!
* Kia Niro Hybrid 2019 support thanks to jyoung8607!
* Škoda Octavia RS 2016 support thanks to jyoung8607!
* Toyota Alphard 2020 support thanks to belm0!
* Volkswagen Golf SportWagen 2015 support thanks to jona96!
* Volkswagen Touran 2017 support thanks to jyoung8607!
Version 0.8.5 (2021-06-11)
========================
* NEOS update: improved reliability and stability with better voltage regulator configuration
* Smart model-based Forward Collision Warning
* CAN-based fingerprinting moved behind community features toggle
* Improved longitudinal control on Toyotas with a comma pedal
* Improved auto-brightness using road-facing camera
* Added "Software" settings page with updater controls
* Audi Q2 2018 support thanks to jyoung8607!
* Hyundai Elantra 2021 support thanks to CruiseBrantley!
* Lexus UX Hybrid 2019-2020 support thanks to brianhaugen2!
* Toyota Avalon Hybrid 2019 support thanks to jbates9011!
* SEAT Leon 2017 & 2020 support thanks to jyoung8607!
* Škoda Octavia 2015 & 2019 support thanks to jyoung8607!
Version 0.8.4 (2021-05-17)
========================
* Delay controls start until system is ready
* Fuzzy car identification, enabled with Community Features toggle
* Localizer optimized for increased precision and less CPU usage
* Re-tuned lateral control to be more aggressive when model is confident
* Toyota Mirai 2021 support
* Lexus NX 300 2020 support thanks to goesreallyfast!
* Volkswagen Atlas 2018-19 support thanks to jyoung8607!
Version 0.8.3 (2021-04-01)
========================
* New model
* Trained on new diverse dataset from 2000+ users from 30+ countries
* Trained with improved segnet from the comma-pencil community project
* 🥬 Dramatically improved end-to-end lateral performance 🥬
* Toggle added to disable the use of lanelines
* NEOS update: update packages and support for new UI
* New offroad UI based on Qt
* Default SSH key only used for setup
* Kia Ceed 2019 support thanks to ZanZaD13!
* Kia Seltos 2021 support thanks to speedking456!
* Added support for many Volkswagen and Škoda models thanks to jyoung8607!
Version 0.8.2 (2021-02-26)
========================
* Use model points directly in MPC (no more polyfits), making lateral planning more accurate
* Use model heading prediction for smoother lateral control
* Smarter actuator delay compensation
* Improve qcamera resolution for improved video in explorer and connect
* Adjust maximum engagement speed to better fit the model's training distribution
* New driver monitoring model trained with 3x more diverse data
* Improved face detection with masks
* More predictable DM alerts when visibility is bad
* Rewritten video streaming between openpilot processes
* Improved longitudinal tuning on TSS2 Corolla and Rav4 thanks to briskspirit!
* Audi A3 2015 and 2017 support thanks to keeleysam!
* Nissan Altima 2020 support thanks to avolmensky!
* Lexus ES Hybrid 2018 support thanks to TheInventorMan!
* Toyota Camry Hybrid 2021 support thanks to alancyau!
Version 0.8.1 (2020-12-21)
========================
* Original EON is deprecated, upgrade to comma two
* Better model performance in heavy rain
* Better lane positioning in turns
* Fixed bug where model would cut turns on empty roads at night
* Fixed issue where some Toyotas would not completely stop thanks to briskspirit!
* Toyota Camry 2021 with TSS2.5 support
* Hyundai Ioniq Electric 2020 support thanks to baldwalker!
Version 0.8.0 (2020-11-30)
========================
* New driving model: fully 3D and improved cut-in detection
* UI draws 2 road edges, 4 lanelines and paths in 3D
* Major fixes to cut-in detection for openpilot longitudinal
* Grey panda is no longer supported, upgrade to comma two or black panda
* Lexus NX 2018 support thanks to matt12eagles!
* Kia Niro EV 2020 support thanks to nickn17!
* Toyota Prius 2021 support thanks to rav4kumar!
* Improved lane positioning with uncertain lanelines, wide lanes and exits
* Improved lateral control for Prius and Subaru
Version 0.7.10 (2020-10-29)
========================
* Grey panda is deprecated, upgrade to comma two or black panda
* NEOS update: update to Python 3.8.2 and lower CPU frequency
* Improved thermals due to reduced CPU frequency
* Update SNPE to 1.41.0
* Reduced offroad power consumption
* Various system stability improvements
* Acura RDX 2020 support thanks to csouers!
Version 0.7.9 (2020-10-09)
========================
* Improved car battery power management
* Improved updater robustness
* Improved realtime performance
* Reduced UI and modeld lags
* Increased torque on 2020 Hyundai Sonata and Palisade
Version 0.7.8 (2020-08-19)
========================
* New driver monitoring model: improved face detection and better compatibility with sunglasses
* Download NEOS operating system updates in the background
* Improved updater reliability and responsiveness
* Hyundai Kona 2020, Veloster 2019, and Genesis G70 2018 support thanks to xps-genesis!
Version 0.7.7 (2020-07-20)
========================
* White panda is no longer supported, upgrade to comma two or black panda
* Improved vehicle model estimation using high precision localizer
* Improved thermal management on comma two
* Improved autofocus for road-facing camera
* Improved noise performance for driver-facing camera
* Block lane change start using blindspot monitor on select Toyota, Hyundai, and Subaru
* Fix GM ignition detection
* Code cleanup and smaller release sizes
* Hyundai Sonata 2020 promoted to officially supported car
* Hyundai Ioniq Electric Limited 2019 and Ioniq SE 2020 support thanks to baldwalker!
* Subaru Forester 2019 and Ascent 2019 support thanks to martinl!
Version 0.7.6.1 (2020-06-16)
========================
* Hotfix: update kernel on some comma twos (orders #8570-#8680)
Version 0.7.6 (2020-06-05)
========================
* White panda is deprecated, upgrade to comma two or black panda
* 2017 Nissan X-Trail, 2018-19 Leaf and 2019 Rogue support thanks to avolmensky!
* 2017 Mazda CX-5 support in dashcam mode thanks to Jafaral!
* Huge CPU savings in modeld by using thneed!
* Lots of code cleanup and refactors
Version 0.7.5 (2020-05-13)
========================
* Right-Hand Drive support for both driving and driver monitoring!
* New driving model: improved at sharp turns and lead speed estimation
* New driver monitoring model: overall improvement on comma two
* Driver camera preview in settings to improve mounting position
* Added support for many Hyundai, Kia, Genesis models thanks to xx979xx!
* Improved lateral tuning for 2020 Toyota Rav 4 (hybrid)
Version 0.7.4 (2020-03-20)
========================
* New driving model: improved lane changes and lead car detection
* Improved driver monitoring model: improve eye detection
* Improved calibration stability
* Improved lateral control on some 2019 and 2020 Toyota Prius
* Improved lateral control on VW Golf: 20% more steering torque
* Fixed bug where some 2017 and 2018 Toyota C-HR would use the wrong steering angle sensor
* Support for Honda Insight thanks to theantihero!
* Code cleanup in car abstraction layers and ui
Version 0.7.3 (2020-02-21)
========================
* Support for 2020 Highlander thanks to che220!
* Support for 2018 Lexus NX 300h thanks to kengggg!
* Speed up ECU firmware query
* Fix bug where manager would sometimes hang after shutting down the car
Version 0.7.2 (2020-02-07)
========================
* ECU firmware version based fingerprinting for Honda & Toyota
@@ -541,7 +27,7 @@ Version 0.7 (2019-12-13)
* Improve GM longitudinal control: proper computations for 15Hz radar
* Move GM port, Toyota with DSU removed, comma pedal in community features; toggle switch required
* Remove upload over cellular toggle: only upload qlog and qcamera files if not on wifi
* Refactor Panda code towards ISO26262 and SIL2 compliance
* Refactor Panda code towards ISO26262 and SIL2 compliancy
* Forward stock FCW for Honda Nidec
* Volkswagen port now standard: comma Harness intercepts stock camera
@@ -928,96 +414,96 @@ Version 0.3.4 (2017-07-28)
Version 0.3.3 (2017-06-28)
===========================
* Improved model trained on more data
* Alpha CR-V support thanks to energee and johnnwvs!
* Using the opendbc project for DBC files
* Minor performance improvements
* UI update thanks to pjlao307
* Power off button
* 6% more torque on the Civic
* Improved model trained on more data
* Alpha CR-V support thanks to energee and johnnwvs!
* Using the opendbc project for DBC files
* Minor performance improvements
* UI update thanks to pjlao307
* Power off button
* 6% more torque on the Civic
Version 0.3.2 (2017-05-22)
===========================
* Minor stability bugfixes
* Added metrics and rear view mirror disable to settings
* Update model with more crowdsourced data
* Minor stability bugfixes
* Added metrics and rear view mirror disable to settings
* Update model with more crowdsourced data
Version 0.3.1 (2017-05-17)
===========================
* visiond stability bugfix
* Add logging for angle and flashing
* visiond stability bugfix
* Add logging for angle and flashing
Version 0.3.0 (2017-05-12)
===========================
* Add CarParams struct to improve the abstraction layer
* Refactor visiond IPC to support multiple clients
* Add raw GPS and beginning support for navigation
* Improve model in visiond using crowdsourced data
* Add improved system logging to diagnose instability
* Rewrite baseui in React Native
* Moved calibration to the cloud
* Add CarParams struct to improve the abstraction layer
* Refactor visiond IPC to support multiple clients
* Add raw GPS and beginning support for navigation
* Improve model in visiond using crowdsourced data
* Add improved system logging to diagnose instability
* Rewrite baseui in React Native
* Moved calibration to the cloud
Version 0.2.9 (2017-03-01)
===========================
* Retain compatibility with NEOS v1
* Retain compatibility with NEOS v1
Version 0.2.8 (2017-02-27)
===========================
* Fix bug where frames were being dropped in minute 71
* Fix bug where frames were being dropped in minute 71
Version 0.2.7 (2017-02-08)
===========================
* Better performance and pictures at night
* Fix ptr alignment issue in boardd
* Fix brake error light, fix crash if too cold
* Better performance and pictures at night
* Fix ptr alignment issue in boardd
* Fix brake error light, fix crash if too cold
Version 0.2.6 (2017-01-31)
===========================
* Fix bug in visiond model execution
* Fix bug in visiond model execution
Version 0.2.5 (2017-01-30)
===========================
* Fix race condition in manager
* Fix race condition in manager
Version 0.2.4 (2017-01-27)
===========================
* OnePlus 3T support
* Enable installation as NEOS app
* Various minor bugfixes
* OnePlus 3T support
* Enable installation as NEOS app
* Various minor bugfixes
Version 0.2.3 (2017-01-11)
===========================
* Reduce space usage by 80%
* Add better logging
* Add Travis CI
* Reduce space usage by 80%
* Add better logging
* Add Travis CI
Version 0.2.2 (2017-01-10)
===========================
* Board triggers started signal on CAN messages
* Improved autoexposure
* Handle out of space, improve upload status
* Board triggers started signal on CAN messages
* Improved autoexposure
* Handle out of space, improve upload status
Version 0.2.1 (2016-12-14)
===========================
* Performance improvements, removal of more numpy
* Fix boardd process priority
* Make counter timer reset on use of steering wheel
* Performance improvements, removal of more numpy
* Fix boardd process priority
* Make counter timer reset on use of steering wheel
Version 0.2 (2016-12-12)
=========================
* Car/Radar abstraction layers have shipped, see cereal/car.capnp
* controlsd has been refactored
* Shipped plant model and testing maneuvers
* visiond exits more gracefully now
* Hardware encoder in visiond should always init
* ui now turns off the screen after 30 seconds
* Switch to openpilot release branch for future releases
* Added preliminary Docker container to run tests on PC
* Car/Radar abstraction layers have shipped, see cereal/car.capnp
* controlsd has been refactored
* Shipped plant model and testing maneuvers
* visiond exits more gracefully now
* Hardware encoder in visiond should always init
* ui now turns off the screen after 30 seconds
* Switch to openpilot release branch for future releases
* Added preliminary Docker container to run tests on PC
Version 0.1 (2016-11-29)
=========================
* Initial release of openpilot
* Adaptive cruise control is working
* Lane keep assist is working
* Support for Acura ILX 2016 with AcuraWatch Plus
* Support for Honda Civic 2016 Touring Edition
* Initial release of openpilot
* Adaptive cruise control is working
* Lane keep assist is working
* Support for Acura ILX 2016 with AcuraWatch Plus
* Support for Honda Civic 2016 Touring Edition
+34
View File
@@ -0,0 +1,34 @@
openpilot Safety
======
openpilot is an Adaptive Cruise Control (ACC) and Automated Lane Centering (ALC) system.
Like other ACC and ALC systems, openpilot is a failsafe passive system and it requires the
driver to be alert and to pay attention at all times.
In order to enforce driver alertness, openpilot includes a driver monitoring feature
that alerts the driver when distracted.
However, even with an attentive driver, we must make further efforts for the system to be
safe. We repeat, **driver alertness is necessary, but not sufficient, for openpilot to be
used safely** and openpilot is provided with no warranty of fitness for any purpose.
openpilot is developed in good faith to be compliant with FMVSS requirements and to follow
industry standards of safety for Level 2 Driver Assistance Systems. In particular, we observe
ISO26262 guidelines, including those from [pertinent documents](https://www.nhtsa.gov/sites/nhtsa.dot.gov/files/documents/13498a_812_573_alcsystemreport.pdf)
released by NHTSA. In addition, we impose strict coding guidelines (like [MISRA C : 2012](https://www.misra.org.uk/MISRAHome/MISRAC2012/tabid/196/Default.aspx))
on parts of openpilot that are safety relevant. We also perform software-in-the-loop,
hardware-in-the-loop and in-vehicle tests before each software release.
Following Hazard and Risk Analysis and FMEA, at a very high level, we have designed openpilot
ensuring two main safety requirements.
1. The driver must always be capable to immediately retake manual control of the vehicle,
by stepping on either pedal or by pressing the cancel button.
2. The vehicle must not alter its trajectory too quickly for the driver to safely
react. This means that while the system is engaged, the actuators are constrained
to operate within reasonable limits.
For vehicle specific implementation of the safety concept, refer to `panda/board/safety/`.
**Extra note**: comma.ai strongly discourages the use of openpilot forks with safety code either missing or
not fully meeting the above requirements.
+148 -312
View File
@@ -1,181 +1,98 @@
import os
import subprocess
import sys
import sysconfig
import platform
import numpy as np
import SCons.Errors
SCons.Warnings.warningAsException(True)
# pending upstream fix - https://github.com/SCons/scons/issues/4461
#SetOption('warn', 'all')
TICI = os.path.isfile('/TICI')
AGNOS = TICI
Decider('MD5-timestamp')
SetOption('num_jobs', int(os.cpu_count()/2))
AddOption('--kaitai',
AddOption('--test',
action='store_true',
help='Regenerate kaitai struct parsers')
help='build test files')
AddOption('--asan',
action='store_true',
help='turn on ASAN')
AddOption('--ubsan',
action='store_true',
help='turn on UBSan')
AddOption('--coverage',
action='store_true',
help='build with test coverage options')
AddOption('--clazy',
action='store_true',
help='build with clazy')
AddOption('--compile_db',
action='store_true',
help='build clang compilation database')
AddOption('--ccflags',
action='store',
type='string',
default='',
help='pass arbitrary flags over the command line')
AddOption('--snpe',
action='store_true',
help='use SNPE on PC')
AddOption('--external-sconscript',
action='store',
metavar='FILE',
dest='external_sconscript',
help='add an external SConscript to the build')
AddOption('--pc-thneed',
action='store_true',
dest='pc_thneed',
help='use thneed on pc')
AddOption('--minimal',
action='store_false',
dest='extras',
default=os.path.islink(Dir('#rednose/').abspath), # minimal by default on release branch (where rednose is not a link)
help='the minimum build to run openpilot. no tests, tools, etc.')
## Architecture name breakdown (arch)
## - larch64: linux tici aarch64
## - aarch64: linux pc aarch64
## - x86_64: linux pc x64
## - Darwin: mac x64 or arm64
real_arch = arch = subprocess.check_output(["uname", "-m"], encoding='utf8').rstrip()
arch = subprocess.check_output(["uname", "-m"], encoding='utf8').rstrip()
if platform.system() == "Darwin":
arch = "Darwin"
brew_prefix = subprocess.check_output(['brew', '--prefix'], encoding='utf8').strip()
elif arch == "aarch64" and AGNOS:
arch = "larch64"
assert arch in ["larch64", "aarch64", "x86_64", "Darwin"]
lenv = {
"PATH": os.environ['PATH'],
"LD_LIBRARY_PATH": [Dir(f"#third_party/acados/{arch}/lib").abspath],
"PYTHONPATH": Dir("#").abspath + ':' + Dir(f"#third_party/acados").abspath,
if arch == "aarch64":
lenv = {
"LD_LIBRARY_PATH": '/data/data/com.termux/files/usr/lib',
"PATH": os.environ['PATH'],
"ANDROID_DATA": os.environ['ANDROID_DATA'],
"ANDROID_ROOT": os.environ['ANDROID_ROOT'],
}
"ACADOS_SOURCE_DIR": Dir("#third_party/acados").abspath,
"ACADOS_PYTHON_INTERFACE_PATH": Dir("#third_party/acados/acados_template").abspath,
"TERA_PATH": Dir("#").abspath + f"/third_party/acados/{arch}/t_renderer"
}
rpath = lenv["LD_LIBRARY_PATH"].copy()
if arch == "larch64":
cpppath = [
"#third_party/opencl/include",
"#phonelibs/opencl/include",
]
libpath = [
"/usr/local/lib",
"#phonelibs/snpe/aarch64-android-clang3.8",
"/usr/lib",
"/data/data/com.termux/files/usr/lib",
"/system/vendor/lib64",
f"#third_party/acados/{arch}/lib",
"/system/comma/usr/lib",
"#phonelibs/nanovg",
"#phonelibs/libyuv/lib",
]
libpath += [
"#third_party/snpe/larch64",
"#third_party/libyuv/larch64/lib",
"/usr/lib/aarch64-linux-gnu"
]
cflags = ["-DQCOM2", "-mcpu=cortex-a57"]
cxxflags = ["-DQCOM2", "-mcpu=cortex-a57"]
rpath += ["/usr/local/lib"]
cflags = ["-DQCOM", "-mcpu=cortex-a57"]
cxxflags = ["-DQCOM", "-mcpu=cortex-a57"]
rpath = ["/system/vendor/lib64"]
else:
cflags = []
cxxflags = []
cpppath = []
rpath += []
lenv = {
"PATH": "#external/bin:" + os.environ['PATH'],
}
cpppath = [
"#phonelibs/capnp-cpp/include",
"#phonelibs/capnp-c/include",
"#phonelibs/zmq/x64/include",
"#external/tensorflow/include",
]
# MacOS
if arch == "Darwin":
libpath = [
f"#third_party/libyuv/{arch}/lib",
f"#third_party/acados/{arch}/lib",
f"{brew_prefix}/lib",
f"{brew_prefix}/opt/openssl@3.0/lib",
"#phonelibs/capnp-cpp/mac/lib",
"#phonelibs/capnp-c/mac/lib",
"#phonelibs/libyuv/mac/lib",
"#cereal",
"#selfdrive/common",
"/usr/local/lib",
"/System/Library/Frameworks/OpenGL.framework/Libraries",
]
cflags += ["-DGL_SILENCE_DEPRECATION"]
cxxflags += ["-DGL_SILENCE_DEPRECATION"]
cpppath += [
f"{brew_prefix}/include",
f"{brew_prefix}/opt/openssl@3.0/include",
]
lenv["DYLD_LIBRARY_PATH"] = lenv["LD_LIBRARY_PATH"]
# Linux
else:
libpath = [
f"#third_party/acados/{arch}/lib",
f"#third_party/libyuv/{arch}/lib",
"#phonelibs/capnp-cpp/x64/lib",
"#phonelibs/capnp-c/x64/lib",
"#phonelibs/snpe/x86_64-linux-clang",
"#phonelibs/zmq/x64/lib",
"#phonelibs/libyuv/x64/lib",
"#external/zmq/lib",
"#external/tensorflow/lib",
"#cereal",
"#selfdrive/common",
"/usr/lib",
"/usr/local/lib",
]
if arch == "x86_64":
libpath += [
f"#third_party/snpe/{arch}"
]
rpath += [
Dir(f"#third_party/snpe/{arch}").abspath,
]
rpath = ["phonelibs/capnp-cpp/x64/lib",
"phonelibs/zmq/x64/lib",
"external/tensorflow/lib",
"cereal",
"selfdrive/common"]
if GetOption('asan'):
ccflags = ["-fsanitize=address", "-fno-omit-frame-pointer"]
ldflags = ["-fsanitize=address"]
elif GetOption('ubsan'):
ccflags = ["-fsanitize=undefined"]
ldflags = ["-fsanitize=undefined"]
else:
ccflags = []
ldflags = []
# allows shared libraries to work globally
rpath = [os.path.join(os.getcwd(), x) for x in rpath]
# no --as-needed on mac linker
if arch != "Darwin":
ldflags += ["-Wl,--as-needed", "-Wl,--no-undefined"]
cflags = []
cxxflags = []
# Enable swaglog include in submodules
cflags += ['-DSWAGLOG="\\"common/swaglog.h\\""']
cxxflags += ['-DSWAGLOG="\\"common/swaglog.h\\""']
ccflags_asan = ["-fsanitize=address", "-fno-omit-frame-pointer"] if GetOption('asan') else []
ldflags_asan = ["-fsanitize=address"] if GetOption('asan') else []
ccflags_option = GetOption('ccflags')
if ccflags_option:
ccflags += ccflags_option.split(' ')
# change pythonpath to this
lenv["PYTHONPATH"] = Dir("#").path
env = Environment(
ENV=lenv,
@@ -183,71 +100,59 @@ env = Environment(
"-g",
"-fPIC",
"-O2",
"-Wunused",
"-Werror",
"-Wshadow",
"-Wno-unknown-warning-option",
"-Wno-deprecated-register",
"-Wno-register",
"-Wno-inconsistent-missing-override",
"-Wno-c99-designator",
"-Wno-reorder-init-list",
"-Wno-error=unused-but-set-variable",
] + cflags + ccflags,
"-Werror=implicit-function-declaration",
"-Werror=incompatible-pointer-types",
"-Werror=int-conversion",
"-Werror=return-type",
"-Werror=format-extra-args",
] + cflags + ccflags_asan,
CPPPATH=cpppath + [
"#",
"#third_party/acados/include",
"#third_party/acados/include/blasfeo/include",
"#third_party/acados/include/hpipm/include",
"#third_party/catch2/include",
"#third_party/libyuv/include",
"#third_party/json11",
"#third_party/linux/include",
"#third_party/snpe/include",
"#third_party/qrcode",
"#third_party",
"#selfdrive",
"#phonelibs/bzip2",
"#phonelibs/libyuv/include",
"#phonelibs/openmax/include",
"#phonelibs/json/src",
"#phonelibs/json11",
"#phonelibs/eigen",
"#phonelibs/curl/include",
"#phonelibs/opencv/include",
"#phonelibs/libgralloc/include",
"#phonelibs/android_frameworks_native/include",
"#phonelibs/android_hardware_libhardware/include",
"#phonelibs/android_system_core/include",
"#phonelibs/linux/include",
"#phonelibs/snpe/include",
"#phonelibs/nanovg",
"#selfdrive/common",
"#selfdrive/camerad",
"#selfdrive/camerad/include",
"#selfdrive/loggerd/include",
"#selfdrive/modeld",
"#cereal/messaging",
"#cereal",
"#opendbc/can",
"#third_party/maplibre-native-qt/include",
f"#third_party/maplibre-native-qt/{arch}/include"
],
CC='clang',
CXX='clang++',
LINKFLAGS=ldflags,
LINKFLAGS=ldflags_asan,
RPATH=rpath,
CFLAGS=["-std=gnu11"] + cflags,
CXXFLAGS=["-std=c++1z"] + cxxflags,
LIBPATH=libpath + [
CXXFLAGS=["-std=c++14"] + cxxflags,
LIBPATH=libpath +
[
"#cereal",
"#third_party",
"#opendbc/can",
"#selfdrive/boardd",
"#common",
"#rednose/helpers",
],
CYTHONCFILESUFFIX=".cpp",
COMPILATIONDB_USE_ABSPATH=True,
REDNOSE_ROOT="#",
tools=["default", "cython", "compilation_db", "rednose_filter"],
toolpath=["#rednose_repo/site_scons/site_tools"],
"#selfdrive/common",
"#phonelibs",
]
)
if arch == "Darwin":
# RPATH is not supported on macOS, instead use the linker flags
darwin_rpath_link_flags = [f"-Wl,-rpath,{path}" for path in env["RPATH"]]
env["LINKFLAGS"] += darwin_rpath_link_flags
if GetOption('compile_db'):
env.CompilationDatabase('compile_commands.json')
# Setup cache dir
cache_dir = '/data/scons_cache' if AGNOS else '/tmp/scons_cache'
CacheDir(cache_dir)
Clean(["."], cache_dir)
if os.environ.get('SCONS_CACHE'):
CacheDir('/tmp/scons_cache')
node_interval = 5
node_count = 0
@@ -259,138 +164,69 @@ def progress_function(node):
if os.environ.get('SCONS_PROGRESS'):
Progress(progress_function, interval=node_interval)
# Cython build environment
py_include = sysconfig.get_paths()['include']
envCython = env.Clone()
envCython["CPPPATH"] += [py_include, np.get_include()]
envCython["CCFLAGS"] += ["-Wno-#warnings", "-Wno-shadow", "-Wno-deprecated-declarations"]
envCython["CCFLAGS"].remove("-Werror")
SHARED = False
envCython["LIBS"] = []
if arch == "Darwin":
envCython["LINKFLAGS"] = ["-bundle", "-undefined", "dynamic_lookup"] + darwin_rpath_link_flags
else:
envCython["LINKFLAGS"] = ["-pthread", "-shared"]
def abspath(x):
if arch == 'aarch64':
pth = os.path.join("/data/pythonpath", x[0].path)
env.Depends(pth, x)
return File(pth)
else:
# rpath works elsewhere
return x[0].path.rsplit("/", 1)[1][:-3]
Export('envCython')
#zmq = 'zmq'
# still needed for apks
zmq = FindFile("libzmq.a", libpath)
Export('env', 'arch', 'zmq', 'SHARED')
# Qt build environment
qt_env = env.Clone()
qt_modules = ["Widgets", "Gui", "Core", "Network", "Concurrent", "Multimedia", "Quick", "Qml", "QuickWidgets", "Location", "Positioning", "DBus", "Xml"]
qt_libs = []
if arch == "Darwin":
qt_env['QTDIR'] = f"{brew_prefix}/opt/qt@5"
qt_dirs = [
os.path.join(qt_env['QTDIR'], "include"),
]
qt_dirs += [f"{qt_env['QTDIR']}/include/Qt{m}" for m in qt_modules]
qt_env["LINKFLAGS"] += ["-F" + os.path.join(qt_env['QTDIR'], "lib")]
qt_env["FRAMEWORKS"] += [f"Qt{m}" for m in qt_modules] + ["OpenGL"]
qt_env.AppendENVPath('PATH', os.path.join(qt_env['QTDIR'], "bin"))
else:
qt_install_prefix = subprocess.check_output(['qmake', '-query', 'QT_INSTALL_PREFIX'], encoding='utf8').strip()
qt_install_headers = subprocess.check_output(['qmake', '-query', 'QT_INSTALL_HEADERS'], encoding='utf8').strip()
qt_env['QTDIR'] = qt_install_prefix
qt_dirs = [
f"{qt_install_headers}",
]
qt_gui_path = os.path.join(qt_install_headers, "QtGui")
qt_gui_dirs = [d for d in os.listdir(qt_gui_path) if os.path.isdir(os.path.join(qt_gui_path, d))]
qt_dirs += [f"{qt_install_headers}/QtGui/{qt_gui_dirs[0]}/QtGui", ] if qt_gui_dirs else []
qt_dirs += [f"{qt_install_headers}/Qt{m}" for m in qt_modules]
qt_libs = [f"Qt5{m}" for m in qt_modules]
if arch == "larch64":
qt_libs += ["GLESv2", "wayland-client"]
qt_env.PrependENVPath('PATH', Dir("#third_party/qt5/larch64/bin/").abspath)
elif arch != "Darwin":
qt_libs += ["GL"]
qt_env['QT3DIR'] = qt_env['QTDIR']
# compatibility for older SCons versions
try:
qt_env.Tool('qt3')
except SCons.Errors.UserError:
qt_env.Tool('qt')
qt_env['CPPPATH'] += qt_dirs# + ["#selfdrive/ui/qt/"]
qt_flags = [
"-D_REENTRANT",
"-DQT_NO_DEBUG",
"-DQT_WIDGETS_LIB",
"-DQT_GUI_LIB",
"-DQT_QUICK_LIB",
"-DQT_QUICKWIDGETS_LIB",
"-DQT_QML_LIB",
"-DQT_CORE_LIB",
"-DQT_MESSAGELOGCONTEXT",
]
qt_env['CXXFLAGS'] += qt_flags
qt_env['LIBPATH'] += ['#selfdrive/ui', f"#third_party/maplibre-native-qt/{arch}/lib"]
qt_env['RPATH'] += [Dir(f"#third_party/maplibre-native-qt/{arch}/lib").srcnode().abspath]
qt_env['LIBS'] = qt_libs
if GetOption("clazy"):
checks = [
"level0",
"level1",
"no-range-loop",
"no-non-pod-global-static",
]
qt_env['CXX'] = 'clazy'
qt_env['ENV']['CLAZY_IGNORE_DIRS'] = qt_dirs[0]
qt_env['ENV']['CLAZY_CHECKS'] = ','.join(checks)
Export('env', 'qt_env', 'arch', 'real_arch')
# Build common module
SConscript(['common/SConscript'])
Import('_common', '_gpucommon')
common = [_common, 'json11']
gpucommon = [_gpucommon]
Export('common', 'gpucommon')
# Build cereal and messaging
# cereal and messaging are shared with the system
SConscript(['cereal/SConscript'])
if SHARED:
cereal = abspath([File('cereal/libcereal_shared.so')])
messaging = abspath([File('cereal/libmessaging_shared.so')])
else:
cereal = [File('#cereal/libcereal.a')]
messaging = [File('#cereal/libmessaging.a')]
Export('cereal', 'messaging')
# Build other submodules
SConscript([
'body/board/SConscript',
'opendbc/can/SConscript',
'panda/SConscript',
])
SConscript(['selfdrive/common/SConscript'])
Import('_common', '_visionipc', '_gpucommon', '_gpu_libs')
# Build rednose library
SConscript(['rednose/SConscript'])
if SHARED:
common, visionipc, gpucommon = abspath(common), abspath(visionipc), abspath(gpucommon)
else:
common = [_common, 'json']
visionipc = _visionipc
gpucommon = [_gpucommon] + _gpu_libs
Export('common', 'visionipc', 'gpucommon')
SConscript(['opendbc/can/SConscript'])
SConscript(['common/SConscript'])
SConscript(['common/kalman/SConscript'])
SConscript(['phonelibs/SConscript'])
# Build system services
SConscript([
'system/proclogd/SConscript',
'system/ubloxd/SConscript',
'system/loggerd/SConscript',
])
if arch != "Darwin":
SConscript([
'system/camerad/SConscript',
'system/sensord/SConscript',
'system/logcatd/SConscript',
])
SConscript(['selfdrive/camerad/SConscript'])
SConscript(['selfdrive/modeld/SConscript'])
# Build openpilot
SConscript(['third_party/SConscript'])
SConscript(['selfdrive/controls/lib/cluster/SConscript'])
SConscript(['selfdrive/controls/lib/lateral_mpc/SConscript'])
SConscript(['selfdrive/controls/lib/longitudinal_mpc/SConscript'])
SConscript(['selfdrive/SConscript'])
SConscript(['selfdrive/boardd/SConscript'])
SConscript(['selfdrive/proclogd/SConscript'])
if Dir('#tools/cabana/').exists() and GetOption('extras'):
SConscript(['tools/replay/SConscript'])
if arch != "larch64":
SConscript(['tools/cabana/SConscript'])
SConscript(['selfdrive/ui/SConscript'])
SConscript(['selfdrive/loggerd/SConscript'])
external_sconscript = GetOption('external_sconscript')
if external_sconscript:
SConscript([external_sconscript])
if arch == "aarch64":
SConscript(['selfdrive/logcatd/SConscript'])
SConscript(['selfdrive/sensord/SConscript'])
SConscript(['selfdrive/clocksd/SConscript'])
SConscript(['selfdrive/locationd/SConscript'])
# TODO: finish cereal, dbcbuilder, MPC
+3
View File
@@ -0,0 +1,3 @@
Place apks here that you want to be installed with the name <app>.apk
These won't be committed into one, but for now baseui will ship with openpilot.
+3
View File
@@ -0,0 +1,3 @@
version https://git-lfs.github.com/spec/v1
oid sha256:309b46b7c38f10da52b18b0340eb3c57b633558a9a27c3ca4116474969ebb456
size 84675
+3
View File
@@ -0,0 +1,3 @@
version https://git-lfs.github.com/spec/v1
oid sha256:d563bc9d43408f78d859538b50999cd7703487bdbe1fba1b11a3810205cd26c4
size 2856327
+3
View File
@@ -0,0 +1,3 @@
version https://git-lfs.github.com/spec/v1
oid sha256:7513530cf08df553395f3fbe9066c42993a34e445924f0aa3e3182c68dce25a3
size 13642104
Submodule
+1
Submodule apks added at d4f4f07a15
-15
View File
@@ -1,15 +0,0 @@
*.pyc
.*.swp
.*.swo
*.o
*.so
*.os
*.d
*.dump
a.out
*~
.#*
.vscode*
.DS_Store
board/obj/
.sconsign.dblite
File diff suppressed because it is too large Load Diff
-386
View File
@@ -1,386 +0,0 @@
/*
* File: BLDC_controller_data.c
*
* Code generated for Simulink model 'BLDC_controller'.
*
* Model version : 1.1297
* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
* C/C++ source code generated on : Sun Mar 6 11:02:11 2022
*
* Target selection: ert.tlc
* Embedded hardware selection: ARM Compatible->ARM Cortex
* Emulation hardware selection:
* Differs from embedded hardware (MATLAB Host)
* Code generation objectives:
* 1. Execution efficiency
* 2. RAM efficiency
* Validation result: Not run
*/
#include "BLDC_controller.h"
/* Constant parameters (auto storage) */
const ConstP rtConstP = {
/* Computed Parameter: r_sin_M1_Table
* Referenced by: '<S52>/r_sin_M1'
*/
{ 8192, 8682, 9162, 9630, 10087, 10531, 10963, 11381, 11786, 12176, 12551,
12911, 13255, 13583, 13894, 14189, 14466, 14726, 14968, 15191, 15396, 15582,
15749, 15897, 16026, 16135, 16225, 16294, 16344, 16374, 16384, 16374, 16344,
16294, 16225, 16135, 16026, 15897, 15749, 15582, 15396, 15191, 14968, 14726,
14466, 14189, 13894, 13583, 13255, 12911, 12551, 12176, 11786, 11381, 10963,
10531, 10087, 9630, 9162, 8682, 8192, 7692, 7182, 6664, 6138, 5604, 5063,
4516, 3964, 3406, 2845, 2280, 1713, 1143, 572, 0, -572, -1143, -1713, -2280,
-2845, -3406, -3964, -4516, -5063, -5604, -6138, -6664, -7182, -7692, -8192,
-8682, -9162, -9630, -10087, -10531, -10963, -11381, -11786, -12176, -12551,
-12911, -13255, -13583, -13894, -14189, -14466, -14726, -14968, -15191,
-15396, -15582, -15749, -15897, -16026, -16135, -16225, -16294, -16344,
-16374, -16384, -16374, -16344, -16294, -16225, -16135, -16026, -15897,
-15749, -15582, -15396, -15191, -14968, -14726, -14466, -14189, -13894,
-13583, -13255, -12911, -12551, -12176, -11786, -11381, -10963, -10531,
-10087, -9630, -9162, -8682, -8192, -7692, -7182, -6664, -6138, -5604, -5063,
-4516, -3964, -3406, -2845, -2280, -1713, -1143, -572, 0, 572, 1143, 1713,
2280, 2845, 3406, 3964, 4516, 5063, 5604, 6138, 6664, 7182, 7692, 8192 },
/* Computed Parameter: r_cos_M1_Table
* Referenced by: '<S52>/r_cos_M1'
*/
{ 14189, 13894, 13583, 13255, 12911, 12551, 12176, 11786, 11381, 10963, 10531,
10087, 9630, 9162, 8682, 8192, 7692, 7182, 6664, 6138, 5604, 5063, 4516,
3964, 3406, 2845, 2280, 1713, 1143, 572, 0, -572, -1143, -1713, -2280, -2845,
-3406, -3964, -4516, -5063, -5604, -6138, -6664, -7182, -7692, -8192, -8682,
-9162, -9630, -10087, -10531, -10963, -11381, -11786, -12176, -12551, -12911,
-13255, -13583, -13894, -14189, -14466, -14726, -14968, -15191, -15396,
-15582, -15749, -15897, -16026, -16135, -16225, -16294, -16344, -16374,
-16384, -16374, -16344, -16294, -16225, -16135, -16026, -15897, -15749,
-15582, -15396, -15191, -14968, -14726, -14466, -14189, -13894, -13583,
-13255, -12911, -12551, -12176, -11786, -11381, -10963, -10531, -10087,
-9630, -9162, -8682, -8192, -7692, -7182, -6664, -6138, -5604, -5063, -4516,
-3964, -3406, -2845, -2280, -1713, -1143, -572, 0, 572, 1143, 1713, 2280,
2845, 3406, 3964, 4516, 5063, 5604, 6138, 6664, 7182, 7692, 8192, 8682, 9162,
9630, 10087, 10531, 10963, 11381, 11786, 12176, 12551, 12911, 13255, 13583,
13894, 14189, 14466, 14726, 14968, 15191, 15396, 15582, 15749, 15897, 16026,
16135, 16225, 16294, 16344, 16374, 16384, 16374, 16344, 16294, 16225, 16135,
16026, 15897, 15749, 15582, 15396, 15191, 14968, 14726, 14466, 14189 },
/* Computed Parameter: r_sin3PhaA_M1_Table
* Referenced by: '<S96>/r_sin3PhaA_M1'
*/
{ -13091, -13634, -14126, -14565, -14953, -15289, -15577, -15816, -16009,
-16159, -16269, -16340, -16377, -16383, -16362, -16317, -16253, -16172,
-16079, -15977, -15870, -15762, -15656, -15555, -15461, -15377, -15306,
-15248, -15206, -15180, -15172, -15180, -15206, -15248, -15306, -15377,
-15461, -15555, -15656, -15762, -15870, -15977, -16079, -16172, -16253,
-16317, -16362, -16383, -16377, -16340, -16269, -16159, -16009, -15816,
-15577, -15289, -14953, -14565, -14126, -13634, -13091, -12496, -11849,
-11154, -10411, -9623, -8791, -7921, -7014, -6075, -5107, -4115, -3104,
-2077, -1041, 0, 1041, 2077, 3104, 4115, 5107, 6075, 7014, 7921, 8791, 9623,
10411, 11154, 11849, 12496, 13091, 13634, 14126, 14565, 14953, 15289, 15577,
15816, 16009, 16159, 16269, 16340, 16377, 16383, 16362, 16317, 16253, 16172,
16079, 15977, 15870, 15762, 15656, 15555, 15461, 15377, 15306, 15248, 15206,
15180, 15172, 15180, 15206, 15248, 15306, 15377, 15461, 15555, 15656, 15762,
15870, 15977, 16079, 16172, 16253, 16317, 16362, 16383, 16377, 16340, 16269,
16159, 16009, 15816, 15577, 15289, 14953, 14565, 14126, 13634, 13091, 12496,
11849, 11154, 10411, 9623, 8791, 7921, 7014, 6075, 5107, 4115, 3104, 2077,
1041, 0, -1041, -2077, -3104, -4115, -5107, -6075, -7014, -7921, -8791,
-9623, -10411, -11154, -11849, -12496, -13091 },
/* Computed Parameter: r_sin3PhaB_M1_Table
* Referenced by: '<S96>/r_sin3PhaB_M1'
*/
{ 15172, 15180, 15206, 15248, 15306, 15377, 15461, 15555, 15656, 15762, 15870,
15977, 16079, 16172, 16253, 16317, 16362, 16383, 16377, 16340, 16269, 16159,
16009, 15816, 15577, 15289, 14953, 14565, 14126, 13634, 13091, 12496, 11849,
11154, 10411, 9623, 8791, 7921, 7014, 6075, 5107, 4115, 3104, 2077, 1041, 0,
-1041, -2077, -3104, -4115, -5107, -6075, -7014, -7921, -8791, -9623, -10411,
-11154, -11849, -12496, -13091, -13634, -14126, -14565, -14953, -15289,
-15577, -15816, -16009, -16159, -16269, -16340, -16377, -16383, -16362,
-16317, -16253, -16172, -16079, -15977, -15870, -15762, -15656, -15555,
-15461, -15377, -15306, -15248, -15206, -15180, -15172, -15180, -15206,
-15248, -15306, -15377, -15461, -15555, -15656, -15762, -15870, -15977,
-16079, -16172, -16253, -16317, -16362, -16383, -16377, -16340, -16269,
-16159, -16009, -15816, -15577, -15289, -14953, -14565, -14126, -13634,
-13091, -12496, -11849, -11154, -10411, -9623, -8791, -7921, -7014, -6075,
-5107, -4115, -3104, -2077, -1041, 0, 1041, 2077, 3104, 4115, 5107, 6075,
7014, 7921, 8791, 9623, 10411, 11154, 11849, 12496, 13091, 13634, 14126,
14565, 14953, 15289, 15577, 15816, 16009, 16159, 16269, 16340, 16377, 16383,
16362, 16317, 16253, 16172, 16079, 15977, 15870, 15762, 15656, 15555, 15461,
15377, 15306, 15248, 15206, 15180, 15172 },
/* Computed Parameter: r_sin3PhaC_M1_Table
* Referenced by: '<S96>/r_sin3PhaC_M1'
*/
{ -13091, -12496, -11849, -11154, -10411, -9623, -8791, -7921, -7014, -6075,
-5107, -4115, -3104, -2077, -1041, 0, 1041, 2077, 3104, 4115, 5107, 6075,
7014, 7921, 8791, 9623, 10411, 11154, 11849, 12496, 13091, 13634, 14126,
14565, 14953, 15289, 15577, 15816, 16009, 16159, 16269, 16340, 16377, 16383,
16362, 16317, 16253, 16172, 16079, 15977, 15870, 15762, 15656, 15555, 15461,
15377, 15306, 15248, 15206, 15180, 15172, 15180, 15206, 15248, 15306, 15377,
15461, 15555, 15656, 15762, 15870, 15977, 16079, 16172, 16253, 16317, 16362,
16383, 16377, 16340, 16269, 16159, 16009, 15816, 15577, 15289, 14953, 14565,
14126, 13634, 13091, 12496, 11849, 11154, 10411, 9623, 8791, 7921, 7014,
6075, 5107, 4115, 3104, 2077, 1041, 0, -1041, -2077, -3104, -4115, -5107,
-6075, -7014, -7921, -8791, -9623, -10411, -11154, -11849, -12496, -13091,
-13634, -14126, -14565, -14953, -15289, -15577, -15816, -16009, -16159,
-16269, -16340, -16377, -16383, -16362, -16317, -16253, -16172, -16079,
-15977, -15870, -15762, -15656, -15555, -15461, -15377, -15306, -15248,
-15206, -15180, -15172, -15180, -15206, -15248, -15306, -15377, -15461,
-15555, -15656, -15762, -15870, -15977, -16079, -16172, -16253, -16317,
-16362, -16383, -16377, -16340, -16269, -16159, -16009, -15816, -15577,
-15289, -14953, -14565, -14126, -13634, -13091 },
/* Computed Parameter: iq_maxSca_M1_Table
* Referenced by: '<S80>/iq_maxSca_M1'
*/
{ 65535U, 65523U, 65484U, 65418U, 65326U, 65207U, 65062U, 64890U, 64691U,
64465U, 64211U, 63930U, 63620U, 63281U, 62913U, 62516U, 62088U, 61630U,
61140U, 60618U, 60062U, 59473U, 58848U, 58187U, 57489U, 56752U, 55974U,
55155U, 54291U, 53381U, 52422U, 51413U, 50349U, 49227U, 48043U, 46792U,
45470U, 44069U, 42581U, 40997U, 39307U, 37494U, 35541U, 33422U, 31105U,
28540U, 25655U, 22323U, 18304U, 12974U },
/* Computed Parameter: z_commutMap_M1_table
* Referenced by: '<S94>/z_commutMap_M1'
*/
{ -1, 1, 0, -1, 0, 1, 0, -1, 1, 1, -1, 0, 1, 0, -1, 0, 1, -1 },
/* Computed Parameter: vec_hallToPos_Value
* Referenced by: '<S11>/vec_hallToPos'
*/
{ 0, 2, 0, 1, 4, 3, 5, 0 }
};
P rtP_Left = {
/* Variable: dV_openRate
* Referenced by: '<S37>/dV_openRate'
*/
12288,
/* Variable: dz_cntTrnsDetHi
* Referenced by: '<S17>/dz_cntTrnsDet'
*/
40,
/* Variable: dz_cntTrnsDetLo
* Referenced by: '<S17>/dz_cntTrnsDet'
*/
20,
/* Variable: n_cruiseMotTgt
* Referenced by: '<S61>/n_cruiseMotTgt'
*/
0,
/* Variable: z_maxCntRst
* Referenced by:
* '<S13>/Counter'
* '<S13>/z_maxCntRst'
* '<S13>/z_maxCntRst2'
* '<S13>/UnitDelay3'
* '<S17>/z_counter'
*/
2000,
/* Variable: cf_speedCoef
* Referenced by: '<S17>/cf_speedCoef'
*/
10667U,
/* Variable: t_errDequal
* Referenced by: '<S20>/t_errDequal'
*/
9600U,
/* Variable: t_errQual
* Referenced by: '<S20>/t_errQual'
*/
1280U,
/* Variable: Vd_max
* Referenced by:
* '<S36>/Vd_max'
* '<S80>/Vd_max1'
*/
14400,
/* Variable: Vq_max_M1
* Referenced by: '<S80>/Vq_max_M1'
*/
{ 14400, 14396, 14386, 14368, 14343, 14311, 14271, 14225, 14171, 14109, 14040,
13963, 13879, 13786, 13685, 13576, 13459, 13333, 13198, 13053, 12900, 12736,
12562, 12377, 12181, 11973, 11753, 11520, 11273, 11011, 10733, 10438, 10124,
9790, 9433, 9051, 8640, 8196, 7713, 7184, 6597, 5935, 5170, 4245, 3019, 0 },
/* Variable: Vq_max_XA
* Referenced by: '<S80>/Vq_max_XA'
*/
{ 0, 320, 640, 960, 1280, 1600, 1920, 2240, 2560, 2880, 3200, 3520, 3840, 4160,
4480, 4800, 5120, 5440, 5760, 6080, 6400, 6720, 7040, 7360, 7680, 8000, 8320,
8640, 8960, 9280, 9600, 9920, 10240, 10560, 10880, 11200, 11520, 11840,
12160, 12480, 12800, 13120, 13440, 13760, 14080, 14400 },
/* Variable: a_phaAdvMax
* Referenced by: '<S42>/a_phaAdvMax'
*/
400,
/* Variable: i_max
* Referenced by:
* '<S36>/i_max'
* '<S80>/i_max'
*/
12000,
/* Variable: id_fieldWeakMax
* Referenced by: '<S42>/id_fieldWeakMax'
*/
4000,
/* Variable: n_commAcvLo
* Referenced by: '<S13>/n_commDeacv'
*/
240,
/* Variable: n_commDeacvHi
* Referenced by: '<S13>/n_commDeacv'
*/
480,
/* Variable: n_fieldWeakAuthHi
* Referenced by: '<S42>/n_fieldWeakAuthHi'
*/
6400,
/* Variable: n_fieldWeakAuthLo
* Referenced by: '<S42>/n_fieldWeakAuthLo'
*/
4800,
/* Variable: n_max
* Referenced by:
* '<S36>/n_max'
* '<S80>/n_max1'
*/
16000,
/* Variable: n_stdStillDet
* Referenced by: '<S13>/n_stdStillDet'
*/
48,
/* Variable: r_errInpTgtThres
* Referenced by: '<S20>/r_errInpTgtThres'
*/
9600,
/* Variable: r_fieldWeakHi
* Referenced by: '<S42>/r_fieldWeakHi'
*/
16000,
/* Variable: r_fieldWeakLo
* Referenced by: '<S42>/r_fieldWeakLo'
*/
12000,
/* Variable: cf_KbLimProt
* Referenced by:
* '<S82>/cf_KbLimProt'
* '<S83>/cf_KbLimProt'
*/
768U,
/* Variable: cf_idKp
* Referenced by: '<S63>/cf_idKp1'
*/
819U,
/* Variable: cf_iqKp
* Referenced by: '<S62>/cf_iqKp'
*/
1229U,
/* Variable: cf_nKp
* Referenced by: '<S61>/cf_nKp'
*/
4833U,
/* Variable: cf_currFilt
* Referenced by: '<S50>/cf_currFilt'
*/
7864U,
/* Variable: cf_idKi
* Referenced by: '<S63>/cf_idKi1'
*/
737U,
/* Variable: cf_iqKi
* Referenced by: '<S62>/cf_iqKi'
*/
1229U,
/* Variable: cf_iqKiLimProt
* Referenced by:
* '<S81>/cf_iqKiLimProt'
* '<S83>/cf_iqKiLimProt'
*/
737U,
/* Variable: cf_nKi
* Referenced by: '<S61>/cf_nKi'
*/
251U,
/* Variable: cf_nKiLimProt
* Referenced by:
* '<S82>/cf_nKiLimProt'
* '<S83>/cf_nKiLimProt'
*/
246U,
/* Variable: n_polePairs
* Referenced by: '<S15>/n_polePairs'
*/
15U,
/* Variable: z_ctrlTypSel
* Referenced by: '<S1>/z_ctrlTypSel'
*/
2U,
/* Variable: z_selPhaCurMeasABC
* Referenced by: '<S49>/z_selPhaCurMeasABC'
*/
0U,
/* Variable: b_angleMeasEna
* Referenced by:
* '<S3>/b_angleMeasEna'
* '<S13>/b_angleMeasEna'
*/
0,
/* Variable: b_cruiseCtrlEna
* Referenced by: '<S1>/b_cruiseCtrlEna'
*/
0,
/* Variable: b_diagEna
* Referenced by: '<S4>/b_diagEna'
*/
1,
/* Variable: b_fieldWeakEna
* Referenced by:
* '<S6>/b_fieldWeakEna'
* '<S97>/b_fieldWeakEna'
*/
0
}; /* Modifiable parameters */
/*
* File trailer for generated code.
*
* [EOF]
*/
-270
View File
@@ -1,270 +0,0 @@
/*
* This file implements FOC motor control.
* This control method offers superior performanace
* compared to previous cummutation method. The new method features:
* ► reduced noise and vibrations
* ► smooth torque output
* ► improved motor efficiency -> lower energy consumption
*
* Copyright (C) 2019-2020 Emanuel FERU <aerdronix@gmail.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "stm32f4xx_hal.h"
#include "defines.h"
#include "config.h"
#include "util.h"
// Matlab includes and defines - from auto-code generation
// ###############################################################################
#include "BLDC_controller.h" /* Model's header file */
#include "rtwtypes.h"
extern board_t board;
extern RT_MODEL *const rtM_Left;
extern RT_MODEL *const rtM_Right;
extern DW rtDW_Left; /* Observable states */
extern ExtU rtU_Left; /* External inputs */
extern ExtY rtY_Left; /* External outputs */
extern P rtP_Left;
extern DW rtDW_Right; /* Observable states */
extern ExtU rtU_Right; /* External inputs */
extern ExtY rtY_Right; /* External outputs */
// ###############################################################################
static int16_t pwm_margin; /* This margin allows to have a window in the PWM signal for proper FOC Phase currents measurement */
extern uint8_t ctrlModReq;
static int16_t curDC_max = (I_DC_MAX * A2BIT_CONV);
int16_t curL_phaA = 0, curL_phaB = 0, curL_DC = 0;
int16_t curR_phaB = 0, curR_phaC = 0, curR_DC = 0;
volatile int pwml = 0;
volatile int pwmr = 0;
extern volatile adc_buf_t adc_buffer;
uint8_t buzzerFreq = 0;
uint8_t buzzerPattern = 0;
uint8_t buzzerCount = 0;
volatile uint32_t buzzerTimer = 0;
static uint8_t buzzerPrev = 0;
static uint8_t buzzerIdx = 0;
uint8_t enable_motors = 0; // initially motors are disabled for SAFETY
static uint8_t enableFin = 0;
static const uint16_t pwm_res = CORE_FREQ / 2 / PWM_FREQ;
static uint16_t offsetcount = 0;
static int16_t offsetrlA = 2000;
static int16_t offsetrlB = 2000;
static int16_t offsetrrB = 2000;
static int16_t offsetrrC = 2000;
static int16_t offsetdcl = 2000;
static int16_t offsetdcr = 2000;
int16_t batVoltage = (400 * BAT_CELLS * BAT_CALIB_ADC) / BAT_CALIB_REAL_VOLTAGE;
static int32_t batVoltageFixdt = (400 * BAT_CELLS * BAT_CALIB_ADC) / BAT_CALIB_REAL_VOLTAGE << 16; // Fixed-point filter output initialized at 400 V*100/cell = 4 V/cell converted to fixed-point
int32_t motPosL = 0;
int32_t motPosR = 0;
// DMA interrupt frequency =~ 16 kHz
void DMA2_Stream0_IRQHandler(void) {
DMA2->LIFCR = DMA_LIFCR_CTCIF0;
if(offsetcount < 2000) { // calibrate ADC offsets
offsetcount++;
offsetrlA = (adc_buffer.rlA + offsetrlA) / 2;
offsetrlB = (adc_buffer.rlB + offsetrlB) / 2;
offsetrrB = (adc_buffer.rrB + offsetrrB) / 2;
offsetrrC = (adc_buffer.rrC + offsetrrC) / 2;
offsetdcl = (adc_buffer.dcl + offsetdcl) / 2;
offsetdcr = (adc_buffer.dcr + offsetdcr) / 2;
return;
}
if (buzzerTimer % 1000 == 0) { // Filter battery voltage at a slower sampling rate
filtLowPass32(adc_buffer.batt1, BAT_FILT_COEF, &batVoltageFixdt);
batVoltage = (int16_t)(batVoltageFixdt >> 16); // convert fixed-point to integer
}
// Get Left motor currents
curL_phaA = (int16_t)(offsetrlA - adc_buffer.rlA);
curL_phaB = (int16_t)(offsetrlB - adc_buffer.rlB);
curL_DC = (int16_t)(offsetdcl - adc_buffer.dcl);
// Get Right motor currents
curR_phaB = (int16_t)(offsetrrB - adc_buffer.rrB);
curR_phaC = (int16_t)(offsetrrC - adc_buffer.rrC);
curR_DC = (int16_t)(offsetdcr - adc_buffer.dcr);
// Disable PWM when current limit is reached (current chopping)
// This is the Level 2 of current protection. The Level 1 should kick in first given by I_MOT_MAX
if(ABS(curL_DC) > curDC_max || enable_motors == 0) {
LEFT_TIM->BDTR &= ~TIM_BDTR_MOE;
} else {
LEFT_TIM->BDTR |= TIM_BDTR_MOE;
}
if(ABS(curR_DC) > curDC_max || enable_motors == 0) {
RIGHT_TIM->BDTR &= ~TIM_BDTR_MOE;
} else {
RIGHT_TIM->BDTR |= TIM_BDTR_MOE;
}
// Create square wave for buzzer
buzzerTimer++;
if (buzzerFreq != 0 && (buzzerTimer / 5000) % (buzzerPattern + 1) == 0) {
if (buzzerPrev == 0) {
buzzerPrev = 1;
if (++buzzerIdx > (buzzerCount + 2)) { // pause 2 periods
buzzerIdx = 1;
}
}
if (buzzerTimer % buzzerFreq == 0 && (buzzerIdx <= buzzerCount || buzzerCount == 0)) {
HAL_GPIO_TogglePin(BUZZER_PORT, BUZZER_PIN);
}
} else if (buzzerPrev) {
HAL_GPIO_WritePin(BUZZER_PORT, BUZZER_PIN, GPIO_PIN_RESET);
buzzerPrev = 0;
}
// Adjust pwm_margin depending on the selected Control Type
if (rtP_Left.z_ctrlTypSel == FOC_CTRL) {
pwm_margin = 110;
} else {
pwm_margin = 0;
}
// ############################### MOTOR CONTROL ###############################
int ul, vl, wl;
int ur, vr, wr;
static boolean_T OverrunFlag = false;
if (OverrunFlag) {
return;
}
OverrunFlag = true;
/* Make sure to stop BOTH motors in case of an error */
enableFin = enable_motors && !rtY_Left.z_errCode && !rtY_Right.z_errCode;
// ========================= LEFT MOTOR ============================
uint8_t hall_ul = !(board.hall_left.hall_portA->IDR & board.hall_left.hall_pinA);
uint8_t hall_vl = !(board.hall_left.hall_portB->IDR & board.hall_left.hall_pinB);
uint8_t hall_wl = !(board.hall_left.hall_portC->IDR & board.hall_left.hall_pinC);
rtU_Left.b_motEna = enableFin;
rtU_Left.z_ctrlModReq = ctrlModReq;
rtU_Left.r_inpTgt = pwml;
rtU_Left.b_hallA = hall_wl;
rtU_Left.b_hallB = hall_vl;
rtU_Left.b_hallC = hall_ul;
rtU_Left.i_phaAB = curL_phaA;
rtU_Left.i_phaBC = curL_phaB;
rtU_Left.i_DCLink = curL_DC;
#ifdef MOTOR_LEFT_ENA
BLDC_controller_step(rtM_Left);
#endif
ul = rtY_Left.DC_phaA;
vl = rtY_Left.DC_phaB;
wl = rtY_Left.DC_phaC;
/* Apply commands */
LEFT_TIM->LEFT_TIM_U = (uint16_t)CLAMP(ul + pwm_res / 2, pwm_margin, pwm_res-pwm_margin);
LEFT_TIM->LEFT_TIM_V = (uint16_t)CLAMP(vl + pwm_res / 2, pwm_margin, pwm_res-pwm_margin);
LEFT_TIM->LEFT_TIM_W = (uint16_t)CLAMP(wl + pwm_res / 2, pwm_margin, pwm_res-pwm_margin);
// =================================================================
// ========================= RIGHT MOTOR ===========================
uint8_t hall_ur = !(board.hall_right.hall_portA->IDR & board.hall_right.hall_pinA);
uint8_t hall_vr = !(board.hall_right.hall_portB->IDR & board.hall_right.hall_pinB);
uint8_t hall_wr = !(board.hall_right.hall_portC->IDR & board.hall_right.hall_pinC);
rtU_Right.b_motEna = enableFin;
rtU_Right.z_ctrlModReq = ctrlModReq;
rtU_Right.r_inpTgt = pwmr;
rtU_Right.b_hallA = hall_ur;
rtU_Right.b_hallB = hall_vr;
rtU_Right.b_hallC = hall_wr;
rtU_Right.i_phaAB = curR_phaB;
rtU_Right.i_phaBC = curR_phaC;
rtU_Right.i_DCLink = curR_DC;
#ifdef MOTOR_RIGHT_ENA
BLDC_controller_step(rtM_Right);
#endif
ur = rtY_Right.DC_phaA;
vr = rtY_Right.DC_phaB;
wr = rtY_Right.DC_phaC;
/* Apply commands */
RIGHT_TIM->RIGHT_TIM_U = (uint16_t)CLAMP(ur + pwm_res / 2, pwm_margin, pwm_res-pwm_margin);
RIGHT_TIM->RIGHT_TIM_V = (uint16_t)CLAMP(vr + pwm_res / 2, pwm_margin, pwm_res-pwm_margin);
RIGHT_TIM->RIGHT_TIM_W = (uint16_t)CLAMP(wr + pwm_res / 2, pwm_margin, pwm_res-pwm_margin);
// =================================================================
OverrunFlag = false;
static int16_t motAngleLeftLast = 0;
static int16_t motAngleRightLast = 0;
static int32_t cycleDegsL = 0; // wheel encoder roll over count in deg
static int32_t cycleDegsR = 0; // wheel encoder roll over count in deg
int16_t diffL = 0;
int16_t diffR = 0;
static int16_t cnt = 0;
if (enable_motors == 0) { // Reset everything if motors are disabled
cycleDegsL = 0;
cycleDegsR = 0;
diffL = 0;
diffR = 0;
cnt = 0;
}
if (cnt == 0) {
motAngleLeftLast = rtY_Left.a_elecAngle;
motAngleRightLast = rtY_Right.a_elecAngle;
}
diffL = rtY_Left.a_elecAngle - motAngleLeftLast;
if (diffL < -180) {
cycleDegsL = cycleDegsL - 360;
} else if (diffL > 180) {
cycleDegsL = cycleDegsL + 360;
}
motPosL = cycleDegsL + (360 - rtY_Left.a_elecAngle);
diffR = rtY_Right.a_elecAngle - motAngleRightLast;
if (diffR < -180) {
cycleDegsR = cycleDegsR - 360;
} else if (diffR > 180) {
cycleDegsR = cycleDegsR + 360;
}
motPosR = cycleDegsR + (360 - rtY_Right.a_elecAngle);
motAngleLeftLast = rtY_Left.a_elecAngle;
motAngleRightLast = rtY_Right.a_elecAngle;
cnt++;
}
-119
View File
@@ -1,119 +0,0 @@
#define BOOTSTUB
#define VERS_TAG 0x53524556
#define MIN_VERSION 2
#define RECOVERY_MODE_DELAY 5
// ********************* Includes *********************
#include <stdbool.h>
#include <stdint.h>
#include "libc.h"
#include "stm32f4xx_hal.h"
#include "defines.h"
#include "setup.h"
#include "drivers/clock.h"
#include "early_init.h"
#include "crypto/rsa.h"
#include "crypto/sha.h"
#include "obj/cert.h"
#include "obj/gitversion.h"
#include "drivers/llbxcan.h"
#include "drivers/llflash.h"
#include "provision.h"
#include "util.h"
#include "boards.h"
#include "flasher.h"
uint8_t hw_type; // type of the board detected(0 - base, 3 - knee)
void __initialize_hardware_early(void) {
early_initialization();
}
void fail(void) {
soft_flasher_start();
}
// know where to sig check
extern void *_app_start[];
int main(void) {
HAL_Init();
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0);
HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0);
HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0);
HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0);
HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0);
HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0);
HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
SystemClock_Config();
MX_GPIO_Clocks_Init();
board_detect();
MX_GPIO_Common_Init();
out_enable(POWERSWITCH, true);
out_enable(LED_RED, false);
out_enable(LED_GREEN, false);
out_enable(LED_BLUE, false);
if(HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN) && (hw_type == HW_TYPE_BASE)) {
uint16_t cnt_press = 0;
while(HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN)) {
HAL_Delay(10);
cnt_press++;
if (cnt_press == (RECOVERY_MODE_DELAY * 100)) {
out_enable(LED_GREEN, true);
soft_flasher_start();
}
}
}
if (enter_bootloader_mode == ENTER_SOFTLOADER_MAGIC) {
enter_bootloader_mode = 0;
soft_flasher_start();
}
// validate length
int len = (int)_app_start[0];
if ((len < 8) || (len > (0x1000000 - 0x4000 - 4 - RSANUMBYTES))) goto fail;
// compute SHA hash
uint8_t digest[SHA_DIGEST_SIZE];
SHA_hash(&_app_start[1], len-4, digest);
// verify version, last bytes in the signed area
uint32_t vers[2] = {0};
memcpy(&vers, ((void*)&_app_start[0]) + len - sizeof(vers), sizeof(vers));
if (vers[0] != VERS_TAG || vers[1] < MIN_VERSION) {
goto fail;
}
// verify RSA signature
if (RSA_verify(&release_rsa_key, ((void*)&_app_start[0]) + len, RSANUMBYTES, digest, SHA_DIGEST_SIZE)) {
goto good;
}
// allow debug if built from source
#ifdef ALLOW_DEBUG
if (RSA_verify(&debug_rsa_key, ((void*)&_app_start[0]) + len, RSANUMBYTES, digest, SHA_DIGEST_SIZE)) {
goto good;
}
#endif
// here is a failure
fail:
fail();
return 0;
good:
// jump to flash
((void(*)(void)) _app_start[1])();
return 0;
}
File diff suppressed because it is too large Load Diff
@@ -1,615 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal.c
* @author MCD Application Team
* @brief HAL module driver.
* This is the common part of the HAL initialization
*
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
The common HAL driver contains a set of generic and common APIs that can be
used by the PPP peripheral drivers and the user to start using the HAL.
[..]
The HAL contains two APIs' categories:
(+) Common HAL APIs
(+) Services HAL APIs
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup HAL HAL
* @brief HAL module driver.
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/** @addtogroup HAL_Private_Constants
* @{
*/
/**
* @brief STM32F4xx HAL Driver version number V1.7.13
*/
#define __STM32F4xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
#define __STM32F4xx_HAL_VERSION_SUB1 (0x07U) /*!< [23:16] sub1 version */
#define __STM32F4xx_HAL_VERSION_SUB2 (0x0DU) /*!< [15:8] sub2 version */
#define __STM32F4xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
#define __STM32F4xx_HAL_VERSION ((__STM32F4xx_HAL_VERSION_MAIN << 24U)\
|(__STM32F4xx_HAL_VERSION_SUB1 << 16U)\
|(__STM32F4xx_HAL_VERSION_SUB2 << 8U )\
|(__STM32F4xx_HAL_VERSION_RC))
#define IDCODE_DEVID_MASK 0x00000FFFU
/* ------------ RCC registers bit address in the alias region ----------- */
#define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
/* --- MEMRMP Register ---*/
/* Alias word address of UFB_MODE bit */
#define MEMRMP_OFFSET SYSCFG_OFFSET
#define UFB_MODE_BIT_NUMBER SYSCFG_MEMRMP_UFB_MODE_Pos
#define UFB_MODE_BB (uint32_t)(PERIPH_BB_BASE + (MEMRMP_OFFSET * 32U) + (UFB_MODE_BIT_NUMBER * 4U))
/* --- CMPCR Register ---*/
/* Alias word address of CMP_PD bit */
#define CMPCR_OFFSET (SYSCFG_OFFSET + 0x20U)
#define CMP_PD_BIT_NUMBER SYSCFG_CMPCR_CMP_PD_Pos
#define CMPCR_CMP_PD_BB (uint32_t)(PERIPH_BB_BASE + (CMPCR_OFFSET * 32U) + (CMP_PD_BIT_NUMBER * 4U))
/* --- MCHDLYCR Register ---*/
/* Alias word address of BSCKSEL bit */
#define MCHDLYCR_OFFSET (SYSCFG_OFFSET + 0x30U)
#define BSCKSEL_BIT_NUMBER SYSCFG_MCHDLYCR_BSCKSEL_Pos
#define MCHDLYCR_BSCKSEL_BB (uint32_t)(PERIPH_BB_BASE + (MCHDLYCR_OFFSET * 32U) + (BSCKSEL_BIT_NUMBER * 4U))
/**
* @}
*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/** @addtogroup HAL_Private_Variables
* @{
*/
__IO uint32_t uwTick;
uint32_t uwTickPrio = (1UL << __NVIC_PRIO_BITS); /* Invalid PRIO */
HAL_TickFreqTypeDef uwTickFreq = HAL_TICK_FREQ_DEFAULT; /* 1KHz */
/**
* @}
*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup HAL_Exported_Functions HAL Exported Functions
* @{
*/
/** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions
* @brief Initialization and de-initialization functions
*
@verbatim
===============================================================================
##### Initialization and Configuration functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Initializes the Flash interface the NVIC allocation and initial clock
configuration. It initializes the systick also when timeout is needed
and the backup domain when enabled.
(+) De-Initializes common part of the HAL.
(+) Configure the time base source to have 1ms time base with a dedicated
Tick interrupt priority.
(++) SysTick timer is used by default as source of time base, but user
can eventually implement his proper time base source (a general purpose
timer for example or other time source), keeping in mind that Time base
duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
handled in milliseconds basis.
(++) Time base configuration function (HAL_InitTick ()) is called automatically
at the beginning of the program after reset by HAL_Init() or at any time
when clock is configured, by HAL_RCC_ClockConfig().
(++) Source of time base is configured to generate interrupts at regular
time intervals. Care must be taken if HAL_Delay() is called from a
peripheral ISR process, the Tick interrupt line must have higher priority
(numerically lower) than the peripheral interrupt. Otherwise the caller
ISR process will be blocked.
(++) functions affecting time base configurations are declared as __weak
to make override possible in case of other implementations in user file.
@endverbatim
* @{
*/
/**
* @brief This function is used to initialize the HAL Library; it must be the first
* instruction to be executed in the main program (before to call any other
* HAL function), it performs the following:
* Configure the Flash prefetch, instruction and Data caches.
* Configures the SysTick to generate an interrupt each 1 millisecond,
* which is clocked by the HSI (at this stage, the clock is not yet
* configured and thus the system is running from the internal HSI at 16 MHz).
* Set NVIC Group Priority to 4.
* Calls the HAL_MspInit() callback function defined in user file
* "stm32f4xx_hal_msp.c" to do the global low level hardware initialization
*
* @note SysTick is used as time base for the HAL_Delay() function, the application
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
/* Configure Flash prefetch, Instruction cache, Data cache */
#if (INSTRUCTION_CACHE_ENABLE != 0U)
__HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
#endif /* INSTRUCTION_CACHE_ENABLE */
#if (DATA_CACHE_ENABLE != 0U)
__HAL_FLASH_DATA_CACHE_ENABLE();
#endif /* DATA_CACHE_ENABLE */
#if (PREFETCH_ENABLE != 0U)
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
/* Init the low level hardware */
HAL_MspInit();
/* Return function status */
return HAL_OK;
}
/**
* @brief This function de-Initializes common part of the HAL and stops the systick.
* This function is optional.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DeInit(void)
{
/* Reset of all peripherals */
__HAL_RCC_APB1_FORCE_RESET();
__HAL_RCC_APB1_RELEASE_RESET();
__HAL_RCC_APB2_FORCE_RESET();
__HAL_RCC_APB2_RELEASE_RESET();
__HAL_RCC_AHB1_FORCE_RESET();
__HAL_RCC_AHB1_RELEASE_RESET();
__HAL_RCC_AHB2_FORCE_RESET();
__HAL_RCC_AHB2_RELEASE_RESET();
__HAL_RCC_AHB3_FORCE_RESET();
__HAL_RCC_AHB3_RELEASE_RESET();
/* De-Init the low level hardware */
HAL_MspDeInit();
/* Return function status */
return HAL_OK;
}
/**
* @brief Initialize the MSP.
* @retval None
*/
__weak void HAL_MspInit(void)
{
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_MspInit could be implemented in the user file
*/
}
/**
* @brief DeInitializes the MSP.
* @retval None
*/
__weak void HAL_MspDeInit(void)
{
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_MspDeInit could be implemented in the user file
*/
}
/**
* @brief This function configures the source of the time base.
* The time source is configured to have 1ms time base with a dedicated
* Tick interrupt priority.
* @note This function is called automatically at the beginning of program after
* reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig().
* @note In the default implementation, SysTick timer is the source of time base.
* It is used to generate interrupts at regular time intervals.
* Care must be taken if HAL_Delay() is called from a peripheral ISR process,
* The SysTick interrupt must have higher priority (numerically lower)
* than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
* The function is declared as __weak to be overwritten in case of other
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
{
return HAL_ERROR;
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
uwTickPrio = TickPriority;
}
else
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
}
/**
* @}
*/
/** @defgroup HAL_Exported_Functions_Group2 HAL Control functions
* @brief HAL Control functions
*
@verbatim
===============================================================================
##### HAL Control functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Provide a tick value in millisecond
(+) Provide a blocking delay in millisecond
(+) Suspend the time base source interrupt
(+) Resume the time base source interrupt
(+) Get the HAL API driver version
(+) Get the device identifier
(+) Get the device revision identifier
(+) Enable/Disable Debug module during SLEEP mode
(+) Enable/Disable Debug module during STOP mode
(+) Enable/Disable Debug module during STANDBY mode
@endverbatim
* @{
*/
/**
* @brief This function is called to increment a global variable "uwTick"
* used as application time base.
* @note In the default implementation, this variable is incremented each 1ms
* in SysTick ISR.
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
uwTick += uwTickFreq;
}
/**
* @brief Provides a tick value in millisecond.
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
return uwTick;
}
/**
* @brief This function returns a tick priority.
* @retval tick priority
*/
uint32_t HAL_GetTickPrio(void)
{
return uwTickPrio;
}
/**
* @brief Set new tick Freq.
* @retval Status
*/
HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq)
{
HAL_StatusTypeDef status = HAL_OK;
HAL_TickFreqTypeDef prevTickFreq;
assert_param(IS_TICKFREQ(Freq));
if (uwTickFreq != Freq)
{
/* Back up uwTickFreq frequency */
prevTickFreq = uwTickFreq;
/* Update uwTickFreq global variable used by HAL_InitTick() */
uwTickFreq = Freq;
/* Apply the new tick Freq */
status = HAL_InitTick(uwTickPrio);
if (status != HAL_OK)
{
/* Restore previous tick frequency */
uwTickFreq = prevTickFreq;
}
}
return status;
}
/**
* @brief Return tick frequency.
* @retval tick period in Hz
*/
HAL_TickFreqTypeDef HAL_GetTickFreq(void)
{
return uwTickFreq;
}
/**
* @brief This function provides minimum delay (in milliseconds) based
* on variable incremented.
* @note In the default implementation , SysTick timer is the source of time base.
* It is used to generate interrupts at regular time intervals where uwTick
* is incremented.
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @param Delay specifies the delay time length, in milliseconds.
* @retval None
*/
__weak void HAL_Delay(uint32_t Delay)
{
uint32_t tickstart = HAL_GetTick();
uint32_t wait = Delay;
/* Add a freq to guarantee minimum wait */
if (wait < HAL_MAX_DELAY)
{
wait += (uint32_t)(uwTickFreq);
}
while((HAL_GetTick() - tickstart) < wait)
{
}
}
/**
* @brief Suspend Tick increment.
* @note In the default implementation , SysTick timer is the source of time base. It is
* used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
* is called, the SysTick interrupt will be disabled and so Tick increment
* is suspended.
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_SuspendTick(void)
{
/* Disable SysTick Interrupt */
SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
}
/**
* @brief Resume Tick increment.
* @note In the default implementation , SysTick timer is the source of time base. It is
* used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
* is called, the SysTick interrupt will be enabled and so Tick increment
* is resumed.
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_ResumeTick(void)
{
/* Enable SysTick Interrupt */
SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;
}
/**
* @brief Returns the HAL revision
* @retval version : 0xXYZR (8bits for each decimal, R for RC)
*/
uint32_t HAL_GetHalVersion(void)
{
return __STM32F4xx_HAL_VERSION;
}
/**
* @brief Returns the device revision identifier.
* @retval Device revision identifier
*/
uint32_t HAL_GetREVID(void)
{
return((DBGMCU->IDCODE) >> 16U);
}
/**
* @brief Returns the device identifier.
* @retval Device identifier
*/
uint32_t HAL_GetDEVID(void)
{
return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK);
}
/**
* @brief Enable the Debug Module during SLEEP mode
* @retval None
*/
void HAL_DBGMCU_EnableDBGSleepMode(void)
{
SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
}
/**
* @brief Disable the Debug Module during SLEEP mode
* @retval None
*/
void HAL_DBGMCU_DisableDBGSleepMode(void)
{
CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
}
/**
* @brief Enable the Debug Module during STOP mode
* @retval None
*/
void HAL_DBGMCU_EnableDBGStopMode(void)
{
SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
}
/**
* @brief Disable the Debug Module during STOP mode
* @retval None
*/
void HAL_DBGMCU_DisableDBGStopMode(void)
{
CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
}
/**
* @brief Enable the Debug Module during STANDBY mode
* @retval None
*/
void HAL_DBGMCU_EnableDBGStandbyMode(void)
{
SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
}
/**
* @brief Disable the Debug Module during STANDBY mode
* @retval None
*/
void HAL_DBGMCU_DisableDBGStandbyMode(void)
{
CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
}
/**
* @brief Enables the I/O Compensation Cell.
* @note The I/O compensation cell can be used only when the device supply
* voltage ranges from 2.4 to 3.6 V.
* @retval None
*/
void HAL_EnableCompensationCell(void)
{
*(__IO uint32_t *)CMPCR_CMP_PD_BB = (uint32_t)ENABLE;
}
/**
* @brief Power-down the I/O Compensation Cell.
* @note The I/O compensation cell can be used only when the device supply
* voltage ranges from 2.4 to 3.6 V.
* @retval None
*/
void HAL_DisableCompensationCell(void)
{
*(__IO uint32_t *)CMPCR_CMP_PD_BB = (uint32_t)DISABLE;
}
/**
* @brief Returns first word of the unique device identifier (UID based on 96 bits)
* @retval Device identifier
*/
uint32_t HAL_GetUIDw0(void)
{
return (READ_REG(*((uint32_t *)UID_BASE)));
}
/**
* @brief Returns second word of the unique device identifier (UID based on 96 bits)
* @retval Device identifier
*/
uint32_t HAL_GetUIDw1(void)
{
return (READ_REG(*((uint32_t *)(UID_BASE + 4U))));
}
/**
* @brief Returns third word of the unique device identifier (UID based on 96 bits)
* @retval Device identifier
*/
uint32_t HAL_GetUIDw2(void)
{
return (READ_REG(*((uint32_t *)(UID_BASE + 8U))));
}
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
defined(STM32F469xx) || defined(STM32F479xx)
/**
* @brief Enables the Internal FLASH Bank Swapping.
*
* @note This function can be used only for STM32F42xxx/43xxx/469xx/479xx devices.
*
* @note Flash Bank2 mapped at 0x08000000 (and aliased @0x00000000)
* and Flash Bank1 mapped at 0x08100000 (and aliased at 0x00100000)
*
* @retval None
*/
void HAL_EnableMemorySwappingBank(void)
{
*(__IO uint32_t *)UFB_MODE_BB = (uint32_t)ENABLE;
}
/**
* @brief Disables the Internal FLASH Bank Swapping.
*
* @note This function can be used only for STM32F42xxx/43xxx/469xx/479xx devices.
*
* @note The default state : Flash Bank1 mapped at 0x08000000 (and aliased @0x00000000)
* and Flash Bank2 mapped at 0x08100000 (and aliased at 0x00100000)
*
* @retval None
*/
void HAL_DisableMemorySwappingBank(void)
{
*(__IO uint32_t *)UFB_MODE_BB = (uint32_t)DISABLE;
}
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
@@ -1,997 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_cec.c
* @author MCD Application Team
* @brief CEC HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the High Definition Multimedia Interface
* Consumer Electronics Control Peripheral (CEC).
* + Initialization and de-initialization function
* + IO operation function
* + Peripheral Control function
*
*
@verbatim
===============================================================================
##### How to use this driver #####
===============================================================================
[..]
The CEC HAL driver can be used as follow:
(#) Declare a CEC_HandleTypeDef handle structure.
(#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API:
(##) Enable the CEC interface clock.
(##) CEC pins configuration:
(+++) Enable the clock for the CEC GPIOs.
(+++) Configure these CEC pins as alternate function pull-up.
(##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT()
and HAL_CEC_Receive_IT() APIs):
(+++) Configure the CEC interrupt priority.
(+++) Enable the NVIC CEC IRQ handle.
(+++) The specific CEC interrupts (Transmission complete interrupt,
RXNE interrupt and Error Interrupts) will be managed using the macros
__HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit
and receive process.
(#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in
in case of Bit Rising Error, Error-Bit generation conditions, device logical
address and Listen mode in the hcec Init structure.
(#) Initialize the CEC registers by calling the HAL_CEC_Init() API.
[..]
(@) This API (HAL_CEC_Init()) configures also the low level Hardware (GPIO, CLOCK, CORTEX...etc)
by calling the customed HAL_CEC_MspInit() API.
*** Callback registration ***
=============================================
The compilation define USE_HAL_CEC_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
Use Functions HAL_CEC_RegisterCallback() or HAL_CEC_RegisterXXXCallback()
to register an interrupt callback.
Function HAL_CEC_RegisterCallback() allows to register following callbacks:
(+) TxCpltCallback : Tx Transfer completed callback.
(+) ErrorCallback : callback for error detection.
(+) MspInitCallback : CEC MspInit.
(+) MspDeInitCallback : CEC MspDeInit.
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
For specific callback HAL_CEC_RxCpltCallback use dedicated register callbacks
HAL_CEC_RegisterRxCpltCallback().
Use function HAL_CEC_UnRegisterCallback() to reset a callback to the default
weak function.
HAL_CEC_UnRegisterCallback() takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) TxCpltCallback : Tx Transfer completed callback.
(+) ErrorCallback : callback for error detection.
(+) MspInitCallback : CEC MspInit.
(+) MspDeInitCallback : CEC MspDeInit.
For callback HAL_CEC_RxCpltCallback use dedicated unregister callback :
HAL_CEC_UnRegisterRxCpltCallback().
By default, after the HAL_CEC_Init() and when the state is HAL_CEC_STATE_RESET
all callbacks are set to the corresponding weak functions :
examples HAL_CEC_TxCpltCallback() , HAL_CEC_RxCpltCallback().
Exception done for MspInit and MspDeInit functions that are
reset to the legacy weak function in the HAL_CEC_Init()/ HAL_CEC_DeInit() only when
these callbacks are null (not registered beforehand).
if not, MspInit or MspDeInit are not null, the HAL_CEC_Init() / HAL_CEC_DeInit()
keep and use the user MspInit/MspDeInit functions (registered beforehand)
Callbacks can be registered/unregistered in HAL_CEC_STATE_READY state only.
Exception done MspInit/MspDeInit callbacks that can be registered/unregistered
in HAL_CEC_STATE_READY or HAL_CEC_STATE_RESET state,
thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using HAL_CEC_RegisterCallback() before calling HAL_CEC_DeInit()
or HAL_CEC_Init() function.
When the compilation define USE_HAL_CEC_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registration feature is not available and all callbacks
are set to the corresponding weak functions.
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup CEC CEC
* @brief HAL CEC module driver
* @{
*/
#ifdef HAL_CEC_MODULE_ENABLED
#if defined (CEC)
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/** @defgroup CEC_Private_Constants CEC Private Constants
* @{
*/
/**
* @}
*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/** @defgroup CEC_Private_Functions CEC Private Functions
* @{
*/
/**
* @}
*/
/* Exported functions ---------------------------------------------------------*/
/** @defgroup CEC_Exported_Functions CEC Exported Functions
* @{
*/
/** @defgroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
* @brief Initialization and Configuration functions
*
@verbatim
===============================================================================
##### Initialization and Configuration functions #####
===============================================================================
[..]
This subsection provides a set of functions allowing to initialize the CEC
(+) The following parameters need to be configured:
(++) SignalFreeTime
(++) Tolerance
(++) BRERxStop (RX stopped or not upon Bit Rising Error)
(++) BREErrorBitGen (Error-Bit generation in case of Bit Rising Error)
(++) LBPEErrorBitGen (Error-Bit generation in case of Long Bit Period Error)
(++) BroadcastMsgNoErrorBitGen (Error-bit generation in case of broadcast message error)
(++) SignalFreeTimeOption (SFT Timer start definition)
(++) OwnAddress (CEC device address)
(++) ListenMode
@endverbatim
* @{
*/
/**
* @brief Initializes the CEC mode according to the specified
* parameters in the CEC_InitTypeDef and creates the associated handle .
* @param hcec CEC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
{
/* Check the CEC handle allocation */
if ((hcec == NULL) || (hcec->Init.RxBuffer == NULL))
{
return HAL_ERROR;
}
/* Check the parameters */
assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime));
assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance));
assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop));
assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen));
assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen));
assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen));
assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption));
assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode));
assert_param(IS_CEC_OWN_ADDRESS(hcec->Init.OwnAddress));
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
if (hcec->gState == HAL_CEC_STATE_RESET)
{
/* Allocate lock resource and initialize it */
hcec->Lock = HAL_UNLOCKED;
hcec->TxCpltCallback = HAL_CEC_TxCpltCallback; /* Legacy weak TxCpltCallback */
hcec->RxCpltCallback = HAL_CEC_RxCpltCallback; /* Legacy weak RxCpltCallback */
hcec->ErrorCallback = HAL_CEC_ErrorCallback; /* Legacy weak ErrorCallback */
if (hcec->MspInitCallback == NULL)
{
hcec->MspInitCallback = HAL_CEC_MspInit; /* Legacy weak MspInit */
}
/* Init the low level hardware */
hcec->MspInitCallback(hcec);
}
#else
if (hcec->gState == HAL_CEC_STATE_RESET)
{
/* Allocate lock resource and initialize it */
hcec->Lock = HAL_UNLOCKED;
/* Init the low level hardware : GPIO, CLOCK */
HAL_CEC_MspInit(hcec);
}
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
hcec->gState = HAL_CEC_STATE_BUSY;
/* Disable the Peripheral */
__HAL_CEC_DISABLE(hcec);
/* Write to CEC Control Register */
hcec->Instance->CFGR = hcec->Init.SignalFreeTime | hcec->Init.Tolerance | hcec->Init.BRERxStop | \
hcec->Init.BREErrorBitGen | hcec->Init.LBPEErrorBitGen | hcec->Init.BroadcastMsgNoErrorBitGen | \
hcec->Init.SignalFreeTimeOption | ((uint32_t)(hcec->Init.OwnAddress) << 16U) | \
hcec->Init.ListenMode;
/* Enable the following CEC Transmission/Reception interrupts as
* well as the following CEC Transmission/Reception Errors interrupts
* Rx Byte Received IT
* End of Reception IT
* Rx overrun
* Rx bit rising error
* Rx short bit period error
* Rx long bit period error
* Rx missing acknowledge
* Tx Byte Request IT
* End of Transmission IT
* Tx Missing Acknowledge IT
* Tx-Error IT
* Tx-Buffer Underrun IT
* Tx arbitration lost */
__HAL_CEC_ENABLE_IT(hcec, CEC_IT_RXBR | CEC_IT_RXEND | CEC_IER_RX_ALL_ERR | CEC_IT_TXBR | CEC_IT_TXEND |
CEC_IER_TX_ALL_ERR);
/* Enable the CEC Peripheral */
__HAL_CEC_ENABLE(hcec);
hcec->ErrorCode = HAL_CEC_ERROR_NONE;
hcec->gState = HAL_CEC_STATE_READY;
hcec->RxState = HAL_CEC_STATE_READY;
return HAL_OK;
}
/**
* @brief DeInitializes the CEC peripheral
* @param hcec CEC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
{
/* Check the CEC handle allocation */
if (hcec == NULL)
{
return HAL_ERROR;
}
/* Check the parameters */
assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
hcec->gState = HAL_CEC_STATE_BUSY;
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
if (hcec->MspDeInitCallback == NULL)
{
hcec->MspDeInitCallback = HAL_CEC_MspDeInit; /* Legacy weak MspDeInit */
}
/* DeInit the low level hardware */
hcec->MspDeInitCallback(hcec);
#else
/* DeInit the low level hardware */
HAL_CEC_MspDeInit(hcec);
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
/* Disable the Peripheral */
__HAL_CEC_DISABLE(hcec);
/* Clear Flags */
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND | CEC_FLAG_TXBR | CEC_FLAG_RXBR | CEC_FLAG_RXEND | CEC_ISR_ALL_ERROR);
/* Disable the following CEC Transmission/Reception interrupts as
* well as the following CEC Transmission/Reception Errors interrupts
* Rx Byte Received IT
* End of Reception IT
* Rx overrun
* Rx bit rising error
* Rx short bit period error
* Rx long bit period error
* Rx missing acknowledge
* Tx Byte Request IT
* End of Transmission IT
* Tx Missing Acknowledge IT
* Tx-Error IT
* Tx-Buffer Underrun IT
* Tx arbitration lost */
__HAL_CEC_DISABLE_IT(hcec, CEC_IT_RXBR | CEC_IT_RXEND | CEC_IER_RX_ALL_ERR | CEC_IT_TXBR | CEC_IT_TXEND |
CEC_IER_TX_ALL_ERR);
hcec->ErrorCode = HAL_CEC_ERROR_NONE;
hcec->gState = HAL_CEC_STATE_RESET;
hcec->RxState = HAL_CEC_STATE_RESET;
/* Process Unlock */
__HAL_UNLOCK(hcec);
return HAL_OK;
}
/**
* @brief Initializes the Own Address of the CEC device
* @param hcec CEC handle
* @param CEC_OwnAddress The CEC own address.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress)
{
/* Check the parameters */
assert_param(IS_CEC_OWN_ADDRESS(CEC_OwnAddress));
if ((hcec->gState == HAL_CEC_STATE_READY) && (hcec->RxState == HAL_CEC_STATE_READY))
{
/* Process Locked */
__HAL_LOCK(hcec);
hcec->gState = HAL_CEC_STATE_BUSY;
/* Disable the Peripheral */
__HAL_CEC_DISABLE(hcec);
if (CEC_OwnAddress != CEC_OWN_ADDRESS_NONE)
{
hcec->Instance->CFGR |= ((uint32_t)CEC_OwnAddress << 16);
}
else
{
hcec->Instance->CFGR &= ~(CEC_CFGR_OAR);
}
hcec->gState = HAL_CEC_STATE_READY;
hcec->ErrorCode = HAL_CEC_ERROR_NONE;
/* Process Unlocked */
__HAL_UNLOCK(hcec);
/* Enable the Peripheral */
__HAL_CEC_ENABLE(hcec);
return HAL_OK;
}
else
{
return HAL_BUSY;
}
}
/**
* @brief CEC MSP Init
* @param hcec CEC handle
* @retval None
*/
__weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hcec);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_CEC_MspInit can be implemented in the user file
*/
}
/**
* @brief CEC MSP DeInit
* @param hcec CEC handle
* @retval None
*/
__weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hcec);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_CEC_MspDeInit can be implemented in the user file
*/
}
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
/**
* @brief Register a User CEC Callback
* To be used instead of the weak predefined callback
* @param hcec CEC handle
* @param CallbackID ID of the callback to be registered
* This parameter can be one of the following values:
* @arg @ref HAL_CEC_TX_CPLT_CB_ID Tx Complete callback ID
* @arg @ref HAL_CEC_ERROR_CB_ID Error callback ID
* @arg @ref HAL_CEC_MSPINIT_CB_ID MspInit callback ID
* @arg @ref HAL_CEC_MSPDEINIT_CB_ID MspDeInit callback ID
* @param pCallback pointer to the Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CEC_RegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID,
pCEC_CallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
if (pCallback == NULL)
{
/* Update the error code */
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
return HAL_ERROR;
}
/* Process locked */
__HAL_LOCK(hcec);
if (hcec->gState == HAL_CEC_STATE_READY)
{
switch (CallbackID)
{
case HAL_CEC_TX_CPLT_CB_ID :
hcec->TxCpltCallback = pCallback;
break;
case HAL_CEC_ERROR_CB_ID :
hcec->ErrorCallback = pCallback;
break;
case HAL_CEC_MSPINIT_CB_ID :
hcec->MspInitCallback = pCallback;
break;
case HAL_CEC_MSPDEINIT_CB_ID :
hcec->MspDeInitCallback = pCallback;
break;
default :
/* Update the error code */
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
}
}
else if (hcec->gState == HAL_CEC_STATE_RESET)
{
switch (CallbackID)
{
case HAL_CEC_MSPINIT_CB_ID :
hcec->MspInitCallback = pCallback;
break;
case HAL_CEC_MSPDEINIT_CB_ID :
hcec->MspDeInitCallback = pCallback;
break;
default :
/* Update the error code */
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
}
}
else
{
/* Update the error code */
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(hcec);
return status;
}
/**
* @brief Unregister an CEC Callback
* CEC callabck is redirected to the weak predefined callback
* @param hcec uart handle
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
* @arg @ref HAL_CEC_TX_CPLT_CB_ID Tx Complete callback ID
* @arg @ref HAL_CEC_ERROR_CB_ID Error callback ID
* @arg @ref HAL_CEC_MSPINIT_CB_ID MspInit callback ID
* @arg @ref HAL_CEC_MSPDEINIT_CB_ID MspDeInit callback ID
* @retval status
*/
HAL_StatusTypeDef HAL_CEC_UnRegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID)
{
HAL_StatusTypeDef status = HAL_OK;
/* Process locked */
__HAL_LOCK(hcec);
if (hcec->gState == HAL_CEC_STATE_READY)
{
switch (CallbackID)
{
case HAL_CEC_TX_CPLT_CB_ID :
hcec->TxCpltCallback = HAL_CEC_TxCpltCallback; /* Legacy weak TxCpltCallback */
break;
case HAL_CEC_ERROR_CB_ID :
hcec->ErrorCallback = HAL_CEC_ErrorCallback; /* Legacy weak ErrorCallback */
break;
case HAL_CEC_MSPINIT_CB_ID :
hcec->MspInitCallback = HAL_CEC_MspInit;
break;
case HAL_CEC_MSPDEINIT_CB_ID :
hcec->MspDeInitCallback = HAL_CEC_MspDeInit;
break;
default :
/* Update the error code */
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
}
}
else if (hcec->gState == HAL_CEC_STATE_RESET)
{
switch (CallbackID)
{
case HAL_CEC_MSPINIT_CB_ID :
hcec->MspInitCallback = HAL_CEC_MspInit;
break;
case HAL_CEC_MSPDEINIT_CB_ID :
hcec->MspDeInitCallback = HAL_CEC_MspDeInit;
break;
default :
/* Update the error code */
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
}
}
else
{
/* Update the error code */
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(hcec);
return status;
}
/**
* @brief Register CEC RX complete Callback
* To be used instead of the weak HAL_CEC_RxCpltCallback() predefined callback
* @param hcec CEC handle
* @param pCallback pointer to the Rx transfer compelete Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CEC_RegisterRxCpltCallback(CEC_HandleTypeDef *hcec, pCEC_RxCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
if (pCallback == NULL)
{
/* Update the error code */
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
return HAL_ERROR;
}
/* Process locked */
__HAL_LOCK(hcec);
if (HAL_CEC_STATE_READY == hcec->RxState)
{
hcec->RxCpltCallback = pCallback;
}
else
{
/* Update the error code */
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(hcec);
return status;
}
/**
* @brief UnRegister CEC RX complete Callback
* CEC RX complete Callback is redirected to the weak HAL_CEC_RxCpltCallback() predefined callback
* @param hcec CEC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CEC_UnRegisterRxCpltCallback(CEC_HandleTypeDef *hcec)
{
HAL_StatusTypeDef status = HAL_OK;
/* Process locked */
__HAL_LOCK(hcec);
if (HAL_CEC_STATE_READY == hcec->RxState)
{
hcec->RxCpltCallback = HAL_CEC_RxCpltCallback; /* Legacy weak CEC RxCpltCallback */
}
else
{
/* Update the error code */
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(hcec);
return status;
}
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
/**
* @}
*/
/** @defgroup CEC_Exported_Functions_Group2 Input and Output operation functions
* @brief CEC Transmit/Receive functions
*
@verbatim
===============================================================================
##### IO operation functions #####
===============================================================================
This subsection provides a set of functions allowing to manage the CEC data transfers.
(#) The CEC handle must contain the initiator (TX side) and the destination (RX side)
logical addresses (4-bit long addresses, 0xF for broadcast messages destination)
(#) The communication is performed using Interrupts.
These API's return the HAL status.
The end of the data processing will be indicated through the
dedicated CEC IRQ when using Interrupt mode.
The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks
will be executed respectively at the end of the transmit or Receive process
The HAL_CEC_ErrorCallback() user callback will be executed when a communication
error is detected
(#) API's with Interrupt are :
(+) HAL_CEC_Transmit_IT()
(+) HAL_CEC_IRQHandler()
(#) A set of User Callbacks are provided:
(+) HAL_CEC_TxCpltCallback()
(+) HAL_CEC_RxCpltCallback()
(+) HAL_CEC_ErrorCallback()
@endverbatim
* @{
*/
/**
* @brief Send data in interrupt mode
* @param hcec CEC handle
* @param InitiatorAddress Initiator address
* @param DestinationAddress destination logical address
* @param pData pointer to input byte data buffer
* @param Size amount of data to be sent in bytes (without counting the header).
* 0 means only the header is sent (ping operation).
* Maximum TX size is 15 bytes (1 opcode and up to 14 operands).
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress,
uint8_t *pData, uint32_t Size)
{
/* if the peripheral isn't already busy and if there is no previous transmission
already pending due to arbitration lost */
if (hcec->gState == HAL_CEC_STATE_READY)
{
if ((pData == NULL) && (Size > 0U))
{
return HAL_ERROR;
}
assert_param(IS_CEC_ADDRESS(DestinationAddress));
assert_param(IS_CEC_ADDRESS(InitiatorAddress));
assert_param(IS_CEC_MSGSIZE(Size));
/* Process Locked */
__HAL_LOCK(hcec);
hcec->pTxBuffPtr = pData;
hcec->gState = HAL_CEC_STATE_BUSY_TX;
hcec->ErrorCode = HAL_CEC_ERROR_NONE;
/* initialize the number of bytes to send,
* 0 means only one header is sent (ping operation) */
hcec->TxXferCount = (uint16_t)Size;
/* in case of no payload (Size = 0), sender is only pinging the system;
Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */
if (Size == 0U)
{
__HAL_CEC_LAST_BYTE_TX_SET(hcec);
}
/* send header block */
hcec->Instance->TXDR = (uint32_t)(((uint32_t)InitiatorAddress << CEC_INITIATOR_LSB_POS) | DestinationAddress);
/* Set TX Start of Message (TXSOM) bit */
__HAL_CEC_FIRST_BYTE_TX_SET(hcec);
/* Process Unlocked */
__HAL_UNLOCK(hcec);
return HAL_OK;
}
else
{
return HAL_BUSY;
}
}
/**
* @brief Get size of the received frame.
* @param hcec CEC handle
* @retval Frame size
*/
uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec)
{
return hcec->RxXferSize;
}
/**
* @brief Change Rx Buffer.
* @param hcec CEC handle
* @param Rxbuffer Rx Buffer
* @note This function can be called only inside the HAL_CEC_RxCpltCallback()
* @retval Frame size
*/
void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t *Rxbuffer)
{
hcec->Init.RxBuffer = Rxbuffer;
}
/**
* @brief This function handles CEC interrupt requests.
* @param hcec CEC handle
* @retval None
*/
void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
{
/* save interrupts register for further error or interrupts handling purposes */
uint32_t reg;
reg = hcec->Instance->ISR;
/* ----------------------------Arbitration Lost Management----------------------------------*/
/* CEC TX arbitration error interrupt occurred --------------------------------------*/
if ((reg & CEC_FLAG_ARBLST) != 0U)
{
hcec->ErrorCode = HAL_CEC_ERROR_ARBLST;
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST);
}
/* ----------------------------Rx Management----------------------------------*/
/* CEC RX byte received interrupt ---------------------------------------------------*/
if ((reg & CEC_FLAG_RXBR) != 0U)
{
/* reception is starting */
hcec->RxState = HAL_CEC_STATE_BUSY_RX;
hcec->RxXferSize++;
/* read received byte */
*hcec->Init.RxBuffer = (uint8_t) hcec->Instance->RXDR;
hcec->Init.RxBuffer++;
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXBR);
}
/* CEC RX end received interrupt ---------------------------------------------------*/
if ((reg & CEC_FLAG_RXEND) != 0U)
{
/* clear IT */
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXEND);
/* Rx process is completed, restore hcec->RxState to Ready */
hcec->RxState = HAL_CEC_STATE_READY;
hcec->ErrorCode = HAL_CEC_ERROR_NONE;
hcec->Init.RxBuffer -= hcec->RxXferSize;
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1U)
hcec->RxCpltCallback(hcec, hcec->RxXferSize);
#else
HAL_CEC_RxCpltCallback(hcec, hcec->RxXferSize);
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
hcec->RxXferSize = 0U;
}
/* ----------------------------Tx Management----------------------------------*/
/* CEC TX byte request interrupt ------------------------------------------------*/
if ((reg & CEC_FLAG_TXBR) != 0U)
{
--hcec->TxXferCount;
if (hcec->TxXferCount == 0U)
{
/* if this is the last byte transmission, set TX End of Message (TXEOM) bit */
__HAL_CEC_LAST_BYTE_TX_SET(hcec);
}
/* In all cases transmit the byte */
hcec->Instance->TXDR = *hcec->pTxBuffPtr;
hcec->pTxBuffPtr++;
/* clear Tx-Byte request flag */
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXBR);
}
/* CEC TX end interrupt ------------------------------------------------*/
if ((reg & CEC_FLAG_TXEND) != 0U)
{
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND);
/* Tx process is ended, restore hcec->gState to Ready */
hcec->gState = HAL_CEC_STATE_READY;
/* Call the Process Unlocked before calling the Tx call back API to give the possibility to
start again the Transmission under the Tx call back API */
__HAL_UNLOCK(hcec);
hcec->ErrorCode = HAL_CEC_ERROR_NONE;
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1U)
hcec->TxCpltCallback(hcec);
#else
HAL_CEC_TxCpltCallback(hcec);
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
}
/* ----------------------------Rx/Tx Error Management----------------------------------*/
if ((reg & (CEC_ISR_RXOVR | CEC_ISR_BRE | CEC_ISR_SBPE | CEC_ISR_LBPE | CEC_ISR_RXACKE | CEC_ISR_TXUDR | CEC_ISR_TXERR |
CEC_ISR_TXACKE)) != 0U)
{
hcec->ErrorCode = reg;
__HAL_CEC_CLEAR_FLAG(hcec, HAL_CEC_ERROR_RXOVR | HAL_CEC_ERROR_BRE | CEC_FLAG_LBPE | CEC_FLAG_SBPE |
HAL_CEC_ERROR_RXACKE | HAL_CEC_ERROR_TXUDR | HAL_CEC_ERROR_TXERR | HAL_CEC_ERROR_TXACKE);
if ((reg & (CEC_ISR_RXOVR | CEC_ISR_BRE | CEC_ISR_SBPE | CEC_ISR_LBPE | CEC_ISR_RXACKE)) != 0U)
{
hcec->Init.RxBuffer -= hcec->RxXferSize;
hcec->RxXferSize = 0U;
hcec->RxState = HAL_CEC_STATE_READY;
}
else if (((reg & CEC_ISR_ARBLST) == 0U) && ((reg & (CEC_ISR_TXUDR | CEC_ISR_TXERR | CEC_ISR_TXACKE)) != 0U))
{
/* Set the CEC state ready to be able to start again the process */
hcec->gState = HAL_CEC_STATE_READY;
}
else
{
/* Nothing todo*/
}
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1U)
hcec->ErrorCallback(hcec);
#else
/* Error Call Back */
HAL_CEC_ErrorCallback(hcec);
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
}
else
{
/* Nothing todo*/
}
}
/**
* @brief Tx Transfer completed callback
* @param hcec CEC handle
* @retval None
*/
__weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hcec);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_CEC_TxCpltCallback can be implemented in the user file
*/
}
/**
* @brief Rx Transfer completed callback
* @param hcec CEC handle
* @param RxFrameSize Size of frame
* @retval None
*/
__weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hcec);
UNUSED(RxFrameSize);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_CEC_RxCpltCallback can be implemented in the user file
*/
}
/**
* @brief CEC error callbacks
* @param hcec CEC handle
* @retval None
*/
__weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hcec);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_CEC_ErrorCallback can be implemented in the user file
*/
}
/**
* @}
*/
/** @defgroup CEC_Exported_Functions_Group3 Peripheral Control function
* @brief CEC control functions
*
@verbatim
===============================================================================
##### Peripheral Control function #####
===============================================================================
[..]
This subsection provides a set of functions allowing to control the CEC.
(+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral.
(+) HAL_CEC_GetError() API can be helpful to check in run-time the error of the CEC peripheral.
@endverbatim
* @{
*/
/**
* @brief return the CEC state
* @param hcec pointer to a CEC_HandleTypeDef structure that contains
* the configuration information for the specified CEC module.
* @retval HAL state
*/
HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec)
{
uint32_t temp1, temp2;
temp1 = hcec->gState;
temp2 = hcec->RxState;
return (HAL_CEC_StateTypeDef)(temp1 | temp2);
}
/**
* @brief Return the CEC error code
* @param hcec pointer to a CEC_HandleTypeDef structure that contains
* the configuration information for the specified CEC.
* @retval CEC Error Code
*/
uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec)
{
return hcec->ErrorCode;
}
/**
* @}
*/
/**
* @}
*/
#endif /* CEC */
#endif /* HAL_CEC_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
@@ -1,505 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_cortex.c
* @author MCD Application Team
* @brief CORTEX HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the CORTEX:
* + Initialization and de-initialization functions
* + Peripheral Control functions
*
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
*** How to configure Interrupts using CORTEX HAL driver ***
===========================================================
[..]
This section provides functions allowing to configure the NVIC interrupts (IRQ).
The Cortex-M4 exceptions are managed by CMSIS functions.
(#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping()
function according to the following table.
(#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority().
(#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ().
(#) please refer to programming manual for details in how to configure priority.
-@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ preemption is no more possible.
The pending IRQ priority will be managed only by the sub priority.
-@- IRQ priority order (sorted by highest to lowest priority):
(+@) Lowest preemption priority
(+@) Lowest sub priority
(+@) Lowest hardware priority (IRQ number)
[..]
*** How to configure Systick using CORTEX HAL driver ***
========================================================
[..]
Setup SysTick Timer for time base.
(+) The HAL_SYSTICK_Config() function calls the SysTick_Config() function which
is a CMSIS function that:
(++) Configures the SysTick Reload register with value passed as function parameter.
(++) Configures the SysTick IRQ priority to the lowest value 0x0F.
(++) Resets the SysTick Counter register.
(++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
(++) Enables the SysTick Interrupt.
(++) Starts the SysTick Counter.
(+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro
__HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined
inside the stm32f4xx_hal_cortex.h file.
(+) You can change the SysTick IRQ priority by calling the
HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function
call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
(+) To adjust the SysTick time base, use the following formula:
Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s)
(++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
(++) Reload Value should not exceed 0xFFFFFF
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup CORTEX CORTEX
* @brief CORTEX HAL module driver
* @{
*/
#ifdef HAL_CORTEX_MODULE_ENABLED
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions
* @{
*/
/** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions
* @brief Initialization and Configuration functions
*
@verbatim
==============================================================================
##### Initialization and de-initialization functions #####
==============================================================================
[..]
This section provides the CORTEX HAL driver functions allowing to configure Interrupts
Systick functionalities
@endverbatim
* @{
*/
/**
* @brief Sets the priority grouping field (preemption priority and subpriority)
* using the required unlock sequence.
* @param PriorityGroup The priority grouping bits length.
* This parameter can be one of the following values:
* @arg NVIC_PRIORITYGROUP_0: 0 bits for preemption priority
* 4 bits for subpriority
* @arg NVIC_PRIORITYGROUP_1: 1 bits for preemption priority
* 3 bits for subpriority
* @arg NVIC_PRIORITYGROUP_2: 2 bits for preemption priority
* 2 bits for subpriority
* @arg NVIC_PRIORITYGROUP_3: 3 bits for preemption priority
* 1 bits for subpriority
* @arg NVIC_PRIORITYGROUP_4: 4 bits for preemption priority
* 0 bits for subpriority
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
}
/**
* @brief Sets the priority of an interrupt.
* @param IRQn External interrupt number.
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
* @param PreemptPriority The preemption priority for the IRQn channel.
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority
* @param SubPriority the subpriority level for the IRQ channel.
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
uint32_t prioritygroup = 0x00U;
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
}
/**
* @brief Enables a device specific interrupt in the NVIC interrupt controller.
* @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
* function should be called before.
* @param IRQn External interrupt number.
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
}
/**
* @brief Disables a device specific interrupt in the NVIC interrupt controller.
* @param IRQn External interrupt number.
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
* @retval None
*/
void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
{
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Disable interrupt */
NVIC_DisableIRQ(IRQn);
}
/**
* @brief Initiates a system reset request to reset the MCU.
* @retval None
*/
void HAL_NVIC_SystemReset(void)
{
/* System Reset */
NVIC_SystemReset();
}
/**
* @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer.
* Counter is in free running mode to generate periodic interrupts.
* @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
return SysTick_Config(TicksNumb);
}
/**
* @}
*/
/** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
* @brief Cortex control functions
*
@verbatim
==============================================================================
##### Peripheral Control functions #####
==============================================================================
[..]
This subsection provides a set of functions allowing to control the CORTEX
(NVIC, SYSTICK, MPU) functionalities.
@endverbatim
* @{
*/
#if (__MPU_PRESENT == 1U)
/**
* @brief Disables the MPU
* @retval None
*/
void HAL_MPU_Disable(void)
{
/* Make sure outstanding transfers are done */
__DMB();
/* Disable fault exceptions */
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
/* Disable the MPU and clear the control register*/
MPU->CTRL = 0U;
}
/**
* @brief Enable the MPU.
* @param MPU_Control Specifies the control mode of the MPU during hard fault,
* NMI, FAULTMASK and privileged access to the default memory
* This parameter can be one of the following values:
* @arg MPU_HFNMI_PRIVDEF_NONE
* @arg MPU_HARDFAULT_NMI
* @arg MPU_PRIVILEGED_DEFAULT
* @arg MPU_HFNMI_PRIVDEF
* @retval None
*/
void HAL_MPU_Enable(uint32_t MPU_Control)
{
/* Enable the MPU */
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
/* Enable fault exceptions */
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
/* Ensure MPU setting take effects */
__DSB();
__ISB();
}
/**
* @brief Initializes and configures the Region and the memory to be protected.
* @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains
* the initialization and configuration information.
* @retval None
*/
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
{
/* Check the parameters */
assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number));
assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable));
/* Set the Region number */
MPU->RNR = MPU_Init->Number;
if ((MPU_Init->Enable) != RESET)
{
/* Check the parameters */
assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec));
assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission));
assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField));
assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable));
assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable));
assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));
MPU->RBAR = MPU_Init->BaseAddress;
MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) |
((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) |
((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) |
((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) |
((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) |
((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) |
((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) |
((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos);
}
else
{
MPU->RBAR = 0x00U;
MPU->RASR = 0x00U;
}
}
#endif /* __MPU_PRESENT */
/**
* @brief Gets the priority grouping field from the NVIC Interrupt Controller.
* @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field)
*/
uint32_t HAL_NVIC_GetPriorityGrouping(void)
{
/* Get the PRIGROUP[10:8] field value */
return NVIC_GetPriorityGrouping();
}
/**
* @brief Gets the priority of an interrupt.
* @param IRQn External interrupt number.
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
* @param PriorityGroup the priority grouping bits length.
* This parameter can be one of the following values:
* @arg NVIC_PRIORITYGROUP_0: 0 bits for preemption priority
* 4 bits for subpriority
* @arg NVIC_PRIORITYGROUP_1: 1 bits for preemption priority
* 3 bits for subpriority
* @arg NVIC_PRIORITYGROUP_2: 2 bits for preemption priority
* 2 bits for subpriority
* @arg NVIC_PRIORITYGROUP_3: 3 bits for preemption priority
* 1 bits for subpriority
* @arg NVIC_PRIORITYGROUP_4: 4 bits for preemption priority
* 0 bits for subpriority
* @param pPreemptPriority Pointer on the Preemptive priority value (starting from 0).
* @param pSubPriority Pointer on the Subpriority value (starting from 0).
* @retval None
*/
void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)
{
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Get priority for Cortex-M system or device specific interrupts */
NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority);
}
/**
* @brief Sets Pending bit of an external interrupt.
* @param IRQn External interrupt number
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
* @retval None
*/
void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
{
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Set interrupt pending */
NVIC_SetPendingIRQ(IRQn);
}
/**
* @brief Gets Pending Interrupt (reads the pending register in the NVIC
* and returns the pending bit for the specified interrupt).
* @param IRQn External interrupt number.
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
* @retval status: - 0 Interrupt status is not pending.
* - 1 Interrupt status is pending.
*/
uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
{
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Return 1 if pending else 0 */
return NVIC_GetPendingIRQ(IRQn);
}
/**
* @brief Clears the pending bit of an external interrupt.
* @param IRQn External interrupt number.
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
* @retval None
*/
void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Clear pending interrupt */
NVIC_ClearPendingIRQ(IRQn);
}
/**
* @brief Gets active interrupt ( reads the active register in NVIC and returns the active bit).
* @param IRQn External interrupt number
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
* @retval status: - 0 Interrupt status is not pending.
* - 1 Interrupt status is pending.
*/
uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn)
{
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Return 1 if active else 0 */
return NVIC_GetActive(IRQn);
}
/**
* @brief Configures the SysTick clock source.
* @param CLKSource specifies the SysTick clock source.
* This parameter can be one of the following values:
* @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
* @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
* @retval None
*/
void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
{
/* Check the parameters */
assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
{
SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
}
else
{
SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
}
}
/**
* @brief This function handles SYSTICK interrupt request.
* @retval None
*/
void HAL_SYSTICK_IRQHandler(void)
{
HAL_SYSTICK_Callback();
}
/**
* @brief SYSTICK callback.
* @retval None
*/
__weak void HAL_SYSTICK_Callback(void)
{
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_SYSTICK_Callback could be implemented in the user file
*/
}
/**
* @}
*/
/**
* @}
*/
#endif /* HAL_CORTEX_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
@@ -1,330 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_crc.c
* @author MCD Application Team
* @brief CRC HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Cyclic Redundancy Check (CRC) peripheral:
* + Initialization and de-initialization functions
* + Peripheral Control functions
* + Peripheral State functions
*
@verbatim
===============================================================================
##### How to use this driver #####
===============================================================================
[..]
(+) Enable CRC AHB clock using __HAL_RCC_CRC_CLK_ENABLE();
(+) Initialize CRC calculator
(++) specify generating polynomial (peripheral default or non-default one)
(++) specify initialization value (peripheral default or non-default one)
(++) specify input data format
(++) specify input or output data inversion mode if any
(+) Use HAL_CRC_Accumulate() function to compute the CRC value of the
input data buffer starting with the previously computed CRC as
initialization value
(+) Use HAL_CRC_Calculate() function to compute the CRC value of the
input data buffer starting with the defined initialization value
(default or non-default) to initiate CRC calculation
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup CRC CRC
* @brief CRC HAL module driver.
* @{
*/
#ifdef HAL_CRC_MODULE_ENABLED
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup CRC_Exported_Functions CRC Exported Functions
* @{
*/
/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
* @brief Initialization and Configuration functions.
*
@verbatim
===============================================================================
##### Initialization and de-initialization functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Initialize the CRC according to the specified parameters
in the CRC_InitTypeDef and create the associated handle
(+) DeInitialize the CRC peripheral
(+) Initialize the CRC MSP (MCU Specific Package)
(+) DeInitialize the CRC MSP
@endverbatim
* @{
*/
/**
* @brief Initialize the CRC according to the specified
* parameters in the CRC_InitTypeDef and create the associated handle.
* @param hcrc CRC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
{
/* Check the CRC handle allocation */
if (hcrc == NULL)
{
return HAL_ERROR;
}
/* Check the parameters */
assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
if (hcrc->State == HAL_CRC_STATE_RESET)
{
/* Allocate lock resource and initialize it */
hcrc->Lock = HAL_UNLOCKED;
/* Init the low level hardware */
HAL_CRC_MspInit(hcrc);
}
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_READY;
/* Return function status */
return HAL_OK;
}
/**
* @brief DeInitialize the CRC peripheral.
* @param hcrc CRC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc)
{
/* Check the CRC handle allocation */
if (hcrc == NULL)
{
return HAL_ERROR;
}
/* Check the parameters */
assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
/* Check the CRC peripheral state */
if (hcrc->State == HAL_CRC_STATE_BUSY)
{
return HAL_BUSY;
}
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_BUSY;
/* Reset CRC calculation unit */
__HAL_CRC_DR_RESET(hcrc);
/* Reset IDR register content */
CLEAR_BIT(hcrc->Instance->IDR, CRC_IDR_IDR);
/* DeInit the low level hardware */
HAL_CRC_MspDeInit(hcrc);
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_RESET;
/* Process unlocked */
__HAL_UNLOCK(hcrc);
/* Return function status */
return HAL_OK;
}
/**
* @brief Initializes the CRC MSP.
* @param hcrc CRC handle
* @retval None
*/
__weak void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hcrc);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_CRC_MspInit can be implemented in the user file
*/
}
/**
* @brief DeInitialize the CRC MSP.
* @param hcrc CRC handle
* @retval None
*/
__weak void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hcrc);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_CRC_MspDeInit can be implemented in the user file
*/
}
/**
* @}
*/
/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
* @brief management functions.
*
@verbatim
===============================================================================
##### Peripheral Control functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) compute the 32-bit CRC value of a 32-bit data buffer
using combination of the previous CRC value and the new one.
[..] or
(+) compute the 32-bit CRC value of a 32-bit data buffer
independently of the previous CRC value.
@endverbatim
* @{
*/
/**
* @brief Compute the 32-bit CRC value of a 32-bit data buffer
* starting with the previously computed CRC as initialization value.
* @param hcrc CRC handle
* @param pBuffer pointer to the input data buffer.
* @param BufferLength input data buffer length (number of uint32_t words).
* @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
*/
uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
{
uint32_t index; /* CRC input data buffer index */
uint32_t temp = 0U; /* CRC output (read from hcrc->Instance->DR register) */
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_BUSY;
/* Enter Data to the CRC calculator */
for (index = 0U; index < BufferLength; index++)
{
hcrc->Instance->DR = pBuffer[index];
}
temp = hcrc->Instance->DR;
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_READY;
/* Return the CRC computed value */
return temp;
}
/**
* @brief Compute the 32-bit CRC value of a 32-bit data buffer
* starting with hcrc->Instance->INIT as initialization value.
* @param hcrc CRC handle
* @param pBuffer pointer to the input data buffer.
* @param BufferLength input data buffer length (number of uint32_t words).
* @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
*/
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
{
uint32_t index; /* CRC input data buffer index */
uint32_t temp = 0U; /* CRC output (read from hcrc->Instance->DR register) */
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_BUSY;
/* Reset CRC Calculation Unit (hcrc->Instance->INIT is
* written in hcrc->Instance->DR) */
__HAL_CRC_DR_RESET(hcrc);
/* Enter 32-bit input data to the CRC calculator */
for (index = 0U; index < BufferLength; index++)
{
hcrc->Instance->DR = pBuffer[index];
}
temp = hcrc->Instance->DR;
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_READY;
/* Return the CRC computed value */
return temp;
}
/**
* @}
*/
/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
* @brief Peripheral State functions.
*
@verbatim
===============================================================================
##### Peripheral State functions #####
===============================================================================
[..]
This subsection permits to get in run-time the status of the peripheral.
@endverbatim
* @{
*/
/**
* @brief Return the CRC handle state.
* @param hcrc CRC handle
* @retval HAL state
*/
HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc)
{
/* Return CRC handle state */
return hcrc->State;
}
/**
* @}
*/
/**
* @}
*/
#endif /* HAL_CRC_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
File diff suppressed because it is too large Load Diff
@@ -1,681 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_cryp_ex.c
* @author MCD Application Team
* @brief Extended CRYP HAL module driver
* This file provides firmware functions to manage the following
* functionalities of CRYP extension peripheral:
* + Extended AES processing functions
*
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
The CRYP extension HAL driver can be used as follows:
(#)After AES-GCM or AES-CCM Encryption/Decryption user can start following API
to get the authentication messages :
(##) HAL_CRYPEx_AESGCM_GenerateAuthTAG
(##) HAL_CRYPEx_AESCCM_GenerateAuthTAG
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
#if defined (AES) || defined (CRYP)
#if defined (CRYP_CR_ALGOMODE_AES_GCM)|| defined (AES)
/** @defgroup CRYPEx CRYPEx
* @brief CRYP Extension HAL module driver.
* @{
*/
#ifdef HAL_CRYP_MODULE_ENABLED
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/** @addtogroup CRYPEx_Private_Defines
* @{
*/
#if defined(AES)
#define CRYP_PHASE_INIT 0x00000000U /*!< GCM/GMAC (or CCM) init phase */
#define CRYP_PHASE_HEADER AES_CR_GCMPH_0 /*!< GCM/GMAC or CCM header phase */
#define CRYP_PHASE_PAYLOAD AES_CR_GCMPH_1 /*!< GCM(/CCM) payload phase */
#define CRYP_PHASE_FINAL AES_CR_GCMPH /*!< GCM/GMAC or CCM final phase */
#define CRYP_OPERATINGMODE_ENCRYPT 0x00000000U /*!< Encryption mode */
#define CRYP_OPERATINGMODE_KEYDERIVATION AES_CR_MODE_0 /*!< Key derivation mode only used when performing ECB and CBC decryptions */
#define CRYP_OPERATINGMODE_DECRYPT AES_CR_MODE_1 /*!< Decryption */
#define CRYP_OPERATINGMODE_KEYDERIVATION_DECRYPT AES_CR_MODE /*!< Key derivation and decryption only used when performing ECB and CBC decryptions */
#else /* CRYP */
#define CRYP_PHASE_INIT 0x00000000U
#define CRYP_PHASE_HEADER CRYP_CR_GCM_CCMPH_0
#define CRYP_PHASE_PAYLOAD CRYP_CR_GCM_CCMPH_1
#define CRYP_PHASE_FINAL CRYP_CR_GCM_CCMPH
#define CRYP_OPERATINGMODE_ENCRYPT 0x00000000U
#define CRYP_OPERATINGMODE_DECRYPT CRYP_CR_ALGODIR
#endif /* End AES or CRYP */
#define CRYPEx_PHASE_PROCESS 0x02U /*!< CRYP peripheral is in processing phase */
#define CRYPEx_PHASE_FINAL 0x03U /*!< CRYP peripheral is in final phase this is relevant only with CCM and GCM modes */
/* CTR0 information to use in CCM algorithm */
#define CRYP_CCM_CTR0_0 0x07FFFFFFU
#define CRYP_CCM_CTR0_3 0xFFFFFF00U
/**
* @}
*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions---------------------------------------------------------*/
/** @addtogroup CRYPEx_Exported_Functions
* @{
*/
/** @defgroup CRYPEx_Exported_Functions_Group1 Extended AES processing functions
* @brief Extended processing functions.
*
@verbatim
==============================================================================
##### Extended AES processing functions #####
==============================================================================
[..] This section provides functions allowing to generate the authentication
TAG in Polling mode
(#)HAL_CRYPEx_AESGCM_GenerateAuthTAG
(#)HAL_CRYPEx_AESCCM_GenerateAuthTAG
they should be used after Encrypt/Decrypt operation.
@endverbatim
* @{
*/
/**
* @brief generate the GCM authentication TAG.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param AuthTag: Pointer to the authentication buffer
* @param Timeout: Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout)
{
uint32_t tickstart;
/* Assume first Init.HeaderSize is in words */
uint64_t headerlength = (uint64_t)(hcryp->Init.HeaderSize) * 32U; /* Header length in bits */
uint64_t inputlength = (uint64_t)hcryp->SizesSum * 8U; /* Input length in bits */
uint32_t tagaddr = (uint32_t)AuthTag;
/* Correct headerlength if Init.HeaderSize is actually in bytes */
if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_BYTE)
{
headerlength /= 4U;
}
if (hcryp->State == HAL_CRYP_STATE_READY)
{
/* Process locked */
__HAL_LOCK(hcryp);
/* Change the CRYP peripheral state */
hcryp->State = HAL_CRYP_STATE_BUSY;
/* Check if initialization phase has already been performed */
if (hcryp->Phase == CRYPEx_PHASE_PROCESS)
{
/* Change the CRYP phase */
hcryp->Phase = CRYPEx_PHASE_FINAL;
}
else /* Initialization phase has not been performed*/
{
/* Disable the Peripheral */
__HAL_CRYP_DISABLE(hcryp);
/* Sequence error code field */
hcryp->ErrorCode |= HAL_CRYP_ERROR_AUTH_TAG_SEQUENCE;
/* Change the CRYP peripheral state */
hcryp->State = HAL_CRYP_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hcryp);
return HAL_ERROR;
}
#if defined(CRYP)
/* Disable CRYP to start the final phase */
__HAL_CRYP_DISABLE(hcryp);
/* Select final phase */
MODIFY_REG(hcryp->Instance->CR, CRYP_CR_GCM_CCMPH, CRYP_PHASE_FINAL);
/*ALGODIR bit must be set to 0.*/
hcryp->Instance->CR &= ~CRYP_CR_ALGODIR;
/* Enable the CRYP peripheral */
__HAL_CRYP_ENABLE(hcryp);
/* Write the number of bits in header (64 bits) followed by the number of bits
in the payload */
if (hcryp->Init.DataType == CRYP_DATATYPE_1B)
{
hcryp->Instance->DIN = 0U;
hcryp->Instance->DIN = __RBIT((uint32_t)(headerlength));
hcryp->Instance->DIN = 0U;
hcryp->Instance->DIN = __RBIT((uint32_t)(inputlength));
}
else if (hcryp->Init.DataType == CRYP_DATATYPE_8B)
{
hcryp->Instance->DIN = 0U;
hcryp->Instance->DIN = __REV((uint32_t)(headerlength));
hcryp->Instance->DIN = 0U;
hcryp->Instance->DIN = __REV((uint32_t)(inputlength));
}
else if (hcryp->Init.DataType == CRYP_DATATYPE_16B)
{
hcryp->Instance->DIN = 0U;
hcryp->Instance->DIN = __ROR((uint32_t)headerlength, 16U);
hcryp->Instance->DIN = 0U;
hcryp->Instance->DIN = __ROR((uint32_t)inputlength, 16U);
}
else if (hcryp->Init.DataType == CRYP_DATATYPE_32B)
{
hcryp->Instance->DIN = 0U;
hcryp->Instance->DIN = (uint32_t)(headerlength);
hcryp->Instance->DIN = 0U;
hcryp->Instance->DIN = (uint32_t)(inputlength);
}
else
{
/* Nothing to do */
}
/* Wait for OFNE flag to be raised */
tickstart = HAL_GetTick();
while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
{
if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
{
/* Disable the CRYP Peripheral Clock */
__HAL_CRYP_DISABLE(hcryp);
/* Change state */
hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
hcryp->State = HAL_CRYP_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hcryp);
return HAL_ERROR;
}
}
}
/* Read the authentication TAG in the output FIFO */
*(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
tagaddr += 4U;
*(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
tagaddr += 4U;
*(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
tagaddr += 4U;
*(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
#else /* AES*/
/* Select final phase */
MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_PHASE_FINAL);
/* Write the number of bits in header (64 bits) followed by the number of bits
in the payload */
if (hcryp->Init.DataType == CRYP_DATATYPE_1B)
{
hcryp->Instance->DINR = 0U;
hcryp->Instance->DINR = __RBIT((uint32_t)(headerlength));
hcryp->Instance->DINR = 0U;
hcryp->Instance->DINR = __RBIT((uint32_t)(inputlength));
}
else if (hcryp->Init.DataType == CRYP_DATATYPE_8B)
{
hcryp->Instance->DINR = 0U;
hcryp->Instance->DINR = __REV((uint32_t)(headerlength));
hcryp->Instance->DINR = 0U;
hcryp->Instance->DINR = __REV((uint32_t)(inputlength));
}
else if (hcryp->Init.DataType == CRYP_DATATYPE_16B)
{
hcryp->Instance->DINR = 0U;
hcryp->Instance->DINR = __ROR((uint32_t)headerlength, 16U);
hcryp->Instance->DINR = 0U;
hcryp->Instance->DINR = __ROR((uint32_t)inputlength, 16U);
}
else if (hcryp->Init.DataType == CRYP_DATATYPE_32B)
{
hcryp->Instance->DINR = 0U;
hcryp->Instance->DINR = (uint32_t)(headerlength);
hcryp->Instance->DINR = 0U;
hcryp->Instance->DINR = (uint32_t)(inputlength);
}
else
{
/* Nothing to do */
}
/* Wait for CCF flag to be raised */
tickstart = HAL_GetTick();
while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF))
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
{
if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
{
/* Disable the CRYP peripheral clock */
__HAL_CRYP_DISABLE(hcryp);
/* Change state */
hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
hcryp->State = HAL_CRYP_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hcryp);
return HAL_ERROR;
}
}
}
/* Read the authentication TAG in the output FIFO */
*(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
tagaddr += 4U;
*(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
tagaddr += 4U;
*(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
tagaddr += 4U;
*(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
/* Clear CCF flag */
__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
#endif /* End AES or CRYP */
/* Disable the peripheral */
__HAL_CRYP_DISABLE(hcryp);
/* Change the CRYP peripheral state */
hcryp->State = HAL_CRYP_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hcryp);
}
else
{
/* Busy error code field */
hcryp->ErrorCode |= HAL_CRYP_ERROR_BUSY;
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
}
/**
* @brief AES CCM Authentication TAG generation.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param AuthTag: Pointer to the authentication buffer
* @param Timeout: Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AESCCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout)
{
uint32_t tagaddr = (uint32_t)AuthTag;
uint32_t ctr0 [4] = {0};
uint32_t ctr0addr = (uint32_t)ctr0;
uint32_t tickstart;
if (hcryp->State == HAL_CRYP_STATE_READY)
{
/* Process locked */
__HAL_LOCK(hcryp);
/* Change the CRYP peripheral state */
hcryp->State = HAL_CRYP_STATE_BUSY;
/* Check if initialization phase has already been performed */
if (hcryp->Phase == CRYPEx_PHASE_PROCESS)
{
/* Change the CRYP phase */
hcryp->Phase = CRYPEx_PHASE_FINAL;
}
else /* Initialization phase has not been performed*/
{
/* Disable the peripheral */
__HAL_CRYP_DISABLE(hcryp);
/* Sequence error code field */
hcryp->ErrorCode |= HAL_CRYP_ERROR_AUTH_TAG_SEQUENCE;
/* Change the CRYP peripheral state */
hcryp->State = HAL_CRYP_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hcryp);
return HAL_ERROR;
}
#if defined(CRYP)
/* Disable CRYP to start the final phase */
__HAL_CRYP_DISABLE(hcryp);
/* Select final phase & ALGODIR bit must be set to 0. */
MODIFY_REG(hcryp->Instance->CR, CRYP_CR_GCM_CCMPH | CRYP_CR_ALGODIR, CRYP_PHASE_FINAL | CRYP_OPERATINGMODE_ENCRYPT);
/* Enable the CRYP peripheral */
__HAL_CRYP_ENABLE(hcryp);
/* Write the counter block in the IN FIFO, CTR0 information from B0
data has to be swapped according to the DATATYPE*/
ctr0[0] = (hcryp->Init.B0[0]) & CRYP_CCM_CTR0_0;
ctr0[1] = hcryp->Init.B0[1];
ctr0[2] = hcryp->Init.B0[2];
ctr0[3] = hcryp->Init.B0[3] & CRYP_CCM_CTR0_3;
if (hcryp->Init.DataType == CRYP_DATATYPE_8B)
{
hcryp->Instance->DIN = __REV(*(uint32_t *)(ctr0addr));
ctr0addr += 4U;
hcryp->Instance->DIN = __REV(*(uint32_t *)(ctr0addr));
ctr0addr += 4U;
hcryp->Instance->DIN = __REV(*(uint32_t *)(ctr0addr));
ctr0addr += 4U;
hcryp->Instance->DIN = __REV(*(uint32_t *)(ctr0addr));
}
else if (hcryp->Init.DataType == CRYP_DATATYPE_16B)
{
hcryp->Instance->DIN = __ROR(*(uint32_t *)(ctr0addr), 16U);
ctr0addr += 4U;
hcryp->Instance->DIN = __ROR(*(uint32_t *)(ctr0addr), 16U);
ctr0addr += 4U;
hcryp->Instance->DIN = __ROR(*(uint32_t *)(ctr0addr), 16U);
ctr0addr += 4U;
hcryp->Instance->DIN = __ROR(*(uint32_t *)(ctr0addr), 16U);
}
else if (hcryp->Init.DataType == CRYP_DATATYPE_1B)
{
hcryp->Instance->DIN = __RBIT(*(uint32_t *)(ctr0addr));
ctr0addr += 4U;
hcryp->Instance->DIN = __RBIT(*(uint32_t *)(ctr0addr));
ctr0addr += 4U;
hcryp->Instance->DIN = __RBIT(*(uint32_t *)(ctr0addr));
ctr0addr += 4U;
hcryp->Instance->DIN = __RBIT(*(uint32_t *)(ctr0addr));
}
else
{
hcryp->Instance->DIN = *(uint32_t *)(ctr0addr);
ctr0addr += 4U;
hcryp->Instance->DIN = *(uint32_t *)(ctr0addr);
ctr0addr += 4U;
hcryp->Instance->DIN = *(uint32_t *)(ctr0addr);
ctr0addr += 4U;
hcryp->Instance->DIN = *(uint32_t *)(ctr0addr);
}
/* Wait for OFNE flag to be raised */
tickstart = HAL_GetTick();
while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
{
if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
{
/* Disable the CRYP peripheral Clock */
__HAL_CRYP_DISABLE(hcryp);
/* Change state */
hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
hcryp->State = HAL_CRYP_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hcryp);
return HAL_ERROR;
}
}
}
/* Read the Auth TAG in the IN FIFO */
*(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
tagaddr += 4U;
*(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
tagaddr += 4U;
*(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
tagaddr += 4U;
*(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
#else /* AES */
/* Select final phase */
MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_PHASE_FINAL);
/* Write the counter block in the IN FIFO, CTR0 information from B0
data has to be swapped according to the DATATYPE*/
if (hcryp->Init.DataType == CRYP_DATATYPE_8B)
{
ctr0[0] = (__REV(hcryp->Init.B0[0]) & CRYP_CCM_CTR0_0);
ctr0[1] = __REV(hcryp->Init.B0[1]);
ctr0[2] = __REV(hcryp->Init.B0[2]);
ctr0[3] = (__REV(hcryp->Init.B0[3])& CRYP_CCM_CTR0_3);
hcryp->Instance->DINR = __REV(*(uint32_t *)(ctr0addr));
ctr0addr += 4U;
hcryp->Instance->DINR = __REV(*(uint32_t *)(ctr0addr));
ctr0addr += 4U;
hcryp->Instance->DINR = __REV(*(uint32_t *)(ctr0addr));
ctr0addr += 4U;
hcryp->Instance->DINR = __REV(*(uint32_t *)(ctr0addr));
}
else if (hcryp->Init.DataType == CRYP_DATATYPE_16B)
{
ctr0[0] = (__ROR((hcryp->Init.B0[0]), 16U)& CRYP_CCM_CTR0_0);
ctr0[1] = __ROR((hcryp->Init.B0[1]), 16U);
ctr0[2] = __ROR((hcryp->Init.B0[2]), 16U);
ctr0[3] = (__ROR((hcryp->Init.B0[3]), 16U)& CRYP_CCM_CTR0_3);
hcryp->Instance->DINR = __ROR(*(uint32_t *)(ctr0addr), 16U);
ctr0addr += 4U;
hcryp->Instance->DINR = __ROR(*(uint32_t *)(ctr0addr), 16U);
ctr0addr += 4U;
hcryp->Instance->DINR = __ROR(*(uint32_t *)(ctr0addr), 16U);
ctr0addr += 4U;
hcryp->Instance->DINR = __ROR(*(uint32_t *)(ctr0addr), 16U);
}
else if (hcryp->Init.DataType == CRYP_DATATYPE_1B)
{
ctr0[0] = (__RBIT(hcryp->Init.B0[0])& CRYP_CCM_CTR0_0);
ctr0[1] = __RBIT(hcryp->Init.B0[1]);
ctr0[2] = __RBIT(hcryp->Init.B0[2]);
ctr0[3] = (__RBIT(hcryp->Init.B0[3])& CRYP_CCM_CTR0_3);
hcryp->Instance->DINR = __RBIT(*(uint32_t *)(ctr0addr));
ctr0addr += 4U;
hcryp->Instance->DINR = __RBIT(*(uint32_t *)(ctr0addr));
ctr0addr += 4U;
hcryp->Instance->DINR = __RBIT(*(uint32_t *)(ctr0addr));
ctr0addr += 4U;
hcryp->Instance->DINR = __RBIT(*(uint32_t *)(ctr0addr));
}
else
{
ctr0[0] = (hcryp->Init.B0[0]) & CRYP_CCM_CTR0_0;
ctr0[1] = hcryp->Init.B0[1];
ctr0[2] = hcryp->Init.B0[2];
ctr0[3] = hcryp->Init.B0[3] & CRYP_CCM_CTR0_3;
hcryp->Instance->DINR = *(uint32_t *)(ctr0addr);
ctr0addr += 4U;
hcryp->Instance->DINR = *(uint32_t *)(ctr0addr);
ctr0addr += 4U;
hcryp->Instance->DINR = *(uint32_t *)(ctr0addr);
ctr0addr += 4U;
hcryp->Instance->DINR = *(uint32_t *)(ctr0addr);
}
/* Wait for CCF flag to be raised */
tickstart = HAL_GetTick();
while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF))
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
{
if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
{
/* Disable the CRYP peripheral Clock */
__HAL_CRYP_DISABLE(hcryp);
/* Change state */
hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
hcryp->State = HAL_CRYP_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hcryp);
return HAL_ERROR;
}
}
}
/* Read the authentication TAG in the output FIFO */
*(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
tagaddr += 4U;
*(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
tagaddr += 4U;
*(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
tagaddr += 4U;
*(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
/* Clear CCF Flag */
__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
#endif /* End of AES || CRYP */
/* Change the CRYP peripheral state */
hcryp->State = HAL_CRYP_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hcryp);
/* Disable CRYP */
__HAL_CRYP_DISABLE(hcryp);
}
else
{
/* Busy error code field */
hcryp->ErrorCode = HAL_CRYP_ERROR_BUSY;
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
}
/**
* @}
*/
#if defined (AES)
/** @defgroup CRYPEx_Exported_Functions_Group2 Key Derivation functions
* @brief AutoKeyDerivation functions
*
@verbatim
==============================================================================
##### Key Derivation functions #####
==============================================================================
[..] This section provides functions allowing to Enable or Disable the
the AutoKeyDerivation parameter in CRYP_HandleTypeDef structure
These function are allowed only in TinyAES IP.
@endverbatim
* @{
*/
/**
* @brief AES enable key derivation functions
* @param hcryp: pointer to a CRYP_HandleTypeDef structure.
* @retval None
*/
void HAL_CRYPEx_EnableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp)
{
if (hcryp->State == HAL_CRYP_STATE_READY)
{
hcryp->AutoKeyDerivation = ENABLE;
}
else
{
/* Busy error code field */
hcryp->ErrorCode = HAL_CRYP_ERROR_BUSY;
}
}
/**
* @brief AES disable key derivation functions
* @param hcryp: pointer to a CRYP_HandleTypeDef structure.
* @retval None
*/
void HAL_CRYPEx_DisableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp)
{
if (hcryp->State == HAL_CRYP_STATE_READY)
{
hcryp->AutoKeyDerivation = DISABLE;
}
else
{
/* Busy error code field */
hcryp->ErrorCode = HAL_CRYP_ERROR_BUSY;
}
}
/**
* @}
*/
#endif /* AES or GCM CCM defined*/
#endif /* AES */
#endif /* HAL_CRYP_MODULE_ENABLED */
/**
* @}
*/
#endif /* TinyAES or CRYP*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
File diff suppressed because it is too large Load Diff
@@ -1,496 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_dac_ex.c
* @author MCD Application Team
* @brief Extended DAC HAL module driver.
* This file provides firmware functions to manage the extended
* functionalities of the DAC peripheral.
*
*
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
*** Dual mode IO operation ***
==============================
[..]
(+) When Dual mode is enabled (i.e. DAC Channel1 and Channel2 are used simultaneously) :
Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in
Channel 1 and Channel 2.
*** Signal generation operation ***
===================================
[..]
(+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
(+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
#ifdef HAL_DAC_MODULE_ENABLED
#if defined(DAC)
/** @defgroup DACEx DACEx
* @brief DAC Extended HAL module driver
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup DACEx_Exported_Functions DACEx Exported Functions
* @{
*/
/** @defgroup DACEx_Exported_Functions_Group2 IO operation functions
* @brief Extended IO operation functions
*
@verbatim
==============================================================================
##### Extended features functions #####
==============================================================================
[..] This section provides functions allowing to:
(+) Start conversion.
(+) Stop conversion.
(+) Start conversion and enable DMA transfer.
(+) Stop conversion and disable DMA transfer.
(+) Get result of conversion.
(+) Get result of dual mode conversion.
@endverbatim
* @{
*/
#if defined(DAC_CHANNEL2_SUPPORT)
/**
* @brief Enables DAC and starts conversion of both channels.
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DACEx_DualStart(DAC_HandleTypeDef *hdac)
{
uint32_t tmp_swtrig = 0UL;
/* Process locked */
__HAL_LOCK(hdac);
/* Change DAC state */
hdac->State = HAL_DAC_STATE_BUSY;
/* Enable the Peripheral */
__HAL_DAC_ENABLE(hdac, DAC_CHANNEL_1);
__HAL_DAC_ENABLE(hdac, DAC_CHANNEL_2);
/* Check if software trigger enabled */
if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE)
{
tmp_swtrig |= DAC_SWTRIGR_SWTRIG1;
}
if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (DAC_CHANNEL_2 & 0x10UL)))
{
tmp_swtrig |= DAC_SWTRIGR_SWTRIG2;
}
/* Enable the selected DAC software conversion*/
SET_BIT(hdac->Instance->SWTRIGR, tmp_swtrig);
/* Change DAC state */
hdac->State = HAL_DAC_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hdac);
/* Return function status */
return HAL_OK;
}
/**
* @brief Disables DAC and stop conversion of both channels.
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DACEx_DualStop(DAC_HandleTypeDef *hdac)
{
/* Disable the Peripheral */
__HAL_DAC_DISABLE(hdac, DAC_CHANNEL_1);
__HAL_DAC_DISABLE(hdac, DAC_CHANNEL_2);
/* Change DAC state */
hdac->State = HAL_DAC_STATE_READY;
/* Return function status */
return HAL_OK;
}
#endif /* DAC_CHANNEL2_SUPPORT */
/**
* @brief Enable or disable the selected DAC channel wave generation.
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @param Channel The selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_CHANNEL_1: DAC Channel1 selected
* @arg DAC_CHANNEL_2: DAC Channel2 selected
* @param Amplitude Select max triangle amplitude.
* This parameter can be one of the following values:
* @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
* @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
* @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
* @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
* @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
* @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
* @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
* @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
* @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
* @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
* @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
* @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude)
{
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(Channel));
assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
/* Process locked */
__HAL_LOCK(hdac);
/* Change DAC state */
hdac->State = HAL_DAC_STATE_BUSY;
/* Enable the triangle wave generation for the selected DAC channel */
MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1) | (DAC_CR_MAMP1)) << (Channel & 0x10UL),
(DAC_CR_WAVE1_1 | Amplitude) << (Channel & 0x10UL));
/* Change DAC state */
hdac->State = HAL_DAC_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hdac);
/* Return function status */
return HAL_OK;
}
/**
* @brief Enable or disable the selected DAC channel wave generation.
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @param Channel The selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_CHANNEL_1: DAC Channel1 selected
* @arg DAC_CHANNEL_2: DAC Channel2 selected
* @param Amplitude Unmask DAC channel LFSR for noise wave generation.
* This parameter can be one of the following values:
* @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
* @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
* @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
* @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
* @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
* @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
* @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
* @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
* @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
* @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
* @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
* @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude)
{
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(Channel));
assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
/* Process locked */
__HAL_LOCK(hdac);
/* Change DAC state */
hdac->State = HAL_DAC_STATE_BUSY;
/* Enable the noise wave generation for the selected DAC channel */
MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1) | (DAC_CR_MAMP1)) << (Channel & 0x10UL),
(DAC_CR_WAVE1_0 | Amplitude) << (Channel & 0x10UL));
/* Change DAC state */
hdac->State = HAL_DAC_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hdac);
/* Return function status */
return HAL_OK;
}
#if defined(DAC_CHANNEL2_SUPPORT)
/**
* @brief Set the specified data holding register value for dual DAC channel.
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @param Alignment Specifies the data alignment for dual channel DAC.
* This parameter can be one of the following values:
* DAC_ALIGN_8B_R: 8bit right data alignment selected
* DAC_ALIGN_12B_L: 12bit left data alignment selected
* DAC_ALIGN_12B_R: 12bit right data alignment selected
* @param Data1 Data for DAC Channel1 to be loaded in the selected data holding register.
* @param Data2 Data for DAC Channel2 to be loaded in the selected data holding register.
* @note In dual mode, a unique register access is required to write in both
* DAC channels at the same time.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef *hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
{
uint32_t data;
uint32_t tmp;
/* Check the parameters */
assert_param(IS_DAC_ALIGN(Alignment));
assert_param(IS_DAC_DATA(Data1));
assert_param(IS_DAC_DATA(Data2));
/* Calculate and set dual DAC data holding register value */
if (Alignment == DAC_ALIGN_8B_R)
{
data = ((uint32_t)Data2 << 8U) | Data1;
}
else
{
data = ((uint32_t)Data2 << 16U) | Data1;
}
tmp = (uint32_t)hdac->Instance;
tmp += DAC_DHR12RD_ALIGNMENT(Alignment);
/* Set the dual DAC selected data holding register */
*(__IO uint32_t *)tmp = data;
/* Return function status */
return HAL_OK;
}
/**
* @brief Conversion complete callback in non-blocking mode for Channel2.
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval None
*/
__weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef *hdac)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hdac);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file
*/
}
/**
* @brief Conversion half DMA transfer callback in non-blocking mode for Channel2.
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval None
*/
__weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef *hdac)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hdac);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file
*/
}
/**
* @brief Error DAC callback for Channel2.
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval None
*/
__weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hdac);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file
*/
}
/**
* @brief DMA underrun DAC callback for Channel2.
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval None
*/
__weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hdac);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file
*/
}
#endif /* DAC_CHANNEL2_SUPPORT */
/**
* @}
*/
/** @defgroup DACEx_Exported_Functions_Group3 Peripheral Control functions
* @brief Extended Peripheral Control functions
*
@verbatim
==============================================================================
##### Peripheral Control functions #####
==============================================================================
[..] This section provides functions allowing to:
(+) Set the specified data holding register value for DAC channel.
@endverbatim
* @{
*/
#if defined(DAC_CHANNEL2_SUPPORT)
/**
* @brief Return the last data output value of the selected DAC channel.
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval The selected DAC channel data output value.
*/
uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef *hdac)
{
uint32_t tmp = 0UL;
tmp |= hdac->Instance->DOR1;
tmp |= hdac->Instance->DOR2 << 16UL;
/* Returns the DAC channel data output register value */
return tmp;
}
#endif /* DAC_CHANNEL2_SUPPORT */
/**
* @}
*/
/**
* @}
*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup DACEx_Private_Functions DACEx private functions
* @brief Extended private functions
* @{
*/
#if defined(DAC_CHANNEL2_SUPPORT)
/**
* @brief DMA conversion complete callback.
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
{
DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
hdac->ConvCpltCallbackCh2(hdac);
#else
HAL_DACEx_ConvCpltCallbackCh2(hdac);
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
hdac->State = HAL_DAC_STATE_READY;
}
/**
* @brief DMA half transfer complete callback.
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
{
DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
/* Conversion complete callback */
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
hdac->ConvHalfCpltCallbackCh2(hdac);
#else
HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
}
/**
* @brief DMA error callback.
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
{
DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
/* Set DAC error code to DMA error */
hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
hdac->ErrorCallbackCh2(hdac);
#else
HAL_DACEx_ErrorCallbackCh2(hdac);
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
hdac->State = HAL_DAC_STATE_READY;
}
#endif /* DAC_CHANNEL2_SUPPORT */
/**
* @}
*/
/**
* @}
*/
#endif /* DAC */
#endif /* HAL_DAC_MODULE_ENABLED */
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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@@ -1,185 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_dcmi_ex.c
* @author MCD Application Team
* @brief DCMI Extension HAL module driver
* This file provides firmware functions to manage the following
* functionalities of DCMI extension peripheral:
* + Extension features functions
*
@verbatim
==============================================================================
##### DCMI peripheral extension features #####
==============================================================================
[..] Comparing to other previous devices, the DCMI interface for STM32F446xx
devices contains the following additional features :
(+) Support of Black and White cameras
##### How to use this driver #####
==============================================================================
[..] This driver provides functions to manage the Black and White feature
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup DCMIEx DCMIEx
* @brief DCMI Extended HAL module driver
* @{
*/
#ifdef HAL_DCMI_MODULE_ENABLED
#if defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) ||\
defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup DCMIEx_Exported_Functions DCMI Extended Exported Functions
* @{
*/
/**
* @}
*/
/** @addtogroup DCMI_Exported_Functions_Group1 Initialization and Configuration functions
* @{
*/
/**
* @brief Initializes the DCMI according to the specified
* parameters in the DCMI_InitTypeDef and create the associated handle.
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi)
{
/* Check the DCMI peripheral state */
if(hdcmi == NULL)
{
return HAL_ERROR;
}
/* Check function parameters */
assert_param(IS_DCMI_ALL_INSTANCE(hdcmi->Instance));
assert_param(IS_DCMI_PCKPOLARITY(hdcmi->Init.PCKPolarity));
assert_param(IS_DCMI_VSPOLARITY(hdcmi->Init.VSPolarity));
assert_param(IS_DCMI_HSPOLARITY(hdcmi->Init.HSPolarity));
assert_param(IS_DCMI_SYNCHRO(hdcmi->Init.SynchroMode));
assert_param(IS_DCMI_CAPTURE_RATE(hdcmi->Init.CaptureRate));
assert_param(IS_DCMI_EXTENDED_DATA(hdcmi->Init.ExtendedDataMode));
assert_param(IS_DCMI_MODE_JPEG(hdcmi->Init.JPEGMode));
#if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
assert_param(IS_DCMI_BYTE_SELECT_MODE(hdcmi->Init.ByteSelectMode));
assert_param(IS_DCMI_BYTE_SELECT_START(hdcmi->Init.ByteSelectStart));
assert_param(IS_DCMI_LINE_SELECT_MODE(hdcmi->Init.LineSelectMode));
assert_param(IS_DCMI_LINE_SELECT_START(hdcmi->Init.LineSelectStart));
#endif /* STM32F446xx || STM32F469xx || STM32F479xx */
if(hdcmi->State == HAL_DCMI_STATE_RESET)
{
/* Allocate lock resource and initialize it */
hdcmi->Lock = HAL_UNLOCKED;
/* Init the low level hardware */
/* Init the DCMI Callback settings */
#if (USE_HAL_DCMI_REGISTER_CALLBACKS == 1)
hdcmi->FrameEventCallback = HAL_DCMI_FrameEventCallback; /* Legacy weak FrameEventCallback */
hdcmi->VsyncEventCallback = HAL_DCMI_VsyncEventCallback; /* Legacy weak VsyncEventCallback */
hdcmi->LineEventCallback = HAL_DCMI_LineEventCallback; /* Legacy weak LineEventCallback */
hdcmi->ErrorCallback = HAL_DCMI_ErrorCallback; /* Legacy weak ErrorCallback */
if(hdcmi->MspInitCallback == NULL)
{
/* Legacy weak MspInit Callback */
hdcmi->MspInitCallback = HAL_DCMI_MspInit;
}
/* Initialize the low level hardware (MSP) */
hdcmi->MspInitCallback(hdcmi);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_DCMI_MspInit(hdcmi);
#endif /* (USE_HAL_DCMI_REGISTER_CALLBACKS) */
HAL_DCMI_MspInit(hdcmi);
}
/* Change the DCMI state */
hdcmi->State = HAL_DCMI_STATE_BUSY;
/* Configures the HS, VS, DE and PC polarity */
hdcmi->Instance->CR &= ~(DCMI_CR_PCKPOL | DCMI_CR_HSPOL | DCMI_CR_VSPOL | DCMI_CR_EDM_0 |\
DCMI_CR_EDM_1 | DCMI_CR_FCRC_0 | DCMI_CR_FCRC_1 | DCMI_CR_JPEG |\
DCMI_CR_ESS
#if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
| DCMI_CR_BSM_0 | DCMI_CR_BSM_1 | DCMI_CR_OEBS |\
DCMI_CR_LSM | DCMI_CR_OELS
#endif /* STM32F446xx || STM32F469xx || STM32F479xx */
);
hdcmi->Instance->CR |= (uint32_t)(hdcmi->Init.SynchroMode | hdcmi->Init.CaptureRate |\
hdcmi->Init.VSPolarity | hdcmi->Init.HSPolarity |\
hdcmi->Init.PCKPolarity | hdcmi->Init.ExtendedDataMode |\
hdcmi->Init.JPEGMode
#if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
| hdcmi->Init.ByteSelectMode |\
hdcmi->Init.ByteSelectStart | hdcmi->Init.LineSelectMode |\
hdcmi->Init.LineSelectStart
#endif /* STM32F446xx || STM32F469xx || STM32F479xx */
);
if(hdcmi->Init.SynchroMode == DCMI_SYNCHRO_EMBEDDED)
{
hdcmi->Instance->ESCR = (((uint32_t)hdcmi->Init.SyncroCode.FrameStartCode) |
((uint32_t)hdcmi->Init.SyncroCode.LineStartCode << DCMI_POSITION_ESCR_LSC)|
((uint32_t)hdcmi->Init.SyncroCode.LineEndCode << DCMI_POSITION_ESCR_LEC) |
((uint32_t)hdcmi->Init.SyncroCode.FrameEndCode << DCMI_POSITION_ESCR_FEC));
}
/* Enable the Line, Vsync, Error and Overrun interrupts */
__HAL_DCMI_ENABLE_IT(hdcmi, DCMI_IT_LINE | DCMI_IT_VSYNC | DCMI_IT_ERR | DCMI_IT_OVR);
/* Update error code */
hdcmi->ErrorCode = HAL_DCMI_ERROR_NONE;
/* Initialize the DCMI state*/
hdcmi->State = HAL_DCMI_STATE_READY;
return HAL_OK;
}
/**
* @}
*/
#endif /* STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx ||\
STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
#endif /* HAL_DCMI_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
@@ -1,315 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_dma_ex.c
* @author MCD Application Team
* @brief DMA Extension HAL module driver
* This file provides firmware functions to manage the following
* functionalities of the DMA Extension peripheral:
* + Extended features functions
*
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
The DMA Extension HAL driver can be used as follows:
(#) Start a multi buffer transfer using the HAL_DMA_MultiBufferStart() function
for polling mode or HAL_DMA_MultiBufferStart_IT() for interrupt mode.
-@- In Memory-to-Memory transfer mode, Multi (Double) Buffer mode is not allowed.
-@- When Multi (Double) Buffer mode is enabled the, transfer is circular by default.
-@- In Multi (Double) buffer mode, it is possible to update the base address for
the AHB memory port on the fly (DMA_SxM0AR or DMA_SxM1AR) when the stream is enabled.
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup DMAEx DMAEx
* @brief DMA Extended HAL module driver
* @{
*/
#ifdef HAL_DMA_MODULE_ENABLED
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private Constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @addtogroup DMAEx_Private_Functions
* @{
*/
static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
/**
* @}
*/
/* Exported functions ---------------------------------------------------------*/
/** @addtogroup DMAEx_Exported_Functions
* @{
*/
/** @addtogroup DMAEx_Exported_Functions_Group1
*
@verbatim
===============================================================================
##### Extended features functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Configure the source, destination address and data length and
Start MultiBuffer DMA transfer
(+) Configure the source, destination address and data length and
Start MultiBuffer DMA transfer with interrupt
(+) Change on the fly the memory0 or memory1 address.
@endverbatim
* @{
*/
/**
* @brief Starts the multi_buffer DMA Transfer.
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @param SrcAddress The source memory Buffer address
* @param DstAddress The destination memory Buffer address
* @param SecondMemAddress The second memory Buffer address in case of multi buffer Transfer
* @param DataLength The length of data to be transferred from source to destination
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
{
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
assert_param(IS_DMA_BUFFER_SIZE(DataLength));
/* Memory-to-memory transfer not supported in double buffering mode */
if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
{
hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
status = HAL_ERROR;
}
else
{
/* Process Locked */
__HAL_LOCK(hdma);
if(HAL_DMA_STATE_READY == hdma->State)
{
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
/* Enable the double buffer mode */
hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
/* Configure DMA Stream destination address */
hdma->Instance->M1AR = SecondMemAddress;
/* Configure the source, destination address and the data length */
DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
/* Enable the peripheral */
__HAL_DMA_ENABLE(hdma);
}
else
{
/* Return error status */
status = HAL_BUSY;
}
}
return status;
}
/**
* @brief Starts the multi_buffer DMA Transfer with interrupt enabled.
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @param SrcAddress The source memory Buffer address
* @param DstAddress The destination memory Buffer address
* @param SecondMemAddress The second memory Buffer address in case of multi buffer Transfer
* @param DataLength The length of data to be transferred from source to destination
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
{
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
assert_param(IS_DMA_BUFFER_SIZE(DataLength));
/* Memory-to-memory transfer not supported in double buffering mode */
if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
{
hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
return HAL_ERROR;
}
/* Check callback functions */
if ((NULL == hdma->XferCpltCallback) || (NULL == hdma->XferM1CpltCallback) || (NULL == hdma->XferErrorCallback))
{
hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
return HAL_ERROR;
}
/* Process locked */
__HAL_LOCK(hdma);
if(HAL_DMA_STATE_READY == hdma->State)
{
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
/* Initialize the error code */
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
/* Enable the Double buffer mode */
hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
/* Configure DMA Stream destination address */
hdma->Instance->M1AR = SecondMemAddress;
/* Configure the source, destination address and the data length */
DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
/* Clear all flags */
__HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
__HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
__HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
__HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
__HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
/* Enable Common interrupts*/
hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME;
hdma->Instance->FCR |= DMA_IT_FE;
if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
{
hdma->Instance->CR |= DMA_IT_HT;
}
/* Enable the peripheral */
__HAL_DMA_ENABLE(hdma);
}
else
{
/* Process unlocked */
__HAL_UNLOCK(hdma);
/* Return error status */
status = HAL_BUSY;
}
return status;
}
/**
* @brief Change the memory0 or memory1 address on the fly.
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @param Address The new address
* @param memory the memory to be changed, This parameter can be one of
* the following values:
* MEMORY0 /
* MEMORY1
* @note The MEMORY0 address can be changed only when the current transfer use
* MEMORY1 and the MEMORY1 address can be changed only when the current
* transfer use MEMORY0.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory)
{
if(memory == MEMORY0)
{
/* change the memory0 address */
hdma->Instance->M0AR = Address;
}
else
{
/* change the memory1 address */
hdma->Instance->M1AR = Address;
}
return HAL_OK;
}
/**
* @}
*/
/**
* @}
*/
/** @addtogroup DMAEx_Private_Functions
* @{
*/
/**
* @brief Set the DMA Transfer parameter.
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @param SrcAddress The source memory Buffer address
* @param DstAddress The destination memory Buffer address
* @param DataLength The length of data to be transferred from source to destination
* @retval HAL status
*/
static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
/* Configure DMA Stream data length */
hdma->Instance->NDTR = DataLength;
/* Peripheral to Memory */
if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
{
/* Configure DMA Stream destination address */
hdma->Instance->PAR = DstAddress;
/* Configure DMA Stream source address */
hdma->Instance->M0AR = SrcAddress;
}
/* Memory to Peripheral */
else
{
/* Configure DMA Stream source address */
hdma->Instance->PAR = SrcAddress;
/* Configure DMA Stream destination address */
hdma->Instance->M0AR = DstAddress;
}
}
/**
* @}
*/
#endif /* HAL_DMA_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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File diff suppressed because it is too large Load Diff
@@ -1,549 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_exti.c
* @author MCD Application Team
* @brief EXTI HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Extended Interrupts and events controller (EXTI) peripheral:
* + Initialization and de-initialization functions
* + IO operation functions
*
@verbatim
==============================================================================
##### EXTI Peripheral features #####
==============================================================================
[..]
(+) Each Exti line can be configured within this driver.
(+) Exti line can be configured in 3 different modes
(++) Interrupt
(++) Event
(++) Both of them
(+) Configurable Exti lines can be configured with 3 different triggers
(++) Rising
(++) Falling
(++) Both of them
(+) When set in interrupt mode, configurable Exti lines have two different
interrupts pending registers which allow to distinguish which transition
occurs:
(++) Rising edge pending interrupt
(++) Falling
(+) Exti lines 0 to 15 are linked to gpio pin number 0 to 15. Gpio port can
be selected through multiplexer.
##### How to use this driver #####
==============================================================================
[..]
(#) Configure the EXTI line using HAL_EXTI_SetConfigLine().
(++) Choose the interrupt line number by setting "Line" member from
EXTI_ConfigTypeDef structure.
(++) Configure the interrupt and/or event mode using "Mode" member from
EXTI_ConfigTypeDef structure.
(++) For configurable lines, configure rising and/or falling trigger
"Trigger" member from EXTI_ConfigTypeDef structure.
(++) For Exti lines linked to gpio, choose gpio port using "GPIOSel"
member from GPIO_InitTypeDef structure.
(#) Get current Exti configuration of a dedicated line using
HAL_EXTI_GetConfigLine().
(++) Provide exiting handle as parameter.
(++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter.
(#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine().
(++) Provide exiting handle as parameter.
(#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback().
(++) Provide exiting handle as first parameter.
(++) Provide which callback will be registered using one value from
EXTI_CallbackIDTypeDef.
(++) Provide callback function pointer.
(#) Get interrupt pending bit using HAL_EXTI_GetPending().
(#) Clear interrupt pending bit using HAL_EXTI_GetPending().
(#) Generate software interrupt using HAL_EXTI_GenerateSWI().
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @addtogroup EXTI
* @{
*/
/** MISRA C:2012 deviation rule has been granted for following rule:
* Rule-18.1_b - Medium: Array `EXTICR' 1st subscript interval [0,7] may be out
* of bounds [0,3] in following API :
* HAL_EXTI_SetConfigLine
* HAL_EXTI_GetConfigLine
* HAL_EXTI_ClearConfigLine
*/
#ifdef HAL_EXTI_MODULE_ENABLED
/* Private typedef -----------------------------------------------------------*/
/* Private defines -----------------------------------------------------------*/
/** @defgroup EXTI_Private_Constants EXTI Private Constants
* @{
*/
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup EXTI_Exported_Functions
* @{
*/
/** @addtogroup EXTI_Exported_Functions_Group1
* @brief Configuration functions
*
@verbatim
===============================================================================
##### Configuration functions #####
===============================================================================
@endverbatim
* @{
*/
/**
* @brief Set configuration of a dedicated Exti line.
* @param hexti Exti handle.
* @param pExtiConfig Pointer on EXTI configuration to be set.
* @retval HAL Status.
*/
HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
{
uint32_t regval;
uint32_t linepos;
uint32_t maskline;
/* Check null pointer */
if ((hexti == NULL) || (pExtiConfig == NULL))
{
return HAL_ERROR;
}
/* Check parameters */
assert_param(IS_EXTI_LINE(pExtiConfig->Line));
assert_param(IS_EXTI_MODE(pExtiConfig->Mode));
/* Assign line number to handle */
hexti->Line = pExtiConfig->Line;
/* Compute line mask */
linepos = (pExtiConfig->Line & EXTI_PIN_MASK);
maskline = (1uL << linepos);
/* Configure triggers for configurable lines */
if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u)
{
assert_param(IS_EXTI_TRIGGER(pExtiConfig->Trigger));
/* Configure rising trigger */
/* Mask or set line */
if ((pExtiConfig->Trigger & EXTI_TRIGGER_RISING) != 0x00u)
{
EXTI->RTSR |= maskline;
}
else
{
EXTI->RTSR &= ~maskline;
}
/* Configure falling trigger */
/* Mask or set line */
if ((pExtiConfig->Trigger & EXTI_TRIGGER_FALLING) != 0x00u)
{
EXTI->FTSR |= maskline;
}
else
{
EXTI->FTSR &= ~maskline;
}
/* Configure gpio port selection in case of gpio exti line */
if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO)
{
assert_param(IS_EXTI_GPIO_PORT(pExtiConfig->GPIOSel));
assert_param(IS_EXTI_GPIO_PIN(linepos));
regval = SYSCFG->EXTICR[linepos >> 2u];
regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
SYSCFG->EXTICR[linepos >> 2u] = regval;
}
}
/* Configure interrupt mode : read current mode */
/* Mask or set line */
if ((pExtiConfig->Mode & EXTI_MODE_INTERRUPT) != 0x00u)
{
EXTI->IMR |= maskline;
}
else
{
EXTI->IMR &= ~maskline;
}
/* Configure event mode : read current mode */
/* Mask or set line */
if ((pExtiConfig->Mode & EXTI_MODE_EVENT) != 0x00u)
{
EXTI->EMR |= maskline;
}
else
{
EXTI->EMR &= ~maskline;
}
return HAL_OK;
}
/**
* @brief Get configuration of a dedicated Exti line.
* @param hexti Exti handle.
* @param pExtiConfig Pointer on structure to store Exti configuration.
* @retval HAL Status.
*/
HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
{
uint32_t regval;
uint32_t linepos;
uint32_t maskline;
/* Check null pointer */
if ((hexti == NULL) || (pExtiConfig == NULL))
{
return HAL_ERROR;
}
/* Check the parameter */
assert_param(IS_EXTI_LINE(hexti->Line));
/* Store handle line number to configuration structure */
pExtiConfig->Line = hexti->Line;
/* Compute line mask */
linepos = (pExtiConfig->Line & EXTI_PIN_MASK);
maskline = (1uL << linepos);
/* 1] Get core mode : interrupt */
/* Check if selected line is enable */
if ((EXTI->IMR & maskline) != 0x00u)
{
pExtiConfig->Mode = EXTI_MODE_INTERRUPT;
}
else
{
pExtiConfig->Mode = EXTI_MODE_NONE;
}
/* Get event mode */
/* Check if selected line is enable */
if ((EXTI->EMR & maskline) != 0x00u)
{
pExtiConfig->Mode |= EXTI_MODE_EVENT;
}
/* Get default Trigger and GPIOSel configuration */
pExtiConfig->Trigger = EXTI_TRIGGER_NONE;
pExtiConfig->GPIOSel = 0x00u;
/* 2] Get trigger for configurable lines : rising */
if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u)
{
/* Check if configuration of selected line is enable */
if ((EXTI->RTSR & maskline) != 0x00u)
{
pExtiConfig->Trigger = EXTI_TRIGGER_RISING;
}
/* Get falling configuration */
/* Check if configuration of selected line is enable */
if ((EXTI->FTSR & maskline) != 0x00u)
{
pExtiConfig->Trigger |= EXTI_TRIGGER_FALLING;
}
/* Get Gpio port selection for gpio lines */
if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO)
{
assert_param(IS_EXTI_GPIO_PIN(linepos));
regval = SYSCFG->EXTICR[linepos >> 2u];
pExtiConfig->GPIOSel = ((regval << (SYSCFG_EXTICR1_EXTI1_Pos * (3uL - (linepos & 0x03u)))) >> 24);
}
}
return HAL_OK;
}
/**
* @brief Clear whole configuration of a dedicated Exti line.
* @param hexti Exti handle.
* @retval HAL Status.
*/
HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti)
{
uint32_t regval;
uint32_t linepos;
uint32_t maskline;
/* Check null pointer */
if (hexti == NULL)
{
return HAL_ERROR;
}
/* Check the parameter */
assert_param(IS_EXTI_LINE(hexti->Line));
/* compute line mask */
linepos = (hexti->Line & EXTI_PIN_MASK);
maskline = (1uL << linepos);
/* 1] Clear interrupt mode */
EXTI->IMR = (EXTI->IMR & ~maskline);
/* 2] Clear event mode */
EXTI->EMR = (EXTI->EMR & ~maskline);
/* 3] Clear triggers in case of configurable lines */
if ((hexti->Line & EXTI_CONFIG) != 0x00u)
{
EXTI->RTSR = (EXTI->RTSR & ~maskline);
EXTI->FTSR = (EXTI->FTSR & ~maskline);
/* Get Gpio port selection for gpio lines */
if ((hexti->Line & EXTI_GPIO) == EXTI_GPIO)
{
assert_param(IS_EXTI_GPIO_PIN(linepos));
regval = SYSCFG->EXTICR[linepos >> 2u];
regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
SYSCFG->EXTICR[linepos >> 2u] = regval;
}
}
return HAL_OK;
}
/**
* @brief Register callback for a dedicated Exti line.
* @param hexti Exti handle.
* @param CallbackID User callback identifier.
* This parameter can be one of @arg @ref EXTI_CallbackIDTypeDef values.
* @param pPendingCbfn function pointer to be stored as callback.
* @retval HAL Status.
*/
HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void))
{
HAL_StatusTypeDef status = HAL_OK;
switch (CallbackID)
{
case HAL_EXTI_COMMON_CB_ID:
hexti->PendingCallback = pPendingCbfn;
break;
default:
status = HAL_ERROR;
break;
}
return status;
}
/**
* @brief Store line number as handle private field.
* @param hexti Exti handle.
* @param ExtiLine Exti line number.
* This parameter can be from 0 to @ref EXTI_LINE_NB.
* @retval HAL Status.
*/
HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine)
{
/* Check the parameters */
assert_param(IS_EXTI_LINE(ExtiLine));
/* Check null pointer */
if (hexti == NULL)
{
return HAL_ERROR;
}
else
{
/* Store line number as handle private field */
hexti->Line = ExtiLine;
return HAL_OK;
}
}
/**
* @}
*/
/** @addtogroup EXTI_Exported_Functions_Group2
* @brief EXTI IO functions.
*
@verbatim
===============================================================================
##### IO operation functions #####
===============================================================================
@endverbatim
* @{
*/
/**
* @brief Handle EXTI interrupt request.
* @param hexti Exti handle.
* @retval none.
*/
void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti)
{
uint32_t regval;
uint32_t maskline;
/* Compute line mask */
maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
/* Get pending bit */
regval = (EXTI->PR & maskline);
if (regval != 0x00u)
{
/* Clear pending bit */
EXTI->PR = maskline;
/* Call callback */
if (hexti->PendingCallback != NULL)
{
hexti->PendingCallback();
}
}
}
/**
* @brief Get interrupt pending bit of a dedicated line.
* @param hexti Exti handle.
* @param Edge Specify which pending edge as to be checked.
* This parameter can be one of the following values:
* @arg @ref EXTI_TRIGGER_RISING_FALLING
* This parameter is kept for compatibility with other series.
* @retval 1 if interrupt is pending else 0.
*/
uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
{
uint32_t regval;
uint32_t linepos;
uint32_t maskline;
/* Check parameters */
assert_param(IS_EXTI_LINE(hexti->Line));
assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
assert_param(IS_EXTI_PENDING_EDGE(Edge));
/* Compute line mask */
linepos = (hexti->Line & EXTI_PIN_MASK);
maskline = (1uL << linepos);
/* return 1 if bit is set else 0 */
regval = ((EXTI->PR & maskline) >> linepos);
return regval;
}
/**
* @brief Clear interrupt pending bit of a dedicated line.
* @param hexti Exti handle.
* @param Edge Specify which pending edge as to be clear.
* This parameter can be one of the following values:
* @arg @ref EXTI_TRIGGER_RISING_FALLING
* This parameter is kept for compatibility with other series.
* @retval None.
*/
void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
{
uint32_t maskline;
/* Check parameters */
assert_param(IS_EXTI_LINE(hexti->Line));
assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
assert_param(IS_EXTI_PENDING_EDGE(Edge));
/* Compute line mask */
maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
/* Clear Pending bit */
EXTI->PR = maskline;
}
/**
* @brief Generate a software interrupt for a dedicated line.
* @param hexti Exti handle.
* @retval None.
*/
void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti)
{
uint32_t maskline;
/* Check parameters */
assert_param(IS_EXTI_LINE(hexti->Line));
assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
/* Compute line mask */
maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
/* Generate Software interrupt */
EXTI->SWIER = maskline;
}
/**
* @}
*/
/**
* @}
*/
#endif /* HAL_EXTI_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
@@ -1,778 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_flash.c
* @author MCD Application Team
* @brief FLASH HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the internal FLASH memory:
* + Program operations functions
* + Memory Control functions
* + Peripheral Errors functions
*
@verbatim
==============================================================================
##### FLASH peripheral features #####
==============================================================================
[..] The Flash memory interface manages CPU AHB I-Code and D-Code accesses
to the Flash memory. It implements the erase and program Flash memory operations
and the read and write protection mechanisms.
[..] The Flash memory interface accelerates code execution with a system of instruction
prefetch and cache lines.
[..] The FLASH main features are:
(+) Flash memory read operations
(+) Flash memory program/erase operations
(+) Read / write protections
(+) Prefetch on I-Code
(+) 64 cache lines of 128 bits on I-Code
(+) 8 cache lines of 128 bits on D-Code
##### How to use this driver #####
==============================================================================
[..]
This driver provides functions and macros to configure and program the FLASH
memory of all STM32F4xx devices.
(#) FLASH Memory IO Programming functions:
(++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
HAL_FLASH_Lock() functions
(++) Program functions: byte, half word, word and double word
(++) There Two modes of programming :
(+++) Polling mode using HAL_FLASH_Program() function
(+++) Interrupt mode using HAL_FLASH_Program_IT() function
(#) Interrupts and flags management functions :
(++) Handle FLASH interrupts by calling HAL_FLASH_IRQHandler()
(++) Wait for last FLASH operation according to its status
(++) Get error flag status by calling HAL_SetErrorCode()
[..]
In addition to these functions, this driver includes a set of macros allowing
to handle the following operations:
(+) Set the latency
(+) Enable/Disable the prefetch buffer
(+) Enable/Disable the Instruction cache and the Data cache
(+) Reset the Instruction cache and the Data cache
(+) Enable/Disable the FLASH interrupts
(+) Monitor the FLASH flags status
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup FLASH FLASH
* @brief FLASH HAL module driver
* @{
*/
#ifdef HAL_FLASH_MODULE_ENABLED
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/** @addtogroup FLASH_Private_Constants
* @{
*/
#define FLASH_TIMEOUT_VALUE 50000U /* 50 s */
/**
* @}
*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/** @addtogroup FLASH_Private_Variables
* @{
*/
/* Variable used for Erase sectors under interruption */
FLASH_ProcessTypeDef pFlash;
/**
* @}
*/
/* Private function prototypes -----------------------------------------------*/
/** @addtogroup FLASH_Private_Functions
* @{
*/
/* Program operations */
static void FLASH_Program_DoubleWord(uint32_t Address, uint64_t Data);
static void FLASH_Program_Word(uint32_t Address, uint32_t Data);
static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data);
static void FLASH_Program_Byte(uint32_t Address, uint8_t Data);
static void FLASH_SetErrorCode(void);
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup FLASH_Exported_Functions FLASH Exported Functions
* @{
*/
/** @defgroup FLASH_Exported_Functions_Group1 Programming operation functions
* @brief Programming operation functions
*
@verbatim
===============================================================================
##### Programming operation functions #####
===============================================================================
[..]
This subsection provides a set of functions allowing to manage the FLASH
program operations.
@endverbatim
* @{
*/
/**
* @brief Program byte, halfword, word or double word at a specified address
* @param TypeProgram Indicate the way to program at a specified address.
* This parameter can be a value of @ref FLASH_Type_Program
* @param Address specifies the address to be programmed.
* @param Data specifies the data to be programmed
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
{
HAL_StatusTypeDef status = HAL_ERROR;
/* Process Locked */
__HAL_LOCK(&pFlash);
/* Check the parameters */
assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram));
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
if(status == HAL_OK)
{
if(TypeProgram == FLASH_TYPEPROGRAM_BYTE)
{
/*Program byte (8-bit) at a specified address.*/
FLASH_Program_Byte(Address, (uint8_t) Data);
}
else if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
{
/*Program halfword (16-bit) at a specified address.*/
FLASH_Program_HalfWord(Address, (uint16_t) Data);
}
else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
{
/*Program word (32-bit) at a specified address.*/
FLASH_Program_Word(Address, (uint32_t) Data);
}
else
{
/*Program double word (64-bit) at a specified address.*/
FLASH_Program_DoubleWord(Address, Data);
}
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
/* If the program operation is completed, disable the PG Bit */
FLASH->CR &= (~FLASH_CR_PG);
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
return status;
}
/**
* @brief Program byte, halfword, word or double word at a specified address with interrupt enabled.
* @param TypeProgram Indicate the way to program at a specified address.
* This parameter can be a value of @ref FLASH_Type_Program
* @param Address specifies the address to be programmed.
* @param Data specifies the data to be programmed
*
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
{
HAL_StatusTypeDef status = HAL_OK;
/* Process Locked */
__HAL_LOCK(&pFlash);
/* Check the parameters */
assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram));
/* Enable End of FLASH Operation interrupt */
__HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
/* Enable Error source interrupt */
__HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAM;
pFlash.Address = Address;
if(TypeProgram == FLASH_TYPEPROGRAM_BYTE)
{
/*Program byte (8-bit) at a specified address.*/
FLASH_Program_Byte(Address, (uint8_t) Data);
}
else if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
{
/*Program halfword (16-bit) at a specified address.*/
FLASH_Program_HalfWord(Address, (uint16_t) Data);
}
else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
{
/*Program word (32-bit) at a specified address.*/
FLASH_Program_Word(Address, (uint32_t) Data);
}
else
{
/*Program double word (64-bit) at a specified address.*/
FLASH_Program_DoubleWord(Address, Data);
}
return status;
}
/**
* @brief This function handles FLASH interrupt request.
* @retval None
*/
void HAL_FLASH_IRQHandler(void)
{
uint32_t addresstmp = 0U;
/* Check FLASH operation error flags */
#if defined(FLASH_SR_RDERR)
if(__HAL_FLASH_GET_FLAG((FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \
FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR | FLASH_FLAG_RDERR)) != RESET)
#else
if(__HAL_FLASH_GET_FLAG((FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \
FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR)) != RESET)
#endif /* FLASH_SR_RDERR */
{
if(pFlash.ProcedureOnGoing == FLASH_PROC_SECTERASE)
{
/*return the faulty sector*/
addresstmp = pFlash.Sector;
pFlash.Sector = 0xFFFFFFFFU;
}
else if(pFlash.ProcedureOnGoing == FLASH_PROC_MASSERASE)
{
/*return the faulty bank*/
addresstmp = pFlash.Bank;
}
else
{
/*return the faulty address*/
addresstmp = pFlash.Address;
}
/*Save the Error code*/
FLASH_SetErrorCode();
/* FLASH error interrupt user callback */
HAL_FLASH_OperationErrorCallback(addresstmp);
/*Stop the procedure ongoing*/
pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
}
/* Check FLASH End of Operation flag */
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP) != RESET)
{
/* Clear FLASH End of Operation pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
if(pFlash.ProcedureOnGoing == FLASH_PROC_SECTERASE)
{
/*Nb of sector to erased can be decreased*/
pFlash.NbSectorsToErase--;
/* Check if there are still sectors to erase*/
if(pFlash.NbSectorsToErase != 0U)
{
addresstmp = pFlash.Sector;
/*Indicate user which sector has been erased*/
HAL_FLASH_EndOfOperationCallback(addresstmp);
/*Increment sector number*/
pFlash.Sector++;
addresstmp = pFlash.Sector;
FLASH_Erase_Sector(addresstmp, pFlash.VoltageForErase);
}
else
{
/*No more sectors to Erase, user callback can be called.*/
/*Reset Sector and stop Erase sectors procedure*/
pFlash.Sector = addresstmp = 0xFFFFFFFFU;
pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
/* Flush the caches to be sure of the data consistency */
FLASH_FlushCaches() ;
/* FLASH EOP interrupt user callback */
HAL_FLASH_EndOfOperationCallback(addresstmp);
}
}
else
{
if(pFlash.ProcedureOnGoing == FLASH_PROC_MASSERASE)
{
/* MassErase ended. Return the selected bank */
/* Flush the caches to be sure of the data consistency */
FLASH_FlushCaches() ;
/* FLASH EOP interrupt user callback */
HAL_FLASH_EndOfOperationCallback(pFlash.Bank);
}
else
{
/*Program ended. Return the selected address*/
/* FLASH EOP interrupt user callback */
HAL_FLASH_EndOfOperationCallback(pFlash.Address);
}
pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
}
}
if(pFlash.ProcedureOnGoing == FLASH_PROC_NONE)
{
/* Operation is completed, disable the PG, SER, SNB and MER Bits */
CLEAR_BIT(FLASH->CR, (FLASH_CR_PG | FLASH_CR_SER | FLASH_CR_SNB | FLASH_MER_BIT));
/* Disable End of FLASH Operation interrupt */
__HAL_FLASH_DISABLE_IT(FLASH_IT_EOP);
/* Disable Error source interrupt */
__HAL_FLASH_DISABLE_IT(FLASH_IT_ERR);
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
}
}
/**
* @brief FLASH end of operation interrupt callback
* @param ReturnValue The value saved in this parameter depends on the ongoing procedure
* Mass Erase: Bank number which has been requested to erase
* Sectors Erase: Sector which has been erased
* (if 0xFFFFFFFFU, it means that all the selected sectors have been erased)
* Program: Address which was selected for data program
* @retval None
*/
__weak void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(ReturnValue);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_FLASH_EndOfOperationCallback could be implemented in the user file
*/
}
/**
* @brief FLASH operation error interrupt callback
* @param ReturnValue The value saved in this parameter depends on the ongoing procedure
* Mass Erase: Bank number which has been requested to erase
* Sectors Erase: Sector number which returned an error
* Program: Address which was selected for data program
* @retval None
*/
__weak void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(ReturnValue);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_FLASH_OperationErrorCallback could be implemented in the user file
*/
}
/**
* @}
*/
/** @defgroup FLASH_Exported_Functions_Group2 Peripheral Control functions
* @brief management functions
*
@verbatim
===============================================================================
##### Peripheral Control functions #####
===============================================================================
[..]
This subsection provides a set of functions allowing to control the FLASH
memory operations.
@endverbatim
* @{
*/
/**
* @brief Unlock the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Unlock(void)
{
HAL_StatusTypeDef status = HAL_OK;
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
{
/* Authorize the FLASH Registers access */
WRITE_REG(FLASH->KEYR, FLASH_KEY1);
WRITE_REG(FLASH->KEYR, FLASH_KEY2);
/* Verify Flash is unlocked */
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
{
status = HAL_ERROR;
}
}
return status;
}
/**
* @brief Locks the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Lock(void)
{
/* Set the LOCK Bit to lock the FLASH Registers access */
FLASH->CR |= FLASH_CR_LOCK;
return HAL_OK;
}
/**
* @brief Unlock the FLASH Option Control Registers access.
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void)
{
if((FLASH->OPTCR & FLASH_OPTCR_OPTLOCK) != RESET)
{
/* Authorizes the Option Byte register programming */
FLASH->OPTKEYR = FLASH_OPT_KEY1;
FLASH->OPTKEYR = FLASH_OPT_KEY2;
}
else
{
return HAL_ERROR;
}
return HAL_OK;
}
/**
* @brief Lock the FLASH Option Control Registers access.
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_OB_Lock(void)
{
/* Set the OPTLOCK Bit to lock the FLASH Option Byte Registers access */
FLASH->OPTCR |= FLASH_OPTCR_OPTLOCK;
return HAL_OK;
}
/**
* @brief Launch the option byte loading.
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_OB_Launch(void)
{
/* Set the OPTSTRT bit in OPTCR register */
*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= FLASH_OPTCR_OPTSTRT;
/* Wait for last operation to be completed */
return(FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE));
}
/**
* @}
*/
/** @defgroup FLASH_Exported_Functions_Group3 Peripheral State and Errors functions
* @brief Peripheral Errors functions
*
@verbatim
===============================================================================
##### Peripheral Errors functions #####
===============================================================================
[..]
This subsection permits to get in run-time Errors of the FLASH peripheral.
@endverbatim
* @{
*/
/**
* @brief Get the specific FLASH error flag.
* @retval FLASH_ErrorCode: The returned value can be a combination of:
* @arg HAL_FLASH_ERROR_RD: FLASH Read Protection error flag (PCROP)
* @arg HAL_FLASH_ERROR_PGS: FLASH Programming Sequence error flag
* @arg HAL_FLASH_ERROR_PGP: FLASH Programming Parallelism error flag
* @arg HAL_FLASH_ERROR_PGA: FLASH Programming Alignment error flag
* @arg HAL_FLASH_ERROR_WRP: FLASH Write protected error flag
* @arg HAL_FLASH_ERROR_OPERATION: FLASH operation Error flag
*/
uint32_t HAL_FLASH_GetError(void)
{
return pFlash.ErrorCode;
}
/**
* @}
*/
/**
* @brief Wait for a FLASH operation to complete.
* @param Timeout maximum flash operationtimeout
* @retval HAL Status
*/
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
{
uint32_t tickstart = 0U;
/* Clear Error Code */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
/* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
Even if the FLASH operation fails, the BUSY flag will be reset and an error
flag will be set */
/* Get tick */
tickstart = HAL_GetTick();
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) != RESET)
{
if(Timeout != HAL_MAX_DELAY)
{
if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
{
return HAL_TIMEOUT;
}
}
}
/* Check FLASH End of Operation flag */
if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP) != RESET)
{
/* Clear FLASH End of Operation pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
}
#if defined(FLASH_SR_RDERR)
if(__HAL_FLASH_GET_FLAG((FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \
FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR | FLASH_FLAG_RDERR)) != RESET)
#else
if(__HAL_FLASH_GET_FLAG((FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \
FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR)) != RESET)
#endif /* FLASH_SR_RDERR */
{
/*Save the error code*/
FLASH_SetErrorCode();
return HAL_ERROR;
}
/* If there is no error flag set */
return HAL_OK;
}
/**
* @brief Program a double word (64-bit) at a specified address.
* @note This function must be used when the device voltage range is from
* 2.7V to 3.6V and Vpp in the range 7V to 9V.
*
* @note If an erase and a program operations are requested simultaneously,
* the erase operation is performed before the program one.
*
* @param Address specifies the address to be programmed.
* @param Data specifies the data to be programmed.
* @retval None
*/
static void FLASH_Program_DoubleWord(uint32_t Address, uint64_t Data)
{
/* Check the parameters */
assert_param(IS_FLASH_ADDRESS(Address));
/* If the previous operation is completed, proceed to program the new data */
CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
FLASH->CR |= FLASH_PSIZE_DOUBLE_WORD;
FLASH->CR |= FLASH_CR_PG;
/* Program first word */
*(__IO uint32_t*)Address = (uint32_t)Data;
/* Barrier to ensure programming is performed in 2 steps, in right order
(independently of compiler optimization behavior) */
__ISB();
/* Program second word */
*(__IO uint32_t*)(Address+4) = (uint32_t)(Data >> 32);
}
/**
* @brief Program word (32-bit) at a specified address.
* @note This function must be used when the device voltage range is from
* 2.7V to 3.6V.
*
* @note If an erase and a program operations are requested simultaneously,
* the erase operation is performed before the program one.
*
* @param Address specifies the address to be programmed.
* @param Data specifies the data to be programmed.
* @retval None
*/
static void FLASH_Program_Word(uint32_t Address, uint32_t Data)
{
/* Check the parameters */
assert_param(IS_FLASH_ADDRESS(Address));
/* If the previous operation is completed, proceed to program the new data */
CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
FLASH->CR |= FLASH_PSIZE_WORD;
FLASH->CR |= FLASH_CR_PG;
*(__IO uint32_t*)Address = Data;
}
/**
* @brief Program a half-word (16-bit) at a specified address.
* @note This function must be used when the device voltage range is from
* 2.1V to 3.6V.
*
* @note If an erase and a program operations are requested simultaneously,
* the erase operation is performed before the program one.
*
* @param Address specifies the address to be programmed.
* @param Data specifies the data to be programmed.
* @retval None
*/
static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
{
/* Check the parameters */
assert_param(IS_FLASH_ADDRESS(Address));
/* If the previous operation is completed, proceed to program the new data */
CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
FLASH->CR |= FLASH_PSIZE_HALF_WORD;
FLASH->CR |= FLASH_CR_PG;
*(__IO uint16_t*)Address = Data;
}
/**
* @brief Program byte (8-bit) at a specified address.
* @note This function must be used when the device voltage range is from
* 1.8V to 3.6V.
*
* @note If an erase and a program operations are requested simultaneously,
* the erase operation is performed before the program one.
*
* @param Address specifies the address to be programmed.
* @param Data specifies the data to be programmed.
* @retval None
*/
static void FLASH_Program_Byte(uint32_t Address, uint8_t Data)
{
/* Check the parameters */
assert_param(IS_FLASH_ADDRESS(Address));
/* If the previous operation is completed, proceed to program the new data */
CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
FLASH->CR |= FLASH_PSIZE_BYTE;
FLASH->CR |= FLASH_CR_PG;
*(__IO uint8_t*)Address = Data;
}
/**
* @brief Set the specific FLASH error flag.
* @retval None
*/
static void FLASH_SetErrorCode(void)
{
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) != RESET)
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
/* Clear FLASH write protection error pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_WRPERR);
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) != RESET)
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_PGA;
/* Clear FLASH Programming alignment error pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_PGAERR);
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGPERR) != RESET)
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_PGP;
/* Clear FLASH Programming parallelism error pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_PGPERR);
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGSERR) != RESET)
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_PGS;
/* Clear FLASH Programming sequence error pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_PGSERR);
}
#if defined(FLASH_SR_RDERR)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) != RESET)
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_RD;
/* Clear FLASH Proprietary readout protection error pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_RDERR);
}
#endif /* FLASH_SR_RDERR */
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPERR) != RESET)
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_OPERATION;
/* Clear FLASH Operation error pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPERR);
}
}
/**
* @}
*/
#endif /* HAL_FLASH_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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@@ -1,175 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_flash_ramfunc.c
* @author MCD Application Team
* @brief FLASH RAMFUNC module driver.
* This file provides a FLASH firmware functions which should be
* executed from internal SRAM
* + Stop/Start the flash interface while System Run
* + Enable/Disable the flash sleep while System Run
@verbatim
==============================================================================
##### APIs executed from Internal RAM #####
==============================================================================
[..]
*** ARM Compiler ***
--------------------
[..] RAM functions are defined using the toolchain options.
Functions that are be executed in RAM should reside in a separate
source module. Using the 'Options for File' dialog you can simply change
the 'Code / Const' area of a module to a memory space in physical RAM.
Available memory areas are declared in the 'Target' tab of the
Options for Target' dialog.
*** ICCARM Compiler ***
-----------------------
[..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
*** GNU Compiler ***
--------------------
[..] RAM functions are defined using a specific toolchain attribute
"__attribute__((section(".RamFunc")))".
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup FLASH_RAMFUNC FLASH RAMFUNC
* @brief FLASH functions executed from RAM
* @{
*/
#ifdef HAL_FLASH_MODULE_ENABLED
#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
defined(STM32F412Rx) || defined(STM32F412Cx)
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH RAMFUNC Exported Functions
* @{
*/
/** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions executed from internal RAM
* @brief Peripheral Extended features functions
*
@verbatim
===============================================================================
##### ramfunc functions #####
===============================================================================
[..]
This subsection provides a set of functions that should be executed from RAM
transfers.
@endverbatim
* @{
*/
/**
* @brief Stop the flash interface while System Run
* @note This mode is only available for STM32F41xxx/STM32F446xx devices.
* @note This mode couldn't be set while executing with the flash itself.
* It should be done with specific routine executed from RAM.
* @retval HAL status
*/
__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StopFlashInterfaceClk(void)
{
/* Enable Power ctrl clock */
__HAL_RCC_PWR_CLK_ENABLE();
/* Stop the flash interface while System Run */
SET_BIT(PWR->CR, PWR_CR_FISSR);
return HAL_OK;
}
/**
* @brief Start the flash interface while System Run
* @note This mode is only available for STM32F411xx/STM32F446xx devices.
* @note This mode couldn't be set while executing with the flash itself.
* It should be done with specific routine executed from RAM.
* @retval HAL status
*/
__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StartFlashInterfaceClk(void)
{
/* Enable Power ctrl clock */
__HAL_RCC_PWR_CLK_ENABLE();
/* Start the flash interface while System Run */
CLEAR_BIT(PWR->CR, PWR_CR_FISSR);
return HAL_OK;
}
/**
* @brief Enable the flash sleep while System Run
* @note This mode is only available for STM32F41xxx/STM32F446xx devices.
* @note This mode could n't be set while executing with the flash itself.
* It should be done with specific routine executed from RAM.
* @retval HAL status
*/
__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableFlashSleepMode(void)
{
/* Enable Power ctrl clock */
__HAL_RCC_PWR_CLK_ENABLE();
/* Enable the flash sleep while System Run */
SET_BIT(PWR->CR, PWR_CR_FMSSR);
return HAL_OK;
}
/**
* @brief Disable the flash sleep while System Run
* @note This mode is only available for STM32F41xxx/STM32F446xx devices.
* @note This mode couldn't be set while executing with the flash itself.
* It should be done with specific routine executed from RAM.
* @retval HAL status
*/
__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableFlashSleepMode(void)
{
/* Enable Power ctrl clock */
__HAL_RCC_PWR_CLK_ENABLE();
/* Disable the flash sleep while System Run */
CLEAR_BIT(PWR->CR, PWR_CR_FMSSR);
return HAL_OK;
}
/**
* @}
*/
/**
* @}
*/
#endif /* STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
#endif /* HAL_FLASH_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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@@ -1,261 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_fmpi2c_ex.c
* @author MCD Application Team
* @brief FMPI2C Extended HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of FMPI2C Extended peripheral:
* + Filter Mode Functions
* + FastModePlus Functions
*
@verbatim
==============================================================================
##### FMPI2C peripheral Extended features #####
==============================================================================
[..] Comparing to other previous devices, the FMPI2C interface for STM32F4xx
devices contains the following additional features
(+) Possibility to disable or enable Analog Noise Filter
(+) Use of a configured Digital Noise Filter
(+) Disable or enable Fast Mode Plus
##### How to use this driver #####
==============================================================================
[..] This driver provides functions to:
(#) Configure FMPI2C Analog noise filter using the function HAL_FMPI2CEx_ConfigAnalogFilter()
(#) Configure FMPI2C Digital noise filter using the function HAL_FMPI2CEx_ConfigDigitalFilter()
(#) Configure the enable or disable of fast mode plus driving capability using the functions :
(++) HAL_FMPI2CEx_EnableFastModePlus()
(++) HAL_FMPI2CEx_DisableFastModePlus()
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup FMPI2CEx FMPI2CEx
* @brief FMPI2C Extended HAL module driver
* @{
*/
#ifdef HAL_FMPI2C_MODULE_ENABLED
#if defined(FMPI2C_CR1_PE)
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup FMPI2CEx_Exported_Functions FMPI2C Extended Exported Functions
* @{
*/
/** @defgroup FMPI2CEx_Exported_Functions_Group1 Filter Mode Functions
* @brief Filter Mode Functions
*
@verbatim
===============================================================================
##### Filter Mode Functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Configure Noise Filters
@endverbatim
* @{
*/
/**
* @brief Configure FMPI2C Analog noise filter.
* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
* the configuration information for the specified FMPI2Cx peripheral.
* @param AnalogFilter New state of the Analog filter.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_FMPI2CEx_ConfigAnalogFilter(FMPI2C_HandleTypeDef *hfmpi2c, uint32_t AnalogFilter)
{
/* Check the parameters */
assert_param(IS_FMPI2C_ALL_INSTANCE(hfmpi2c->Instance));
assert_param(IS_FMPI2C_ANALOG_FILTER(AnalogFilter));
if (hfmpi2c->State == HAL_FMPI2C_STATE_READY)
{
/* Process Locked */
__HAL_LOCK(hfmpi2c);
hfmpi2c->State = HAL_FMPI2C_STATE_BUSY;
/* Disable the selected FMPI2C peripheral */
__HAL_FMPI2C_DISABLE(hfmpi2c);
/* Reset FMPI2Cx ANOFF bit */
hfmpi2c->Instance->CR1 &= ~(FMPI2C_CR1_ANFOFF);
/* Set analog filter bit*/
hfmpi2c->Instance->CR1 |= AnalogFilter;
__HAL_FMPI2C_ENABLE(hfmpi2c);
hfmpi2c->State = HAL_FMPI2C_STATE_READY;
/* Process Unlocked */
__HAL_UNLOCK(hfmpi2c);
return HAL_OK;
}
else
{
return HAL_BUSY;
}
}
/**
* @brief Configure FMPI2C Digital noise filter.
* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
* the configuration information for the specified FMPI2Cx peripheral.
* @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_FMPI2CEx_ConfigDigitalFilter(FMPI2C_HandleTypeDef *hfmpi2c, uint32_t DigitalFilter)
{
uint32_t tmpreg;
/* Check the parameters */
assert_param(IS_FMPI2C_ALL_INSTANCE(hfmpi2c->Instance));
assert_param(IS_FMPI2C_DIGITAL_FILTER(DigitalFilter));
if (hfmpi2c->State == HAL_FMPI2C_STATE_READY)
{
/* Process Locked */
__HAL_LOCK(hfmpi2c);
hfmpi2c->State = HAL_FMPI2C_STATE_BUSY;
/* Disable the selected FMPI2C peripheral */
__HAL_FMPI2C_DISABLE(hfmpi2c);
/* Get the old register value */
tmpreg = hfmpi2c->Instance->CR1;
/* Reset FMPI2Cx DNF bits [11:8] */
tmpreg &= ~(FMPI2C_CR1_DNF);
/* Set FMPI2Cx DNF coefficient */
tmpreg |= DigitalFilter << 8U;
/* Store the new register value */
hfmpi2c->Instance->CR1 = tmpreg;
__HAL_FMPI2C_ENABLE(hfmpi2c);
hfmpi2c->State = HAL_FMPI2C_STATE_READY;
/* Process Unlocked */
__HAL_UNLOCK(hfmpi2c);
return HAL_OK;
}
else
{
return HAL_BUSY;
}
}
/**
* @}
*/
/** @defgroup FMPI2CEx_Exported_Functions_Group3 Fast Mode Plus Functions
* @brief Fast Mode Plus Functions
*
@verbatim
===============================================================================
##### Fast Mode Plus Functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Configure Fast Mode Plus
@endverbatim
* @{
*/
/**
* @brief Enable the FMPI2C fast mode plus driving capability.
* @param ConfigFastModePlus Selects the pin.
* This parameter can be one of the @ref FMPI2CEx_FastModePlus values
* @note For FMPI2C1, fast mode plus driving capability can be enabled on all selected
* FMPI2C1 pins using FMPI2C_FASTMODEPLUS_FMPI2C1 parameter or independently
* on each one of the following pins PB6, PB7, PB8 and PB9.
* @note For remaining FMPI2C1 pins (PA14, PA15...) fast mode plus driving capability
* can be enabled only by using FMPI2C_FASTMODEPLUS_FMPI2C1 parameter.
* @retval None
*/
void HAL_FMPI2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus)
{
/* Check the parameter */
assert_param(IS_FMPI2C_FASTMODEPLUS(ConfigFastModePlus));
/* Enable SYSCFG clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
/* Enable fast mode plus driving capability for selected pin */
SET_BIT(SYSCFG->CFGR, (uint32_t)ConfigFastModePlus);
}
/**
* @brief Disable the FMPI2C fast mode plus driving capability.
* @param ConfigFastModePlus Selects the pin.
* This parameter can be one of the @ref FMPI2CEx_FastModePlus values
* @note For FMPI2C1, fast mode plus driving capability can be disabled on all selected
* FMPI2C1 pins using FMPI2C_FASTMODEPLUS_FMPI2C1 parameter or independently
* on each one of the following pins PB6, PB7, PB8 and PB9.
* @note For remaining FMPI2C1 pins (PA14, PA15...) fast mode plus driving capability
* can be disabled only by using FMPI2C_FASTMODEPLUS_FMPI2C1 parameter.
* @retval None
*/
void HAL_FMPI2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus)
{
/* Check the parameter */
assert_param(IS_FMPI2C_FASTMODEPLUS(ConfigFastModePlus));
/* Enable SYSCFG clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
/* Disable fast mode plus driving capability for selected pin */
CLEAR_BIT(SYSCFG->CFGR, (uint32_t)ConfigFastModePlus);
}
/**
* @}
*/
/**
* @}
*/
#endif /* FMPI2C_CR1_PE */
#endif /* HAL_FMPI2C_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
File diff suppressed because it is too large Load Diff
@@ -1,148 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_fmpsmbus_ex.c
* @author MCD Application Team
* @brief FMPSMBUS Extended HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of FMPSMBUS Extended peripheral:
* + Extended features functions
*
@verbatim
==============================================================================
##### FMPSMBUS peripheral Extended features #####
==============================================================================
[..] Comparing to other previous devices, the FMPSMBUS interface for STM32F4xx
devices contains the following additional features
(+) Disable or enable Fast Mode Plus
##### How to use this driver #####
==============================================================================
(#) Configure the enable or disable of fast mode plus driving capability using the functions :
(++) HAL_FMPSMBUSEx_EnableFastModePlus()
(++) HAL_FMPSMBUSEx_DisableFastModePlus()
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup FMPSMBUSEx FMPSMBUSEx
* @brief FMPSMBUS Extended HAL module driver
* @{
*/
#ifdef HAL_FMPSMBUS_MODULE_ENABLED
#if defined(FMPI2C_CR1_PE)
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup FMPSMBUSEx_Exported_Functions FMPSMBUS Extended Exported Functions
* @{
*/
/** @defgroup FMPSMBUSEx_Exported_Functions_Group3 Fast Mode Plus Functions
* @brief Fast Mode Plus Functions
*
@verbatim
===============================================================================
##### Fast Mode Plus Functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Configure Fast Mode Plus
@endverbatim
* @{
*/
/**
* @brief Enable the FMPSMBUS fast mode plus driving capability.
* @param ConfigFastModePlus Selects the pin.
* This parameter can be one of the @ref FMPSMBUSEx_FastModePlus values
* @note For FMPI2C1, fast mode plus driving capability can be enabled on all selected
* FMPI2C1 pins using FMPSMBUS_FASTMODEPLUS_FMPI2C1 parameter or independently
* on each one of the following pins PB6, PB7, PB8 and PB9.
* @note For remaining FMPI2C1 pins (PA14, PA15...) fast mode plus driving capability
* can be enabled only by using FMPSMBUS_FASTMODEPLUS_FMPI2C1 parameter.
* @retval None
*/
void HAL_FMPSMBUSEx_EnableFastModePlus(uint32_t ConfigFastModePlus)
{
/* Check the parameter */
assert_param(IS_FMPSMBUS_FASTMODEPLUS(ConfigFastModePlus));
/* Enable SYSCFG clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
/* Enable fast mode plus driving capability for selected pin */
SET_BIT(SYSCFG->CFGR, (uint32_t)ConfigFastModePlus);
}
/**
* @brief Disable the FMPSMBUS fast mode plus driving capability.
* @param ConfigFastModePlus Selects the pin.
* This parameter can be one of the @ref FMPSMBUSEx_FastModePlus values
* @note For FMPI2C1, fast mode plus driving capability can be disabled on all selected
* FMPI2C1 pins using FMPSMBUS_FASTMODEPLUS_FMPI2C1 parameter or independently
* on each one of the following pins PB6, PB7, PB8 and PB9.
* @note For remaining FMPI2C1 pins (PA14, PA15...) fast mode plus driving capability
* can be disabled only by using FMPSMBUS_FASTMODEPLUS_FMPI2C1 parameter.
* @retval None
*/
void HAL_FMPSMBUSEx_DisableFastModePlus(uint32_t ConfigFastModePlus)
{
/* Check the parameter */
assert_param(IS_FMPSMBUS_FASTMODEPLUS(ConfigFastModePlus));
/* Enable SYSCFG clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
/* Disable fast mode plus driving capability for selected pin */
CLEAR_BIT(SYSCFG->CFGR, (uint32_t)ConfigFastModePlus);
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* FMPI2C_CR1_PE */
#endif /* HAL_FMPSMBUS_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
@@ -1,534 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_gpio.c
* @author MCD Application Team
* @brief GPIO HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the General Purpose Input/Output (GPIO) peripheral:
* + Initialization and de-initialization functions
* + IO operation functions
*
@verbatim
==============================================================================
##### GPIO Peripheral features #####
==============================================================================
[..]
Subject to the specific hardware characteristics of each I/O port listed in the datasheet, each
port bit of the General Purpose IO (GPIO) Ports, can be individually configured by software
in several modes:
(+) Input mode
(+) Analog mode
(+) Output mode
(+) Alternate function mode
(+) External interrupt/event lines
[..]
During and just after reset, the alternate functions and external interrupt
lines are not active and the I/O ports are configured in input floating mode.
[..]
All GPIO pins have weak internal pull-up and pull-down resistors, which can be
activated or not.
[..]
In Output or Alternate mode, each IO can be configured on open-drain or push-pull
type and the IO speed can be selected depending on the VDD value.
[..]
All ports have external interrupt/event capability. To use external interrupt
lines, the port must be configured in input mode. All available GPIO pins are
connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
[..]
The external interrupt/event controller consists of up to 23 edge detectors
(16 lines are connected to GPIO) for generating event/interrupt requests (each
input line can be independently configured to select the type (interrupt or event)
and the corresponding trigger event (rising or falling or both). Each line can
also be masked independently.
##### How to use this driver #####
==============================================================================
[..]
(#) Enable the GPIO AHB clock using the following function: __HAL_RCC_GPIOx_CLK_ENABLE().
(#) Configure the GPIO pin(s) using HAL_GPIO_Init().
(++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
(++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
structure.
(++) In case of Output or alternate function mode selection: the speed is
configured through "Speed" member from GPIO_InitTypeDef structure.
(++) In alternate mode is selection, the alternate function connected to the IO
is configured through "Alternate" member from GPIO_InitTypeDef structure.
(++) Analog mode is required when a pin is to be used as ADC channel
or DAC output.
(++) In case of external interrupt/event selection the "Mode" member from
GPIO_InitTypeDef structure select the type (interrupt or event) and
the corresponding trigger event (rising or falling or both).
(#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
HAL_NVIC_EnableIRQ().
(#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
(#) To set/reset the level of a pin configured in output mode use
HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
(#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
(#) During and just after reset, the alternate functions are not
active and the GPIO pins are configured in input floating mode (except JTAG
pins).
(#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
(PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
priority over the GPIO function.
(#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
general purpose PH0 and PH1, respectively, when the HSE oscillator is off.
The HSE has priority over the GPIO function.
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup GPIO GPIO
* @brief GPIO HAL module driver
* @{
*/
#ifdef HAL_GPIO_MODULE_ENABLED
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/** @addtogroup GPIO_Private_Constants GPIO Private Constants
* @{
*/
#define GPIO_NUMBER 16U
/**
* @}
*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup GPIO_Exported_Functions GPIO Exported Functions
* @{
*/
/** @defgroup GPIO_Exported_Functions_Group1 Initialization and de-initialization functions
* @brief Initialization and Configuration functions
*
@verbatim
===============================================================================
##### Initialization and de-initialization functions #####
===============================================================================
[..]
This section provides functions allowing to initialize and de-initialize the GPIOs
to be ready for use.
@endverbatim
* @{
*/
/**
* @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init.
* @param GPIOx where x can be (A..K) to select the GPIO peripheral for STM32F429X device or
* x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices.
* @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
uint32_t position;
uint32_t ioposition = 0x00U;
uint32_t iocurrent = 0x00U;
uint32_t temp = 0x00U;
/* Check the parameters */
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
for(position = 0U; position < GPIO_NUMBER; position++)
{
/* Get the IO position */
ioposition = 0x01U << position;
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
if(iocurrent == ioposition)
{
/*--------------------- GPIO Mode Configuration ------------------------*/
/* In case of Output or Alternate function mode selection */
if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \
(GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
{
/* Check the Speed parameter */
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
/* Configure the IO Speed */
temp = GPIOx->OSPEEDR;
temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
temp |= (GPIO_Init->Speed << (position * 2U));
GPIOx->OSPEEDR = temp;
/* Configure the IO Output Type */
temp = GPIOx->OTYPER;
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
GPIOx->OTYPER = temp;
}
if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
{
/* Check the parameters */
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
/* Activate the Pull-up or Pull down resistor for the current IO */
temp = GPIOx->PUPDR;
temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
temp |= ((GPIO_Init->Pull) << (position * 2U));
GPIOx->PUPDR = temp;
}
/* In case of Alternate function mode selection */
if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
{
/* Check the Alternate function parameter */
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
/* Configure Alternate function mapped with the current IO */
temp = GPIOx->AFR[position >> 3U];
temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
GPIOx->AFR[position >> 3U] = temp;
}
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
temp = GPIOx->MODER;
temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
GPIOx->MODER = temp;
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
{
/* Enable SYSCFG Clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
temp = SYSCFG->EXTICR[position >> 2U];
temp &= ~(0x0FU << (4U * (position & 0x03U)));
temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
SYSCFG->EXTICR[position >> 2U] = temp;
/* Clear EXTI line configuration */
temp = EXTI->IMR;
temp &= ~((uint32_t)iocurrent);
if((GPIO_Init->Mode & EXTI_IT) != 0x00U)
{
temp |= iocurrent;
}
EXTI->IMR = temp;
temp = EXTI->EMR;
temp &= ~((uint32_t)iocurrent);
if((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
{
temp |= iocurrent;
}
EXTI->EMR = temp;
/* Clear Rising Falling edge configuration */
temp = EXTI->RTSR;
temp &= ~((uint32_t)iocurrent);
if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
{
temp |= iocurrent;
}
EXTI->RTSR = temp;
temp = EXTI->FTSR;
temp &= ~((uint32_t)iocurrent);
if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
{
temp |= iocurrent;
}
EXTI->FTSR = temp;
}
}
}
}
/**
* @brief De-initializes the GPIOx peripheral registers to their default reset values.
* @param GPIOx where x can be (A..K) to select the GPIO peripheral for STM32F429X device or
* x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices.
* @param GPIO_Pin specifies the port bit to be written.
* This parameter can be one of GPIO_PIN_x where x can be (0..15).
* @retval None
*/
void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
{
uint32_t position;
uint32_t ioposition = 0x00U;
uint32_t iocurrent = 0x00U;
uint32_t tmp = 0x00U;
/* Check the parameters */
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
/* Configure the port pins */
for(position = 0U; position < GPIO_NUMBER; position++)
{
/* Get the IO position */
ioposition = 0x01U << position;
/* Get the current IO position */
iocurrent = (GPIO_Pin) & ioposition;
if(iocurrent == ioposition)
{
/*------------------------- EXTI Mode Configuration --------------------*/
tmp = SYSCFG->EXTICR[position >> 2U];
tmp &= (0x0FU << (4U * (position & 0x03U)));
if(tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))))
{
/* Clear EXTI line configuration */
EXTI->IMR &= ~((uint32_t)iocurrent);
EXTI->EMR &= ~((uint32_t)iocurrent);
/* Clear Rising Falling edge configuration */
EXTI->RTSR &= ~((uint32_t)iocurrent);
EXTI->FTSR &= ~((uint32_t)iocurrent);
/* Configure the External Interrupt or event for the current IO */
tmp = 0x0FU << (4U * (position & 0x03U));
SYSCFG->EXTICR[position >> 2U] &= ~tmp;
}
/*------------------------- GPIO Mode Configuration --------------------*/
/* Configure IO Direction in Input Floating Mode */
GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2U));
/* Configure the default Alternate Function in current IO */
GPIOx->AFR[position >> 3U] &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
/* Deactivate the Pull-up and Pull-down resistor for the current IO */
GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
/* Configure the default value IO Output Type */
GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ;
/* Configure the default value for IO Speed */
GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
}
}
}
/**
* @}
*/
/** @defgroup GPIO_Exported_Functions_Group2 IO operation functions
* @brief GPIO Read and Write
*
@verbatim
===============================================================================
##### IO operation functions #####
===============================================================================
@endverbatim
* @{
*/
/**
* @brief Reads the specified input port pin.
* @param GPIOx where x can be (A..K) to select the GPIO peripheral for STM32F429X device or
* x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices.
* @param GPIO_Pin specifies the port bit to read.
* This parameter can be GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
GPIO_PinState bitstatus;
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
{
bitstatus = GPIO_PIN_SET;
}
else
{
bitstatus = GPIO_PIN_RESET;
}
return bitstatus;
}
/**
* @brief Sets or clears the selected data port bit.
*
* @note This function uses GPIOx_BSRR register to allow atomic read/modify
* accesses. In this way, there is no risk of an IRQ occurring between
* the read and the modify access.
*
* @param GPIOx where x can be (A..K) to select the GPIO peripheral for STM32F429X device or
* x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices.
* @param GPIO_Pin specifies the port bit to be written.
* This parameter can be one of GPIO_PIN_x where x can be (0..15).
* @param PinState specifies the value to be written to the selected bit.
* This parameter can be one of the GPIO_PinState enum values:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if(PinState != GPIO_PIN_RESET)
{
GPIOx->BSRR = GPIO_Pin;
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
}
}
/**
* @brief Toggles the specified GPIO pins.
* @param GPIOx Where x can be (A..K) to select the GPIO peripheral for STM32F429X device or
* x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices.
* @param GPIO_Pin Specifies the pins to be toggled.
* @retval None
*/
void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
uint32_t odr;
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
/* get current Ouput Data Register value */
odr = GPIOx->ODR;
/* Set selected pins that were at low level, and reset ones that were high */
GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
}
/**
* @brief Locks GPIO Pins configuration registers.
* @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
* GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
* @note The configuration of the locked GPIO pins can no longer be modified
* until the next reset.
* @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F4 family
* @param GPIO_Pin specifies the port bit to be locked.
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15).
* @retval None
*/
HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
__IO uint32_t tmp = GPIO_LCKR_LCKK;
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
/* Apply lock key write sequence */
tmp |= GPIO_Pin;
/* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
GPIOx->LCKR = tmp;
/* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
GPIOx->LCKR = GPIO_Pin;
/* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
GPIOx->LCKR = tmp;
/* Read LCKR register. This read is mandatory to complete key lock sequence */
tmp = GPIOx->LCKR;
/* Read again in order to confirm lock is active */
if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET)
{
return HAL_OK;
}
else
{
return HAL_ERROR;
}
}
/**
* @brief This function handles EXTI interrupt request.
* @param GPIO_Pin Specifies the pins connected EXTI line
* @retval None
*/
void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
{
/* EXTI line interrupt detected */
if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)
{
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
HAL_GPIO_EXTI_Callback(GPIO_Pin);
}
}
/**
* @brief EXTI line detection callbacks.
* @param GPIO_Pin Specifies the pins connected EXTI line
* @retval None
*/
__weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(GPIO_Pin);
/* NOTE: This function Should not be modified, when the callback is needed,
the HAL_GPIO_EXTI_Callback could be implemented in the user file
*/
}
/**
* @}
*/
/**
* @}
*/
#endif /* HAL_GPIO_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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@@ -1,184 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_i2c_ex.c
* @author MCD Application Team
* @brief I2C Extension HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of I2C extension peripheral:
* + Extension features functions
*
@verbatim
==============================================================================
##### I2C peripheral extension features #####
==============================================================================
[..] Comparing to other previous devices, the I2C interface for STM32F427xx/437xx/
429xx/439xx devices contains the following additional features :
(+) Possibility to disable or enable Analog Noise Filter
(+) Use of a configured Digital Noise Filter
##### How to use this driver #####
==============================================================================
[..] This driver provides functions to configure Noise Filter
(#) Configure I2C Analog noise filter using the function HAL_I2C_AnalogFilter_Config()
(#) Configure I2C Digital noise filter using the function HAL_I2C_DigitalFilter_Config()
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup I2CEx I2CEx
* @brief I2C HAL module driver
* @{
*/
#ifdef HAL_I2C_MODULE_ENABLED
#if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup I2CEx_Exported_Functions I2C Exported Functions
* @{
*/
/** @defgroup I2CEx_Exported_Functions_Group1 Extension features functions
* @brief Extension features functions
*
@verbatim
===============================================================================
##### Extension features functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Configure Noise Filters
@endverbatim
* @{
*/
/**
* @brief Configures I2C Analog noise filter.
* @param hi2c pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for the specified I2Cx peripheral.
* @param AnalogFilter new state of the Analog filter.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter)
{
/* Check the parameters */
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
if (hi2c->State == HAL_I2C_STATE_READY)
{
hi2c->State = HAL_I2C_STATE_BUSY;
/* Disable the selected I2C peripheral */
__HAL_I2C_DISABLE(hi2c);
/* Reset I2Cx ANOFF bit */
hi2c->Instance->FLTR &= ~(I2C_FLTR_ANOFF);
/* Disable the analog filter */
hi2c->Instance->FLTR |= AnalogFilter;
__HAL_I2C_ENABLE(hi2c);
hi2c->State = HAL_I2C_STATE_READY;
return HAL_OK;
}
else
{
return HAL_BUSY;
}
}
/**
* @brief Configures I2C Digital noise filter.
* @param hi2c pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for the specified I2Cx peripheral.
* @param DigitalFilter Coefficient of digital noise filter between 0x00 and 0x0F.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter)
{
uint16_t tmpreg = 0;
/* Check the parameters */
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
if (hi2c->State == HAL_I2C_STATE_READY)
{
hi2c->State = HAL_I2C_STATE_BUSY;
/* Disable the selected I2C peripheral */
__HAL_I2C_DISABLE(hi2c);
/* Get the old register value */
tmpreg = hi2c->Instance->FLTR;
/* Reset I2Cx DNF bit [3:0] */
tmpreg &= ~(I2C_FLTR_DNF);
/* Set I2Cx DNF coefficient */
tmpreg |= DigitalFilter;
/* Store the new register value */
hi2c->Instance->FLTR = tmpreg;
__HAL_I2C_ENABLE(hi2c);
hi2c->State = HAL_I2C_STATE_READY;
return HAL_OK;
}
else
{
return HAL_BUSY;
}
}
/**
* @}
*/
/**
* @}
*/
#endif
#endif /* HAL_I2C_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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@@ -1,265 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_iwdg.c
* @author MCD Application Team
* @brief IWDG HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Independent Watchdog (IWDG) peripheral:
* + Initialization and Start functions
* + IO operation functions
*
@verbatim
==============================================================================
##### IWDG Generic features #####
==============================================================================
[..]
(+) The IWDG can be started by either software or hardware (configurable
through option byte).
(+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays
active even if the main clock fails.
(+) Once the IWDG is started, the LSI is forced ON and both cannot be
disabled. The counter starts counting down from the reset value (0xFFF).
When it reaches the end of count value (0x000) a reset signal is
generated (IWDG reset).
(+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
the IWDG_RLR value is reloaded into the counter and the watchdog reset
is prevented.
(+) The IWDG is implemented in the VDD voltage domain that is still functional
in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY).
IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
reset occurs.
(+) Debug mode: When the microcontroller enters debug mode (core halted),
the IWDG counter either continues to work normally or stops, depending
on DBG_IWDG_STOP configuration bit in DBG module, accessible through
__HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros.
[..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
The IWDG timeout may vary due to LSI clock frequency dispersion.
STM32F4xx devices provide the capability to measure the LSI clock
frequency (LSI clock is internally connected to TIM5 CH4 input capture).
The measured value can be used to have an IWDG timeout with an
acceptable accuracy.
[..] Default timeout value (necessary for IWDG_SR status register update):
Constant LSI_VALUE is defined based on the nominal LSI clock frequency.
This frequency being subject to variations as mentioned above, the
default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT
below) may become too short or too long.
In such cases, this default timeout value can be tuned by redefining
the constant LSI_VALUE at user-application level (based, for instance,
on the measured LSI clock frequency as explained above).
##### How to use this driver #####
==============================================================================
[..]
(#) Use IWDG using HAL_IWDG_Init() function to :
(++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
clock is forced ON and IWDG counter starts counting down.
(++) Enable write access to configuration registers:
IWDG_PR and IWDG_RLR.
(++) Configure the IWDG prescaler and counter reload value. This reload
value will be loaded in the IWDG counter each time the watchdog is
reloaded, then the IWDG will start counting down from this value.
(++) Wait for status flags to be reset.
(#) Then the application program must refresh the IWDG counter at regular
intervals during normal operation to prevent an MCU reset, using
HAL_IWDG_Refresh() function.
*** IWDG HAL driver macros list ***
====================================
[..]
Below the list of most used macros in IWDG HAL driver:
(+) __HAL_IWDG_START: Enable the IWDG peripheral
(+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
the reload register
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
#ifdef HAL_IWDG_MODULE_ENABLED
/** @addtogroup IWDG
* @brief IWDG HAL module driver.
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/** @defgroup IWDG_Private_Defines IWDG Private Defines
* @{
*/
/* Status register needs up to 5 LSI clock periods divided by the clock
prescaler to be updated. The number of LSI clock periods is upper-rounded to
6 for the timeout value calculation.
The timeout value is calculated using the highest prescaler (256) and
the LSI_VALUE constant. The value of this constant can be changed by the user
to take into account possible LSI clock period variations.
The timeout value is multiplied by 1000 to be converted in milliseconds.
LSI startup time is also considered here by adding LSI_STARTUP_TIMEOUT
converted in milliseconds. */
#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL))
#define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_RVU | IWDG_SR_PVU)
/**
* @}
*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup IWDG_Exported_Functions
* @{
*/
/** @addtogroup IWDG_Exported_Functions_Group1
* @brief Initialization and Start functions.
*
@verbatim
===============================================================================
##### Initialization and Start functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Initialize the IWDG according to the specified parameters in the
IWDG_InitTypeDef of associated handle.
(+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
is reloaded in order to exit function with correct time base.
@endverbatim
* @{
*/
/**
* @brief Initialize the IWDG according to the specified parameters in the
* IWDG_InitTypeDef and start watchdog. Before exiting function,
* watchdog is refreshed in order to have correct time base.
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
* the configuration information for the specified IWDG module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
{
uint32_t tickstart;
/* Check the IWDG handle allocation */
if (hiwdg == NULL)
{
return HAL_ERROR;
}
/* Check the parameters */
assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
/* Enable IWDG. LSI is turned on automatically */
__HAL_IWDG_START(hiwdg);
/* Enable write access to IWDG_PR and IWDG_RLR registers by writing
0x5555 in KR */
IWDG_ENABLE_WRITE_ACCESS(hiwdg);
/* Write to IWDG registers the Prescaler & Reload values to work with */
hiwdg->Instance->PR = hiwdg->Init.Prescaler;
hiwdg->Instance->RLR = hiwdg->Init.Reload;
/* Check pending flag, if previous update not done, return timeout */
tickstart = HAL_GetTick();
/* Wait for register to be updated */
while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
{
if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
{
if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
{
return HAL_TIMEOUT;
}
}
}
/* Reload IWDG counter with value defined in the reload register */
__HAL_IWDG_RELOAD_COUNTER(hiwdg);
/* Return function status */
return HAL_OK;
}
/**
* @}
*/
/** @addtogroup IWDG_Exported_Functions_Group2
* @brief IO operation functions
*
@verbatim
===============================================================================
##### IO operation functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Refresh the IWDG.
@endverbatim
* @{
*/
/**
* @brief Refresh the IWDG.
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
* the configuration information for the specified IWDG module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
{
/* Reload IWDG counter with value defined in the reload register */
__HAL_IWDG_RELOAD_COUNTER(hiwdg);
/* Return function status */
return HAL_OK;
}
/**
* @}
*/
/**
* @}
*/
#endif /* HAL_IWDG_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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/**
******************************************************************************
* @file stm32f4xx_hal_ltdc_ex.c
* @author MCD Application Team
* @brief LTDC Extension HAL module driver.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
#if defined(HAL_LTDC_MODULE_ENABLED) && defined(HAL_DSI_MODULE_ENABLED)
#if defined (LTDC) && defined (DSI)
/** @defgroup LTDCEx LTDCEx
* @brief LTDC HAL module driver
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup LTDCEx_Exported_Functions LTDC Extended Exported Functions
* @{
*/
/** @defgroup LTDCEx_Exported_Functions_Group1 Initialization and Configuration functions
* @brief Initialization and Configuration functions
*
@verbatim
===============================================================================
##### Initialization and Configuration functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Initialize and configure the LTDC
@endverbatim
* @{
*/
/**
* @brief Retrieve common parameters from DSI Video mode configuration structure
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param VidCfg pointer to a DSI_VidCfgTypeDef structure that contains
* the DSI video mode configuration parameters
* @note The implementation of this function is taking into account the LTDC
* polarities inversion as described in the current LTDC specification
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LTDCEx_StructInitFromVideoConfig(LTDC_HandleTypeDef *hltdc, DSI_VidCfgTypeDef *VidCfg)
{
/* Retrieve signal polarities from DSI */
/* The following polarity is inverted:
LTDC_DEPOLARITY_AL <-> LTDC_DEPOLARITY_AH */
/* Note 1 : Code in line w/ Current LTDC specification */
hltdc->Init.DEPolarity = (VidCfg->DEPolarity == DSI_DATA_ENABLE_ACTIVE_HIGH) ? LTDC_DEPOLARITY_AL : LTDC_DEPOLARITY_AH;
hltdc->Init.VSPolarity = (VidCfg->VSPolarity == DSI_VSYNC_ACTIVE_HIGH) ? LTDC_VSPOLARITY_AH : LTDC_VSPOLARITY_AL;
hltdc->Init.HSPolarity = (VidCfg->HSPolarity == DSI_HSYNC_ACTIVE_HIGH) ? LTDC_HSPOLARITY_AH : LTDC_HSPOLARITY_AL;
/* Note 2: Code to be used in case LTDC polarities inversion updated in the specification */
/* hltdc->Init.DEPolarity = VidCfg->DEPolarity << 29;
hltdc->Init.VSPolarity = VidCfg->VSPolarity << 29;
hltdc->Init.HSPolarity = VidCfg->HSPolarity << 29; */
/* Retrieve vertical timing parameters from DSI */
hltdc->Init.VerticalSync = VidCfg->VerticalSyncActive - 1U;
hltdc->Init.AccumulatedVBP = VidCfg->VerticalSyncActive + VidCfg->VerticalBackPorch - 1U;
hltdc->Init.AccumulatedActiveH = VidCfg->VerticalSyncActive + VidCfg->VerticalBackPorch + VidCfg->VerticalActive - 1U;
hltdc->Init.TotalHeigh = VidCfg->VerticalSyncActive + VidCfg->VerticalBackPorch + VidCfg->VerticalActive + VidCfg->VerticalFrontPorch - 1U;
return HAL_OK;
}
/**
* @brief Retrieve common parameters from DSI Adapted command mode configuration structure
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param CmdCfg pointer to a DSI_CmdCfgTypeDef structure that contains
* the DSI command mode configuration parameters
* @note The implementation of this function is taking into account the LTDC
* polarities inversion as described in the current LTDC specification
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LTDCEx_StructInitFromAdaptedCommandConfig(LTDC_HandleTypeDef *hltdc, DSI_CmdCfgTypeDef *CmdCfg)
{
/* Retrieve signal polarities from DSI */
/* The following polarities are inverted:
LTDC_DEPOLARITY_AL <-> LTDC_DEPOLARITY_AH
LTDC_VSPOLARITY_AL <-> LTDC_VSPOLARITY_AH
LTDC_HSPOLARITY_AL <-> LTDC_HSPOLARITY_AH)*/
/* Note 1 : Code in line w/ Current LTDC specification */
hltdc->Init.DEPolarity = (CmdCfg->DEPolarity == DSI_DATA_ENABLE_ACTIVE_HIGH) ? LTDC_DEPOLARITY_AL : LTDC_DEPOLARITY_AH;
hltdc->Init.VSPolarity = (CmdCfg->VSPolarity == DSI_VSYNC_ACTIVE_HIGH) ? LTDC_VSPOLARITY_AL : LTDC_VSPOLARITY_AH;
hltdc->Init.HSPolarity = (CmdCfg->HSPolarity == DSI_HSYNC_ACTIVE_HIGH) ? LTDC_HSPOLARITY_AL : LTDC_HSPOLARITY_AH;
/* Note 2: Code to be used in case LTDC polarities inversion updated in the specification */
/* hltdc->Init.DEPolarity = CmdCfg->DEPolarity << 29;
hltdc->Init.VSPolarity = CmdCfg->VSPolarity << 29;
hltdc->Init.HSPolarity = CmdCfg->HSPolarity << 29; */
return HAL_OK;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* LTDC && DSI */
#endif /* HAL_LTCD_MODULE_ENABLED && HAL_DSI_MODULE_ENABLED */
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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@@ -1,101 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_msp_template.c
* @author MCD Application Team
* @brief This file contains the HAL System and Peripheral (PPP) MSP initialization
* and de-initialization functions.
* It should be copied to the application folder and renamed into 'stm32f4xx_hal_msp.c'.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup HAL_MSP HAL MSP
* @brief HAL MSP module.
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup HAL_MSP_Private_Functions HAL MSP Private Functions
* @{
*/
/**
* @brief Initializes the Global MSP.
* @note This function is called from HAL_Init() function to perform system
* level initialization (GPIOs, clock, DMA, interrupt).
* @retval None
*/
void HAL_MspInit(void)
{
}
/**
* @brief DeInitializes the Global MSP.
* @note This functiona is called from HAL_DeInit() function to perform system
* level de-initialization (GPIOs, clock, DMA, interrupt).
* @retval None
*/
void HAL_MspDeInit(void)
{
}
/**
* @brief Initializes the PPP MSP.
* @note This functiona is called from HAL_PPP_Init() function to perform
* peripheral(PPP) system level initialization (GPIOs, clock, DMA, interrupt)
* @retval None
*/
void HAL_PPP_MspInit(void)
{
}
/**
* @brief DeInitializes the PPP MSP.
* @note This functiona is called from HAL_PPP_DeInit() function to perform
* peripheral(PPP) system level de-initialization (GPIOs, clock, DMA, interrupt)
* @retval None
*/
void HAL_PPP_MspDeInit(void)
{
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
@@ -1,942 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_pccard.c
* @author MCD Application Team
* @brief PCCARD HAL module driver.
* This file provides a generic firmware to drive PCCARD memories mounted
* as external device.
*
@verbatim
===============================================================================
##### How to use this driver #####
===============================================================================
[..]
This driver is a generic layered driver which contains a set of APIs used to
control PCCARD/compact flash memories. It uses the FMC/FSMC layer functions
to interface with PCCARD devices. This driver is used for:
(+) PCCARD/Compact Flash memory configuration sequence using the function
HAL_PCCARD_Init()/HAL_CF_Init() with control and timing parameters for
both common and attribute spaces.
(+) Read PCCARD/Compact Flash memory maker and device IDs using the function
HAL_PCCARD_Read_ID()/HAL_CF_Read_ID(). The read information is stored in
the CompactFlash_ID structure declared by the function caller.
(+) Access PCCARD/Compact Flash memory by read/write operations using the functions
HAL_PCCARD_Read_Sector()/ HAL_PCCARD_Write_Sector() -
HAL_CF_Read_Sector()/HAL_CF_Write_Sector(), to read/write sector.
(+) Perform PCCARD/Compact Flash Reset chip operation using the function
HAL_PCCARD_Reset()/HAL_CF_Reset.
(+) Perform PCCARD/Compact Flash erase sector operation using the function
HAL_PCCARD_Erase_Sector()/HAL_CF_Erase_Sector.
(+) Read the PCCARD/Compact Flash status operation using the function
HAL_PCCARD_ReadStatus()/HAL_CF_ReadStatus().
(+) You can monitor the PCCARD/Compact Flash device HAL state by calling
the function HAL_PCCARD_GetState()/HAL_CF_GetState()
[..]
(@) This driver is a set of generic APIs which handle standard PCCARD/compact flash
operations. If a PCCARD/Compact Flash device contains different operations
and/or implementations, it should be implemented separately.
*** Callback registration ***
=============================================
[..]
The compilation define USE_HAL_PCCARD_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
Use Functions @ref HAL_PCCARD_RegisterCallback() to register a user callback,
it allows to register following callbacks:
(+) MspInitCallback : PCCARD MspInit.
(+) MspDeInitCallback : PCCARD MspDeInit.
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
Use function @ref HAL_PCCARD_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function. It allows to reset following callbacks:
(+) MspInitCallback : PCCARD MspInit.
(+) MspDeInitCallback : PCCARD MspDeInit.
This function) takes as parameters the HAL peripheral handle and the Callback ID.
By default, after the @ref HAL_PCCARD_Init and if the state is HAL_PCCARD_STATE_RESET
all callbacks are reset to the corresponding legacy weak (surcharged) functions.
Exception done for MspInit and MspDeInit callbacks that are respectively
reset to the legacy weak (surcharged) functions in the @ref HAL_PCCARD_Init
and @ref HAL_PCCARD_DeInit only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the @ref HAL_PCCARD_Init and @ref HAL_PCCARD_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in READY state only.
Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_PCCARD_RegisterCallback before calling @ref HAL_PCCARD_DeInit
or @ref HAL_PCCARD_Init function.
When The compilation define USE_HAL_PCCARD_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
and weak (surcharged) callbacks are used.
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
#ifdef HAL_PCCARD_MODULE_ENABLED
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
/** @defgroup PCCARD PCCARD
* @brief PCCARD HAL module driver
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/** @defgroup PCCARD_Private_Defines PCCARD Private Defines
* @{
*/
#define PCCARD_TIMEOUT_READ_ID 0x0000FFFFU
#define PCCARD_TIMEOUT_READ_WRITE_SECTOR 0x0000FFFFU
#define PCCARD_TIMEOUT_ERASE_SECTOR 0x00000400U
#define PCCARD_TIMEOUT_STATUS 0x01000000U
#define PCCARD_STATUS_OK (uint8_t)0x58
#define PCCARD_STATUS_WRITE_OK (uint8_t)0x50
/**
* @}
*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function ----------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup PCCARD_Exported_Functions PCCARD Exported Functions
* @{
*/
/** @defgroup PCCARD_Exported_Functions_Group1 Initialization and de-initialization functions
* @brief Initialization and Configuration functions
*
@verbatim
==============================================================================
##### PCCARD Initialization and de-initialization functions #####
==============================================================================
[..]
This section provides functions allowing to initialize/de-initialize
the PCCARD memory
@endverbatim
* @{
*/
/**
* @brief Perform the PCCARD memory Initialization sequence
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains
* the configuration information for PCCARD module.
* @param ComSpaceTiming Common space timing structure
* @param AttSpaceTiming Attribute space timing structure
* @param IOSpaceTiming IO space timing structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FMC_NAND_PCC_TimingTypeDef *ComSpaceTiming, FMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, FMC_NAND_PCC_TimingTypeDef *IOSpaceTiming)
{
/* Check the PCCARD controller state */
if(hpccard == NULL)
{
return HAL_ERROR;
}
if(hpccard->State == HAL_PCCARD_STATE_RESET)
{
/* Allocate lock resource and initialize it */
hpccard->Lock = HAL_UNLOCKED;
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1)
if(hpccard->MspInitCallback == NULL)
{
hpccard->MspInitCallback = HAL_PCCARD_MspInit;
}
hpccard->ItCallback = HAL_PCCARD_ITCallback;
/* Init the low level hardware */
hpccard->MspInitCallback(hpccard);
#else
/* Initialize the low level hardware (MSP) */
HAL_PCCARD_MspInit(hpccard);
#endif
}
/* Initialize the PCCARD state */
hpccard->State = HAL_PCCARD_STATE_BUSY;
/* Initialize PCCARD control Interface */
FMC_PCCARD_Init(hpccard->Instance, &(hpccard->Init));
/* Init PCCARD common space timing Interface */
FMC_PCCARD_CommonSpace_Timing_Init(hpccard->Instance, ComSpaceTiming);
/* Init PCCARD attribute space timing Interface */
FMC_PCCARD_AttributeSpace_Timing_Init(hpccard->Instance, AttSpaceTiming);
/* Init PCCARD IO space timing Interface */
FMC_PCCARD_IOSpace_Timing_Init(hpccard->Instance, IOSpaceTiming);
/* Enable the PCCARD device */
__FMC_PCCARD_ENABLE(hpccard->Instance);
/* Update the PCCARD state */
hpccard->State = HAL_PCCARD_STATE_READY;
return HAL_OK;
}
/**
* @brief Perform the PCCARD memory De-initialization sequence
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains
* the configuration information for PCCARD module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCCARD_DeInit(PCCARD_HandleTypeDef *hpccard)
{
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1)
if(hpccard->MspDeInitCallback == NULL)
{
hpccard->MspDeInitCallback = HAL_PCCARD_MspDeInit;
}
/* DeInit the low level hardware */
hpccard->MspDeInitCallback(hpccard);
#else
/* De-Initialize the low level hardware (MSP) */
HAL_PCCARD_MspDeInit(hpccard);
#endif
/* Configure the PCCARD registers with their reset values */
FMC_PCCARD_DeInit(hpccard->Instance);
/* Update the PCCARD controller state */
hpccard->State = HAL_PCCARD_STATE_RESET;
/* Release Lock */
__HAL_UNLOCK(hpccard);
return HAL_OK;
}
/**
* @brief PCCARD MSP Init
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains
* the configuration information for PCCARD module.
* @retval None
*/
__weak void HAL_PCCARD_MspInit(PCCARD_HandleTypeDef *hpccard)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hpccard);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_PCCARD_MspInit could be implemented in the user file
*/
}
/**
* @brief PCCARD MSP DeInit
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains
* the configuration information for PCCARD module.
* @retval None
*/
__weak void HAL_PCCARD_MspDeInit(PCCARD_HandleTypeDef *hpccard)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hpccard);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_PCCARD_MspDeInit could be implemented in the user file
*/
}
/**
* @}
*/
/** @defgroup PCCARD_Exported_Functions_Group2 Input and Output functions
* @brief Input Output and memory control functions
*
@verbatim
==============================================================================
##### PCCARD Input and Output functions #####
==============================================================================
[..]
This section provides functions allowing to use and control the PCCARD memory
@endverbatim
* @{
*/
/**
* @brief Read Compact Flash's ID.
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains
* the configuration information for PCCARD module.
* @param CompactFlash_ID Compact flash ID structure.
* @param pStatus pointer to compact flash status
* @retval HAL status
*
*/
HAL_StatusTypeDef HAL_PCCARD_Read_ID(PCCARD_HandleTypeDef *hpccard, uint8_t CompactFlash_ID[], uint8_t *pStatus)
{
uint32_t timeout = PCCARD_TIMEOUT_READ_ID, index = 0U;
uint8_t status = 0;
/* Process Locked */
__HAL_LOCK(hpccard);
/* Check the PCCARD controller state */
if(hpccard->State == HAL_PCCARD_STATE_BUSY)
{
return HAL_BUSY;
}
/* Update the PCCARD controller state */
hpccard->State = HAL_PCCARD_STATE_BUSY;
/* Initialize the PCCARD status */
*pStatus = PCCARD_READY;
/* Send the Identify Command */
*(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD) = 0xECEC;
/* Read PCCARD IDs and timeout treatment */
do
{
/* Read the PCCARD status */
status = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE);
timeout--;
}while((status != PCCARD_STATUS_OK) && timeout);
if(timeout == 0U)
{
*pStatus = PCCARD_TIMEOUT_ERROR;
}
else
{
/* Read PCCARD ID bytes */
for(index = 0U; index < 16U; index++)
{
CompactFlash_ID[index] = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_DATA);
}
}
/* Update the PCCARD controller state */
hpccard->State = HAL_PCCARD_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hpccard);
return HAL_OK;
}
/**
* @brief Read sector from PCCARD memory
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains
* the configuration information for PCCARD module.
* @param pBuffer pointer to destination read buffer
* @param SectorAddress Sector address to read
* @param pStatus pointer to PCCARD status
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCCARD_Read_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t *pBuffer, uint16_t SectorAddress, uint8_t *pStatus)
{
uint32_t timeout = PCCARD_TIMEOUT_READ_WRITE_SECTOR, index = 0U;
uint8_t status = 0;
/* Process Locked */
__HAL_LOCK(hpccard);
/* Check the PCCARD controller state */
if(hpccard->State == HAL_PCCARD_STATE_BUSY)
{
return HAL_BUSY;
}
/* Update the PCCARD controller state */
hpccard->State = HAL_PCCARD_STATE_BUSY;
/* Initialize PCCARD status */
*pStatus = PCCARD_READY;
/* Set the parameters to write a sector */
*(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_CYLINDER_HIGH) = (uint16_t)0x00;
*(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_SECTOR_COUNT) = ((uint16_t)0x0100) | ((uint16_t)SectorAddress);
*(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD) = (uint16_t)0xE4A0;
do
{
/* wait till the Status = 0x80 */
status = *(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE);
timeout--;
}while((status == 0x80) && timeout);
if(timeout == 0U)
{
*pStatus = PCCARD_TIMEOUT_ERROR;
}
timeout = PCCARD_TIMEOUT_READ_WRITE_SECTOR;
do
{
/* wait till the Status = PCCARD_STATUS_OK */
status = *(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE);
timeout--;
}while((status != PCCARD_STATUS_OK) && timeout);
if(timeout == 0U)
{
*pStatus = PCCARD_TIMEOUT_ERROR;
}
/* Read bytes */
for(; index < PCCARD_SECTOR_SIZE; index++)
{
*(uint16_t *)pBuffer++ = *(uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR);
}
/* Update the PCCARD controller state */
hpccard->State = HAL_PCCARD_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hpccard);
return HAL_OK;
}
/**
* @brief Write sector to PCCARD memory
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains
* the configuration information for PCCARD module.
* @param pBuffer pointer to source write buffer
* @param SectorAddress Sector address to write
* @param pStatus pointer to PCCARD status
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCCARD_Write_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t *pBuffer, uint16_t SectorAddress, uint8_t *pStatus)
{
uint32_t timeout = PCCARD_TIMEOUT_READ_WRITE_SECTOR, index = 0U;
uint8_t status = 0;
/* Process Locked */
__HAL_LOCK(hpccard);
/* Check the PCCARD controller state */
if(hpccard->State == HAL_PCCARD_STATE_BUSY)
{
return HAL_BUSY;
}
/* Update the PCCARD controller state */
hpccard->State = HAL_PCCARD_STATE_BUSY;
/* Initialize PCCARD status */
*pStatus = PCCARD_READY;
/* Set the parameters to write a sector */
*(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_CYLINDER_HIGH) = (uint16_t)0x00;
*(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_SECTOR_COUNT) = ((uint16_t)0x0100) | ((uint16_t)SectorAddress);
*(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD) = (uint16_t)0x30A0;
do
{
/* Wait till the Status = PCCARD_STATUS_OK */
status = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE);
timeout--;
}while((status != PCCARD_STATUS_OK) && timeout);
if(timeout == 0U)
{
*pStatus = PCCARD_TIMEOUT_ERROR;
}
/* Write bytes */
for(; index < PCCARD_SECTOR_SIZE; index++)
{
*(uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR) = *(uint16_t *)pBuffer++;
}
do
{
/* Wait till the Status = PCCARD_STATUS_WRITE_OK */
status = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE);
timeout--;
}while((status != PCCARD_STATUS_WRITE_OK) && timeout);
if(timeout == 0U)
{
*pStatus = PCCARD_TIMEOUT_ERROR;
}
/* Update the PCCARD controller state */
hpccard->State = HAL_PCCARD_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hpccard);
return HAL_OK;
}
/**
* @brief Erase sector from PCCARD memory
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains
* the configuration information for PCCARD module.
* @param SectorAddress Sector address to erase
* @param pStatus pointer to PCCARD status
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCCARD_Erase_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t SectorAddress, uint8_t *pStatus)
{
uint32_t timeout = PCCARD_TIMEOUT_ERASE_SECTOR;
uint8_t status = 0;
/* Process Locked */
__HAL_LOCK(hpccard);
/* Check the PCCARD controller state */
if(hpccard->State == HAL_PCCARD_STATE_BUSY)
{
return HAL_BUSY;
}
/* Update the PCCARD controller state */
hpccard->State = HAL_PCCARD_STATE_BUSY;
/* Initialize PCCARD status */
*pStatus = PCCARD_READY;
/* Set the parameters to write a sector */
*(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_CYLINDER_LOW) = 0x00;
*(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_CYLINDER_HIGH) = 0x00;
*(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_SECTOR_NUMBER) = SectorAddress;
*(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_SECTOR_COUNT) = 0x01;
*(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_CARD_HEAD) = 0xA0;
*(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD) = ATA_ERASE_SECTOR_CMD;
/* wait till the PCCARD is ready */
status = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE);
while((status != PCCARD_STATUS_WRITE_OK) && timeout)
{
status = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE);
timeout--;
}
if(timeout == 0U)
{
*pStatus = PCCARD_TIMEOUT_ERROR;
}
/* Check the PCCARD controller state */
hpccard->State = HAL_PCCARD_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hpccard);
return HAL_OK;
}
/**
* @brief Reset the PCCARD memory
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains
* the configuration information for PCCARD module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCCARD_Reset(PCCARD_HandleTypeDef *hpccard)
{
/* Process Locked */
__HAL_LOCK(hpccard);
/* Check the PCCARD controller state */
if(hpccard->State == HAL_PCCARD_STATE_BUSY)
{
return HAL_BUSY;
}
/* Provide a SW reset and Read and verify the:
- PCCard Configuration Option Register at address 0x98000200 --> 0x80
- Card Configuration and Status Register at address 0x98000202 --> 0x00
- Pin Replacement Register at address 0x98000204 --> 0x0C
- Socket and Copy Register at address 0x98000206 --> 0x00
*/
/* Check the PCCARD controller state */
hpccard->State = HAL_PCCARD_STATE_BUSY;
*(__IO uint8_t *)(PCCARD_ATTRIBUTE_SPACE_ADDRESS | ATA_CARD_CONFIGURATION ) = 0x01;
/* Check the PCCARD controller state */
hpccard->State = HAL_PCCARD_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hpccard);
return HAL_OK;
}
/**
* @brief This function handles PCCARD device interrupt request.
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains
* the configuration information for PCCARD module.
* @retval HAL status
*/
void HAL_PCCARD_IRQHandler(PCCARD_HandleTypeDef *hpccard)
{
/* Check PCCARD interrupt Rising edge flag */
if(__FMC_PCCARD_GET_FLAG(hpccard->Instance, FMC_FLAG_RISING_EDGE))
{
/* PCCARD interrupt callback*/
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1)
hpccard->ItCallback(hpccard);
#else
HAL_PCCARD_ITCallback(hpccard);
#endif
/* Clear PCCARD interrupt Rising edge pending bit */
__FMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FMC_FLAG_RISING_EDGE);
}
/* Check PCCARD interrupt Level flag */
if(__FMC_PCCARD_GET_FLAG(hpccard->Instance, FMC_FLAG_LEVEL))
{
/* PCCARD interrupt callback*/
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1)
hpccard->ItCallback(hpccard);
#else
HAL_PCCARD_ITCallback(hpccard);
#endif
/* Clear PCCARD interrupt Level pending bit */
__FMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FMC_FLAG_LEVEL);
}
/* Check PCCARD interrupt Falling edge flag */
if(__FMC_PCCARD_GET_FLAG(hpccard->Instance, FMC_FLAG_FALLING_EDGE))
{
/* PCCARD interrupt callback*/
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1)
hpccard->ItCallback(hpccard);
#else
HAL_PCCARD_ITCallback(hpccard);
#endif
/* Clear PCCARD interrupt Falling edge pending bit */
__FMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FMC_FLAG_FALLING_EDGE);
}
/* Check PCCARD interrupt FIFO empty flag */
if(__FMC_PCCARD_GET_FLAG(hpccard->Instance, FMC_FLAG_FEMPT))
{
/* PCCARD interrupt callback*/
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1)
hpccard->ItCallback(hpccard);
#else
HAL_PCCARD_ITCallback(hpccard);
#endif
/* Clear PCCARD interrupt FIFO empty pending bit */
__FMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FMC_FLAG_FEMPT);
}
}
/**
* @brief PCCARD interrupt feature callback
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains
* the configuration information for PCCARD module.
* @retval None
*/
__weak void HAL_PCCARD_ITCallback(PCCARD_HandleTypeDef *hpccard)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hpccard);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_PCCARD_ITCallback could be implemented in the user file
*/
}
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1)
/**
* @brief Register a User PCCARD Callback
* To be used instead of the weak (surcharged) predefined callback
* @param hpccard : PCCARD handle
* @param CallbackId : ID of the callback to be registered
* This parameter can be one of the following values:
* @arg @ref HAL_PCCARD_MSP_INIT_CB_ID PCCARD MspInit callback ID
* @arg @ref HAL_PCCARD_MSP_DEINIT_CB_ID PCCARD MspDeInit callback ID
* @arg @ref HAL_PCCARD_IT_CB_ID PCCARD IT callback ID
* @param pCallback : pointer to the Callback function
* @retval status
*/
HAL_StatusTypeDef HAL_PCCARD_RegisterCallback (PCCARD_HandleTypeDef *hpccard, HAL_PCCARD_CallbackIDTypeDef CallbackId, pPCCARD_CallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
if(pCallback == NULL)
{
return HAL_ERROR;
}
/* Process locked */
__HAL_LOCK(hpccard);
if(hpccard->State == HAL_PCCARD_STATE_READY)
{
switch (CallbackId)
{
case HAL_PCCARD_MSP_INIT_CB_ID :
hpccard->MspInitCallback = pCallback;
break;
case HAL_PCCARD_MSP_DEINIT_CB_ID :
hpccard->MspDeInitCallback = pCallback;
break;
case HAL_PCCARD_IT_CB_ID :
hpccard->ItCallback = pCallback;
break;
default :
/* update return status */
status = HAL_ERROR;
break;
}
}
else if(hpccard->State == HAL_PCCARD_STATE_RESET)
{
switch (CallbackId)
{
case HAL_PCCARD_MSP_INIT_CB_ID :
hpccard->MspInitCallback = pCallback;
break;
case HAL_PCCARD_MSP_DEINIT_CB_ID :
hpccard->MspDeInitCallback = pCallback;
break;
default :
/* update return status */
status = HAL_ERROR;
break;
}
}
else
{
/* update return status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(hpccard);
return status;
}
/**
* @brief Unregister a User PCCARD Callback
* PCCARD Callback is redirected to the weak (surcharged) predefined callback
* @param hpccard : PCCARD handle
* @param CallbackId : ID of the callback to be unregistered
* This parameter can be one of the following values:
* @arg @ref HAL_PCCARD_MSP_INIT_CB_ID PCCARD MspInit callback ID
* @arg @ref HAL_PCCARD_MSP_DEINIT_CB_ID PCCARD MspDeInit callback ID
* @arg @ref HAL_PCCARD_IT_CB_ID PCCARD IT callback ID
* @retval status
*/
HAL_StatusTypeDef HAL_PCCARD_UnRegisterCallback (PCCARD_HandleTypeDef *hpccard, HAL_PCCARD_CallbackIDTypeDef CallbackId)
{
HAL_StatusTypeDef status = HAL_OK;
/* Process locked */
__HAL_LOCK(hpccard);
if(hpccard->State == HAL_PCCARD_STATE_READY)
{
switch (CallbackId)
{
case HAL_PCCARD_MSP_INIT_CB_ID :
hpccard->MspInitCallback = HAL_PCCARD_MspInit;
break;
case HAL_PCCARD_MSP_DEINIT_CB_ID :
hpccard->MspDeInitCallback = HAL_PCCARD_MspDeInit;
break;
case HAL_PCCARD_IT_CB_ID :
hpccard->ItCallback = HAL_PCCARD_ITCallback;
break;
default :
/* update return status */
status = HAL_ERROR;
break;
}
}
else if(hpccard->State == HAL_PCCARD_STATE_RESET)
{
switch (CallbackId)
{
case HAL_PCCARD_MSP_INIT_CB_ID :
hpccard->MspInitCallback = HAL_PCCARD_MspInit;
break;
case HAL_PCCARD_MSP_DEINIT_CB_ID :
hpccard->MspDeInitCallback = HAL_PCCARD_MspDeInit;
break;
default :
/* update return status */
status = HAL_ERROR;
break;
}
}
else
{
/* update return status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(hpccard);
return status;
}
#endif
/**
* @}
*/
/** @defgroup PCCARD_Exported_Functions_Group3 State functions
* @brief Peripheral State functions
*
@verbatim
==============================================================================
##### PCCARD State functions #####
==============================================================================
[..]
This subsection permits to get in run-time the status of the PCCARD controller
and the data flow.
@endverbatim
* @{
*/
/**
* @brief return the PCCARD controller state
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains
* the configuration information for PCCARD module.
* @retval HAL state
*/
HAL_PCCARD_StateTypeDef HAL_PCCARD_GetState(PCCARD_HandleTypeDef *hpccard)
{
return hpccard->State;
}
/**
* @brief Get the compact flash memory status
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains
* the configuration information for PCCARD module.
* @retval New status of the PCCARD operation. This parameter can be:
* - CompactFlash_TIMEOUT_ERROR: when the previous operation generate
* a Timeout error
* - CompactFlash_READY: when memory is ready for the next operation
*/
HAL_PCCARD_StatusTypeDef HAL_PCCARD_GetStatus(PCCARD_HandleTypeDef *hpccard)
{
uint32_t timeout = PCCARD_TIMEOUT_STATUS, status_pccard = 0U;
/* Check the PCCARD controller state */
if(hpccard->State == HAL_PCCARD_STATE_BUSY)
{
return HAL_PCCARD_STATUS_ONGOING;
}
status_pccard = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE);
while((status_pccard == PCCARD_BUSY) && timeout)
{
status_pccard = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE);
timeout--;
}
if(timeout == 0U)
{
status_pccard = PCCARD_TIMEOUT_ERROR;
}
/* Return the operation status */
return (HAL_PCCARD_StatusTypeDef) status_pccard;
}
/**
* @brief Reads the Compact Flash memory status using the Read status command
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains
* the configuration information for PCCARD module.
* @retval The status of the Compact Flash memory. This parameter can be:
* - CompactFlash_BUSY: when memory is busy
* - CompactFlash_READY: when memory is ready for the next operation
* - CompactFlash_ERROR: when the previous operation generates error
*/
HAL_PCCARD_StatusTypeDef HAL_PCCARD_ReadStatus(PCCARD_HandleTypeDef *hpccard)
{
uint8_t data = 0U, status_pccard = PCCARD_BUSY;
/* Check the PCCARD controller state */
if(hpccard->State == HAL_PCCARD_STATE_BUSY)
{
return HAL_PCCARD_STATUS_ONGOING;
}
/* Read status operation */
data = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE);
if((data & PCCARD_TIMEOUT_ERROR) == PCCARD_TIMEOUT_ERROR)
{
status_pccard = PCCARD_TIMEOUT_ERROR;
}
else if((data & PCCARD_READY) == PCCARD_READY)
{
status_pccard = PCCARD_READY;
}
return (HAL_PCCARD_StatusTypeDef) status_pccard;
}
/**
* @}
*/
/**
* @}
*/
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
#endif /* HAL_PCCARD_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
File diff suppressed because it is too large Load Diff
@@ -1,348 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_pcd_ex.c
* @author MCD Application Team
* @brief PCD Extended HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the USB Peripheral Controller:
* + Extended features functions
*
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup PCDEx PCDEx
* @brief PCD Extended HAL module driver
* @{
*/
#ifdef HAL_PCD_MODULE_ENABLED
#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions
* @{
*/
/** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions
* @brief PCDEx control functions
*
@verbatim
===============================================================================
##### Extended features functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Update FIFO configuration
@endverbatim
* @{
*/
#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
/**
* @brief Set Tx FIFO
* @param hpcd PCD handle
* @param fifo The number of Tx fifo
* @param size Fifo size
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size)
{
uint8_t i;
uint32_t Tx_Offset;
/* TXn min size = 16 words. (n : Transmit FIFO index)
When a TxFIFO is not used, the Configuration should be as follows:
case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes)
--> Txm can use the space allocated for Txn.
case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes)
--> Txn should be configured with the minimum space of 16 words
The FIFO is used optimally when used TxFIFOs are allocated in the top
of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
When DMA is used 3n * FIFO locations should be reserved for internal DMA registers */
Tx_Offset = hpcd->Instance->GRXFSIZ;
if (fifo == 0U)
{
hpcd->Instance->DIEPTXF0_HNPTXFSIZ = ((uint32_t)size << 16) | Tx_Offset;
}
else
{
Tx_Offset += (hpcd->Instance->DIEPTXF0_HNPTXFSIZ) >> 16;
for (i = 0U; i < (fifo - 1U); i++)
{
Tx_Offset += (hpcd->Instance->DIEPTXF[i] >> 16);
}
/* Multiply Tx_Size by 2 to get higher performance */
hpcd->Instance->DIEPTXF[fifo - 1U] = ((uint32_t)size << 16) | Tx_Offset;
}
return HAL_OK;
}
/**
* @brief Set Rx FIFO
* @param hpcd PCD handle
* @param size Size of Rx fifo
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size)
{
hpcd->Instance->GRXFSIZ = size;
return HAL_OK;
}
#if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
/**
* @brief Activate LPM feature.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd)
{
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
hpcd->lpm_active = 1U;
hpcd->LPM_State = LPM_L0;
USBx->GINTMSK |= USB_OTG_GINTMSK_LPMINTM;
USBx->GLPMCFG |= (USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL);
return HAL_OK;
}
/**
* @brief Deactivate LPM feature.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd)
{
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
hpcd->lpm_active = 0U;
USBx->GINTMSK &= ~USB_OTG_GINTMSK_LPMINTM;
USBx->GLPMCFG &= ~(USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL);
return HAL_OK;
}
#endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) */
#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
/**
* @brief Handle BatteryCharging Process.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd)
{
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
uint32_t tickstart = HAL_GetTick();
/* Enable DCD : Data Contact Detect */
USBx->GCCFG |= USB_OTG_GCCFG_DCDEN;
/* Wait Detect flag or a timeout is happen */
while ((USBx->GCCFG & USB_OTG_GCCFG_DCDET) == 0U)
{
/* Check for the Timeout */
if ((HAL_GetTick() - tickstart) > 1000U)
{
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->BCDCallback(hpcd, PCD_BCD_ERROR);
#else
HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_ERROR);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
}
}
/* Right response got */
HAL_Delay(200U);
/* Check Detect flag*/
if ((USBx->GCCFG & USB_OTG_GCCFG_DCDET) == USB_OTG_GCCFG_DCDET)
{
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->BCDCallback(hpcd, PCD_BCD_CONTACT_DETECTION);
#else
HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
/*Primary detection: checks if connected to Standard Downstream Port
(without charging capability) */
USBx->GCCFG &= ~ USB_OTG_GCCFG_DCDEN;
HAL_Delay(50U);
USBx->GCCFG |= USB_OTG_GCCFG_PDEN;
HAL_Delay(50U);
if ((USBx->GCCFG & USB_OTG_GCCFG_PDET) == 0U)
{
/* Case of Standard Downstream Port */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->BCDCallback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT);
#else
HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* start secondary detection to check connection to Charging Downstream
Port or Dedicated Charging Port */
USBx->GCCFG &= ~ USB_OTG_GCCFG_PDEN;
HAL_Delay(50U);
USBx->GCCFG |= USB_OTG_GCCFG_SDEN;
HAL_Delay(50U);
if ((USBx->GCCFG & USB_OTG_GCCFG_SDET) == USB_OTG_GCCFG_SDET)
{
/* case Dedicated Charging Port */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->BCDCallback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT);
#else
HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* case Charging Downstream Port */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->BCDCallback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT);
#else
HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
}
/* Battery Charging capability discovery finished */
(void)HAL_PCDEx_DeActivateBCD(hpcd);
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->BCDCallback(hpcd, PCD_BCD_DISCOVERY_COMPLETED);
#else
HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DISCOVERY_COMPLETED);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
/**
* @brief Activate BatteryCharging feature.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd)
{
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
USBx->GCCFG &= ~(USB_OTG_GCCFG_PDEN);
USBx->GCCFG &= ~(USB_OTG_GCCFG_SDEN);
/* Power Down USB transceiver */
USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
/* Enable Battery charging */
USBx->GCCFG |= USB_OTG_GCCFG_BCDEN;
hpcd->battery_charging_active = 1U;
return HAL_OK;
}
/**
* @brief Deactivate BatteryCharging feature.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd)
{
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
USBx->GCCFG &= ~(USB_OTG_GCCFG_SDEN);
USBx->GCCFG &= ~(USB_OTG_GCCFG_PDEN);
/* Disable Battery charging */
USBx->GCCFG &= ~(USB_OTG_GCCFG_BCDEN);
hpcd->battery_charging_active = 0U;
return HAL_OK;
}
#endif /* defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) */
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
/**
* @brief Send LPM message to user layer callback.
* @param hpcd PCD handle
* @param msg LPM message
* @retval HAL status
*/
__weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hpcd);
UNUSED(msg);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_PCDEx_LPM_Callback could be implemented in the user file
*/
}
/**
* @brief Send BatteryCharging message to user layer callback.
* @param hpcd PCD handle
* @param msg LPM message
* @retval HAL status
*/
__weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hpcd);
UNUSED(msg);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_PCDEx_BCD_Callback could be implemented in the user file
*/
}
/**
* @}
*/
/**
* @}
*/
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
#endif /* HAL_PCD_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
@@ -1,576 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_pwr.c
* @author MCD Application Team
* @brief PWR HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Power Controller (PWR) peripheral:
* + Initialization and de-initialization functions
* + Peripheral Control functions
*
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup PWR PWR
* @brief PWR HAL module driver
* @{
*/
#ifdef HAL_PWR_MODULE_ENABLED
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/** @addtogroup PWR_Private_Constants
* @{
*/
/** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
* @{
*/
#define PVD_MODE_IT 0x00010000U
#define PVD_MODE_EVT 0x00020000U
#define PVD_RISING_EDGE 0x00000001U
#define PVD_FALLING_EDGE 0x00000002U
/**
* @}
*/
/**
* @}
*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup PWR_Exported_Functions PWR Exported Functions
* @{
*/
/** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
* @brief Initialization and de-initialization functions
*
@verbatim
===============================================================================
##### Initialization and de-initialization functions #####
===============================================================================
[..]
After reset, the backup domain (RTC registers, RTC backup data
registers and backup SRAM) is protected against possible unwanted
write accesses.
To enable access to the RTC Domain and RTC registers, proceed as follows:
(+) Enable the Power Controller (PWR) APB1 interface clock using the
__HAL_RCC_PWR_CLK_ENABLE() macro.
(+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
@endverbatim
* @{
*/
/**
* @brief Deinitializes the HAL PWR peripheral registers to their default reset values.
* @retval None
*/
void HAL_PWR_DeInit(void)
{
__HAL_RCC_PWR_FORCE_RESET();
__HAL_RCC_PWR_RELEASE_RESET();
}
/**
* @brief Enables access to the backup domain (RTC registers, RTC
* backup data registers and backup SRAM).
* @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the
* Backup Domain Access should be kept enabled.
* @note The following sequence is required to bypass the delay between
* DBP bit programming and the effective enabling of the backup domain.
* Please check the Errata Sheet for more details under "Possible delay
* in backup domain protection disabling/enabling after programming the
* DBP bit" section.
* @retval None
*/
void HAL_PWR_EnableBkUpAccess(void)
{
__IO uint32_t dummyread;
*(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE;
dummyread = PWR->CR;
UNUSED(dummyread);
}
/**
* @brief Disables access to the backup domain (RTC registers, RTC
* backup data registers and backup SRAM).
* @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the
* Backup Domain Access should be kept enabled.
* @note The following sequence is required to bypass the delay between
* DBP bit programming and the effective disabling of the backup domain.
* Please check the Errata Sheet for more details under "Possible delay
* in backup domain protection disabling/enabling after programming the
* DBP bit" section.
* @retval None
*/
void HAL_PWR_DisableBkUpAccess(void)
{
__IO uint32_t dummyread;
*(__IO uint32_t *) CR_DBP_BB = (uint32_t)DISABLE;
dummyread = PWR->CR;
UNUSED(dummyread);
}
/**
* @}
*/
/** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
* @brief Low Power modes configuration functions
*
@verbatim
===============================================================================
##### Peripheral Control functions #####
===============================================================================
*** PVD configuration ***
=========================
[..]
(+) The PVD is used to monitor the VDD power supply by comparing it to a
threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
(+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
than the PVD threshold. This event is internally connected to the EXTI
line16 and can generate an interrupt if enabled. This is done through
__HAL_PWR_PVD_EXTI_ENABLE_IT() macro.
(+) The PVD is stopped in Standby mode.
*** Wake-up pin configuration ***
================================
[..]
(+) Wake-up pin is used to wake up the system from Standby mode. This pin is
forced in input pull-down configuration and is active on rising edges.
(+) There is one Wake-up pin: Wake-up Pin 1 on PA.00.
(++) For STM32F446xx there are two Wake-Up pins: Pin1 on PA.00 and Pin2 on PC.13
(++) For STM32F410xx/STM32F412xx/STM32F413xx/STM32F423xx there are three Wake-Up pins: Pin1 on PA.00, Pin2 on PC.00 and Pin3 on PC.01
*** Low Power modes configuration ***
=====================================
[..]
The devices feature 3 low-power modes:
(+) Sleep mode: Cortex-M4 core stopped, peripherals kept running.
(+) Stop mode: all clocks are stopped, regulator running, regulator
in low power mode
(+) Standby mode: 1.2V domain powered off.
*** Sleep mode ***
==================
[..]
(+) Entry:
The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI)
functions with
(++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
(++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
-@@- The Regulator parameter is not used for the STM32F4 family
and is kept as parameter just to maintain compatibility with the
lower power families (STM32L).
(+) Exit:
Any peripheral interrupt acknowledged by the nested vectored interrupt
controller (NVIC) can wake up the device from Sleep mode.
*** Stop mode ***
=================
[..]
In Stop mode, all clocks in the 1.2V domain are stopped, the PLL, the HSI,
and the HSE RC oscillators are disabled. Internal SRAM and register contents
are preserved.
The voltage regulator can be configured either in normal or low-power mode.
To minimize the consumption In Stop mode, FLASH can be powered off before
entering the Stop mode using the HAL_PWREx_EnableFlashPowerDown() function.
It can be switched on again by software after exiting the Stop mode using
the HAL_PWREx_DisableFlashPowerDown() function.
(+) Entry:
The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON)
function with:
(++) Main regulator ON.
(++) Low Power regulator ON.
(+) Exit:
Any EXTI Line (Internal or External) configured in Interrupt/Event mode.
*** Standby mode ***
====================
[..]
(+)
The Standby mode allows to achieve the lowest power consumption. It is based
on the Cortex-M4 deep sleep mode, with the voltage regulator disabled.
The 1.2V domain is consequently powered off. The PLL, the HSI oscillator and
the HSE oscillator are also switched off. SRAM and register contents are lost
except for the RTC registers, RTC backup registers, backup SRAM and Standby
circuitry.
The voltage regulator is OFF.
(++) Entry:
(+++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
(++) Exit:
(+++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wake-up,
tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
*** Auto-wake-up (AWU) from low-power mode ***
=============================================
[..]
(+) The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
Wake-up event, a tamper event or a time-stamp event, without depending on
an external interrupt (Auto-wake-up mode).
(+) RTC auto-wake-up (AWU) from the Stop and Standby modes
(++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
(++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
is necessary to configure the RTC to detect the tamper or time stamp event using the
HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions.
(++) To wake up from the Stop mode with an RTC Wake-up event, it is necessary to
configure the RTC to generate the RTC Wake-up event using the HAL_RTCEx_SetWakeUpTimer_IT() function.
@endverbatim
* @{
*/
/**
* @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
* @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration
* information for the PVD.
* @note Refer to the electrical characteristics of your device datasheet for
* more details about the voltage threshold corresponding to each
* detection level.
* @retval None
*/
void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
{
/* Check the parameters */
assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
/* Set PLS[7:5] bits according to PVDLevel value */
MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
/* Clear any previous config. Keep it clear if no event or IT mode is selected */
__HAL_PWR_PVD_EXTI_DISABLE_EVENT();
__HAL_PWR_PVD_EXTI_DISABLE_IT();
__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
/* Configure interrupt mode */
if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
{
__HAL_PWR_PVD_EXTI_ENABLE_IT();
}
/* Configure event mode */
if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
{
__HAL_PWR_PVD_EXTI_ENABLE_EVENT();
}
/* Configure the edge */
if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
{
__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
}
if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
{
__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
}
}
/**
* @brief Enables the Power Voltage Detector(PVD).
* @retval None
*/
void HAL_PWR_EnablePVD(void)
{
*(__IO uint32_t *) CR_PVDE_BB = (uint32_t)ENABLE;
}
/**
* @brief Disables the Power Voltage Detector(PVD).
* @retval None
*/
void HAL_PWR_DisablePVD(void)
{
*(__IO uint32_t *) CR_PVDE_BB = (uint32_t)DISABLE;
}
/**
* @brief Enables the Wake-up PINx functionality.
* @param WakeUpPinx Specifies the Power Wake-Up pin to enable.
* This parameter can be one of the following values:
* @arg PWR_WAKEUP_PIN1
* @arg PWR_WAKEUP_PIN2 available only on STM32F410xx/STM32F446xx/STM32F412xx/STM32F413xx/STM32F423xx devices
* @arg PWR_WAKEUP_PIN3 available only on STM32F410xx/STM32F412xx/STM32F413xx/STM32F423xx devices
* @retval None
*/
void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
{
/* Check the parameter */
assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
/* Enable the wake up pin */
SET_BIT(PWR->CSR, WakeUpPinx);
}
/**
* @brief Disables the Wake-up PINx functionality.
* @param WakeUpPinx Specifies the Power Wake-Up pin to disable.
* This parameter can be one of the following values:
* @arg PWR_WAKEUP_PIN1
* @arg PWR_WAKEUP_PIN2 available only on STM32F410xx/STM32F446xx/STM32F412xx/STM32F413xx/STM32F423xx devices
* @arg PWR_WAKEUP_PIN3 available only on STM32F410xx/STM32F412xx/STM32F413xx/STM32F423xx devices
* @retval None
*/
void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
{
/* Check the parameter */
assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
/* Disable the wake up pin */
CLEAR_BIT(PWR->CSR, WakeUpPinx);
}
/**
* @brief Enters Sleep mode.
*
* @note In Sleep mode, all I/O pins keep the same state as in Run mode.
*
* @note In Sleep mode, the systick is stopped to avoid exit from this mode with
* systick interrupt when used as time base for Timeout
*
* @param Regulator Specifies the regulator state in SLEEP mode.
* This parameter can be one of the following values:
* @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
* @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
* @note This parameter is not used for the STM32F4 family and is kept as parameter
* just to maintain compatibility with the lower power families.
* @param SLEEPEntry Specifies if SLEEP mode in entered with WFI or WFE instruction.
* This parameter can be one of the following values:
* @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
* @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
* @retval None
*/
void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
{
/* Check the parameters */
assert_param(IS_PWR_REGULATOR(Regulator));
assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
UNUSED(Regulator);
/* Clear SLEEPDEEP bit of Cortex System Control Register */
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
/* Select SLEEP mode entry -------------------------------------------------*/
if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
{
/* Request Wait For Interrupt */
__WFI();
}
else
{
/* Request Wait For Event */
__SEV();
__WFE();
__WFE();
}
}
/**
* @brief Enters Stop mode.
* @note In Stop mode, all I/O pins keep the same state as in Run mode.
* @note When exiting Stop mode by issuing an interrupt or a wake-up event,
* the HSI RC oscillator is selected as system clock.
* @note When the voltage regulator operates in low power mode, an additional
* startup delay is incurred when waking up from Stop mode.
* By keeping the internal regulator ON during Stop mode, the consumption
* is higher although the startup time is reduced.
* @param Regulator Specifies the regulator state in Stop mode.
* This parameter can be one of the following values:
* @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
* @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
* @param STOPEntry Specifies if Stop mode in entered with WFI or WFE instruction.
* This parameter can be one of the following values:
* @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
* @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
* @retval None
*/
void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
{
/* Check the parameters */
assert_param(IS_PWR_REGULATOR(Regulator));
assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
/* Select the regulator state in Stop mode: Set PDDS and LPDS bits according to PWR_Regulator value */
MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS), Regulator);
/* Set SLEEPDEEP bit of Cortex System Control Register */
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
/* Select Stop mode entry --------------------------------------------------*/
if(STOPEntry == PWR_STOPENTRY_WFI)
{
/* Request Wait For Interrupt */
__WFI();
}
else
{
/* Request Wait For Event */
__SEV();
__WFE();
__WFE();
}
/* Reset SLEEPDEEP bit of Cortex System Control Register */
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
}
/**
* @brief Enters Standby mode.
* @note In Standby mode, all I/O pins are high impedance except for:
* - Reset pad (still available)
* - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
* Alarm out, or RTC clock calibration out.
* - RTC_AF2 pin (PI8) if configured for tamper or time-stamp.
* - WKUP pin 1 (PA0) if enabled.
* @retval None
*/
void HAL_PWR_EnterSTANDBYMode(void)
{
/* Select Standby mode */
SET_BIT(PWR->CR, PWR_CR_PDDS);
/* Set SLEEPDEEP bit of Cortex System Control Register */
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
/* This option is used to ensure that store operations are completed */
#if defined ( __CC_ARM)
__force_stores();
#endif
/* Request Wait For Interrupt */
__WFI();
}
/**
* @brief This function handles the PWR PVD interrupt request.
* @note This API should be called under the PVD_IRQHandler().
* @retval None
*/
void HAL_PWR_PVD_IRQHandler(void)
{
/* Check PWR Exti flag */
if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
{
/* PWR PVD interrupt user callback */
HAL_PWR_PVDCallback();
/* Clear PWR Exti pending bit */
__HAL_PWR_PVD_EXTI_CLEAR_FLAG();
}
}
/**
* @brief PWR PVD interrupt callback
* @retval None
*/
__weak void HAL_PWR_PVDCallback(void)
{
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_PWR_PVDCallback could be implemented in the user file
*/
}
/**
* @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
* @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
* re-enters SLEEP mode when an interruption handling is over.
* Setting this bit is useful when the processor is expected to run only on
* interruptions handling.
* @retval None
*/
void HAL_PWR_EnableSleepOnExit(void)
{
/* Set SLEEPONEXIT bit of Cortex System Control Register */
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
}
/**
* @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
* @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
* re-enters SLEEP mode when an interruption handling is over.
* @retval None
*/
void HAL_PWR_DisableSleepOnExit(void)
{
/* Clear SLEEPONEXIT bit of Cortex System Control Register */
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
}
/**
* @brief Enables CORTEX M4 SEVONPEND bit.
* @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
* WFE to wake up when an interrupt moves from inactive to pended.
* @retval None
*/
void HAL_PWR_EnableSEVOnPend(void)
{
/* Set SEVONPEND bit of Cortex System Control Register */
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
}
/**
* @brief Disables CORTEX M4 SEVONPEND bit.
* @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
* WFE to wake up when an interrupt moves from inactive to pended.
* @retval None
*/
void HAL_PWR_DisableSEVOnPend(void)
{
/* Clear SEVONPEND bit of Cortex System Control Register */
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
}
/**
* @}
*/
/**
* @}
*/
#endif /* HAL_PWR_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
@@ -1,604 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_pwr_ex.c
* @author MCD Application Team
* @brief Extended PWR HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of PWR extension peripheral:
* + Peripheral Extended features functions
*
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup PWREx PWREx
* @brief PWR HAL module driver
* @{
*/
#ifdef HAL_PWR_MODULE_ENABLED
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/** @addtogroup PWREx_Private_Constants
* @{
*/
#define PWR_OVERDRIVE_TIMEOUT_VALUE 1000U
#define PWR_UDERDRIVE_TIMEOUT_VALUE 1000U
#define PWR_BKPREG_TIMEOUT_VALUE 1000U
#define PWR_VOSRDY_TIMEOUT_VALUE 1000U
/**
* @}
*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup PWREx_Exported_Functions PWREx Exported Functions
* @{
*/
/** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended features functions
* @brief Peripheral Extended features functions
*
@verbatim
===============================================================================
##### Peripheral extended features functions #####
===============================================================================
*** Main and Backup Regulators configuration ***
================================================
[..]
(+) The backup domain includes 4 Kbytes of backup SRAM accessible only from
the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is
retained even in Standby or VBAT mode when the low power backup regulator
is enabled. It can be considered as an internal EEPROM when VBAT is
always present. You can use the HAL_PWREx_EnableBkUpReg() function to
enable the low power backup regulator.
(+) When the backup domain is supplied by VDD (analog switch connected to VDD)
the backup SRAM is powered from VDD which replaces the VBAT power supply to
save battery life.
(+) The backup SRAM is not mass erased by a tamper event. It is read
protected to prevent confidential data, such as cryptographic private
key, from being accessed. The backup SRAM can be erased only through
the Flash interface when a protection level change from level 1 to
level 0 is requested.
-@- Refer to the description of Read protection (RDP) in the Flash
programming manual.
(+) The main internal regulator can be configured to have a tradeoff between
performance and power consumption when the device does not operate at
the maximum frequency. This is done through __HAL_PWR_MAINREGULATORMODE_CONFIG()
macro which configure VOS bit in PWR_CR register
Refer to the product datasheets for more details.
*** FLASH Power Down configuration ****
=======================================
[..]
(+) By setting the FPDS bit in the PWR_CR register by using the
HAL_PWREx_EnableFlashPowerDown() function, the Flash memory also enters power
down mode when the device enters Stop mode. When the Flash memory
is in power down mode, an additional startup delay is incurred when
waking up from Stop mode.
(+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, the scale can be modified only when the PLL
is OFF and the HSI or HSE clock source is selected as system clock.
The new value programmed is active only when the PLL is ON.
When the PLL is OFF, the voltage scale 3 is automatically selected.
Refer to the datasheets for more details.
*** Over-Drive and Under-Drive configuration ****
=================================================
[..]
(+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Run mode: the main regulator has
2 operating modes available:
(++) Normal mode: The CPU and core logic operate at maximum frequency at a given
voltage scaling (scale 1, scale 2 or scale 3)
(++) Over-drive mode: This mode allows the CPU and the core logic to operate at a
higher frequency than the normal mode for a given voltage scaling (scale 1,
scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function and
disabled by HAL_PWREx_DisableOverDrive() function, to enter or exit from Over-drive mode please follow
the sequence described in Reference manual.
(+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Stop mode: the main regulator or low power regulator
supplies a low power voltage to the 1.2V domain, thus preserving the content of registers
and internal SRAM. 2 operating modes are available:
(++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only
available when the main regulator or the low power regulator is used in Scale 3 or
low voltage mode.
(++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is only
available when the main regulator or the low power regulator is in low voltage mode.
@endverbatim
* @{
*/
/**
* @brief Enables the Backup Regulator.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void)
{
uint32_t tickstart = 0U;
*(__IO uint32_t *) CSR_BRE_BB = (uint32_t)ENABLE;
/* Get tick */
tickstart = HAL_GetTick();
/* Wait till Backup regulator ready flag is set */
while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET)
{
if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
return HAL_OK;
}
/**
* @brief Disables the Backup Regulator.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void)
{
uint32_t tickstart = 0U;
*(__IO uint32_t *) CSR_BRE_BB = (uint32_t)DISABLE;
/* Get tick */
tickstart = HAL_GetTick();
/* Wait till Backup regulator ready flag is set */
while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) != RESET)
{
if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
return HAL_OK;
}
/**
* @brief Enables the Flash Power Down in Stop mode.
* @retval None
*/
void HAL_PWREx_EnableFlashPowerDown(void)
{
*(__IO uint32_t *) CR_FPDS_BB = (uint32_t)ENABLE;
}
/**
* @brief Disables the Flash Power Down in Stop mode.
* @retval None
*/
void HAL_PWREx_DisableFlashPowerDown(void)
{
*(__IO uint32_t *) CR_FPDS_BB = (uint32_t)DISABLE;
}
/**
* @brief Return Voltage Scaling Range.
* @retval The configured scale for the regulator voltage(VOS bit field).
* The returned value can be one of the following:
* - @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
* - @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
* - @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
*/
uint32_t HAL_PWREx_GetVoltageRange(void)
{
return (PWR->CR & PWR_CR_VOS);
}
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
/**
* @brief Configures the main internal regulator output voltage.
* @param VoltageScaling specifies the regulator output voltage to achieve
* a tradeoff between performance and power consumption.
* This parameter can be one of the following values:
* @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode,
* the maximum value of fHCLK = 168 MHz.
* @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode,
* the maximum value of fHCLK = 144 MHz.
* @note When moving from Range 1 to Range 2, the system frequency must be decreased to
* a value below 144 MHz before calling HAL_PWREx_ConfigVoltageScaling() API.
* When moving from Range 2 to Range 1, the system frequency can be increased to
* a value up to 168 MHz after calling HAL_PWREx_ConfigVoltageScaling() API.
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
{
uint32_t tickstart = 0U;
assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling));
/* Enable PWR RCC Clock Peripheral */
__HAL_RCC_PWR_CLK_ENABLE();
/* Set Range */
__HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling);
/* Get Start Tick*/
tickstart = HAL_GetTick();
while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET))
{
if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
return HAL_OK;
}
#elif defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) || \
defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || \
defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
/**
* @brief Configures the main internal regulator output voltage.
* @param VoltageScaling specifies the regulator output voltage to achieve
* a tradeoff between performance and power consumption.
* This parameter can be one of the following values:
* @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode,
* the maximum value of fHCLK is 168 MHz. It can be extended to
* 180 MHz by activating the over-drive mode.
* @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode,
* the maximum value of fHCLK is 144 MHz. It can be extended to,
* 168 MHz by activating the over-drive mode.
* @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output range 3 mode,
* the maximum value of fHCLK is 120 MHz.
* @note To update the system clock frequency(SYSCLK):
* - Set the HSI or HSE as system clock frequency using the HAL_RCC_ClockConfig().
* - Call the HAL_RCC_OscConfig() to configure the PLL.
* - Call HAL_PWREx_ConfigVoltageScaling() API to adjust the voltage scale.
* - Set the new system clock frequency using the HAL_RCC_ClockConfig().
* @note The scale can be modified only when the HSI or HSE clock source is selected
* as system clock source, otherwise the API returns HAL_ERROR.
* @note When the PLL is OFF, the voltage scale 3 is automatically selected and the VOS bits
* value in the PWR_CR1 register are not taken in account.
* @note This API forces the PLL state ON to allow the possibility to configure the voltage scale 1 or 2.
* @note The new voltage scale is active only when the PLL is ON.
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
{
uint32_t tickstart = 0U;
assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling));
/* Enable PWR RCC Clock Peripheral */
__HAL_RCC_PWR_CLK_ENABLE();
/* Check if the PLL is used as system clock or not */
if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
{
/* Disable the main PLL */
__HAL_RCC_PLL_DISABLE();
/* Get Start Tick */
tickstart = HAL_GetTick();
/* Wait till PLL is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
/* Set Range */
__HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling);
/* Enable the main PLL */
__HAL_RCC_PLL_ENABLE();
/* Get Start Tick */
tickstart = HAL_GetTick();
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
/* Get Start Tick */
tickstart = HAL_GetTick();
while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET))
{
if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
}
else
{
return HAL_ERROR;
}
return HAL_OK;
}
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) ||\
defined(STM32F413xx) || defined(STM32F423xx)
/**
* @brief Enables Main Regulator low voltage mode.
* @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx/
* STM32F413xx/STM32F423xx devices.
* @retval None
*/
void HAL_PWREx_EnableMainRegulatorLowVoltage(void)
{
*(__IO uint32_t *) CR_MRLVDS_BB = (uint32_t)ENABLE;
}
/**
* @brief Disables Main Regulator low voltage mode.
* @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx/
* STM32F413xx/STM32F423xxdevices.
* @retval None
*/
void HAL_PWREx_DisableMainRegulatorLowVoltage(void)
{
*(__IO uint32_t *) CR_MRLVDS_BB = (uint32_t)DISABLE;
}
/**
* @brief Enables Low Power Regulator low voltage mode.
* @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx/
* STM32F413xx/STM32F423xx devices.
* @retval None
*/
void HAL_PWREx_EnableLowRegulatorLowVoltage(void)
{
*(__IO uint32_t *) CR_LPLVDS_BB = (uint32_t)ENABLE;
}
/**
* @brief Disables Low Power Regulator low voltage mode.
* @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx/
* STM32F413xx/STM32F423xx devices.
* @retval None
*/
void HAL_PWREx_DisableLowRegulatorLowVoltage(void)
{
*(__IO uint32_t *) CR_LPLVDS_BB = (uint32_t)DISABLE;
}
#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F412Zx || STM32F412Rx || STM32F412Vx || STM32F412Cx ||
STM32F413xx || STM32F423xx */
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
/**
* @brief Activates the Over-Drive mode.
* @note This function can be used only for STM32F42xx/STM32F43xx/STM32F446xx/STM32F469xx/STM32F479xx devices.
* This mode allows the CPU and the core logic to operate at a higher frequency
* than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3).
* @note It is recommended to enter or exit Over-drive mode when the application is not running
* critical tasks and when the system clock source is either HSI or HSE.
* During the Over-drive switch activation, no peripheral clocks should be enabled.
* The peripheral clocks must be enabled once the Over-drive mode is activated.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void)
{
uint32_t tickstart = 0U;
__HAL_RCC_PWR_CLK_ENABLE();
/* Enable the Over-drive to extend the clock frequency to 180 Mhz */
__HAL_PWR_OVERDRIVE_ENABLE();
/* Get tick */
tickstart = HAL_GetTick();
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY))
{
if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
/* Enable the Over-drive switch */
__HAL_PWR_OVERDRIVESWITCHING_ENABLE();
/* Get tick */
tickstart = HAL_GetTick();
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY))
{
if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
return HAL_OK;
}
/**
* @brief Deactivates the Over-Drive mode.
* @note This function can be used only for STM32F42xx/STM32F43xx/STM32F446xx/STM32F469xx/STM32F479xx devices.
* This mode allows the CPU and the core logic to operate at a higher frequency
* than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3).
* @note It is recommended to enter or exit Over-drive mode when the application is not running
* critical tasks and when the system clock source is either HSI or HSE.
* During the Over-drive switch activation, no peripheral clocks should be enabled.
* The peripheral clocks must be enabled once the Over-drive mode is activated.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void)
{
uint32_t tickstart = 0U;
__HAL_RCC_PWR_CLK_ENABLE();
/* Disable the Over-drive switch */
__HAL_PWR_OVERDRIVESWITCHING_DISABLE();
/* Get tick */
tickstart = HAL_GetTick();
while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY))
{
if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
/* Disable the Over-drive */
__HAL_PWR_OVERDRIVE_DISABLE();
/* Get tick */
tickstart = HAL_GetTick();
while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY))
{
if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
return HAL_OK;
}
/**
* @brief Enters in Under-Drive STOP mode.
*
* @note This mode is only available for STM32F42xxx/STM32F43xxx/STM32F446xx/STM32F469xx/STM32F479xx devices.
*
* @note This mode can be selected only when the Under-Drive is already active
*
* @note This mode is enabled only with STOP low power mode.
* In this mode, the 1.2V domain is preserved in reduced leakage mode. This
* mode is only available when the main regulator or the low power regulator
* is in low voltage mode
*
* @note If the Under-drive mode was enabled, it is automatically disabled after
* exiting Stop mode.
* When the voltage regulator operates in Under-drive mode, an additional
* startup delay is induced when waking up from Stop mode.
*
* @note In Stop mode, all I/O pins keep the same state as in Run mode.
*
* @note When exiting Stop mode by issuing an interrupt or a wake-up event,
* the HSI RC oscillator is selected as system clock.
*
* @note When the voltage regulator operates in low power mode, an additional
* startup delay is incurred when waking up from Stop mode.
* By keeping the internal regulator ON during Stop mode, the consumption
* is higher although the startup time is reduced.
*
* @param Regulator specifies the regulator state in STOP mode.
* This parameter can be one of the following values:
* @arg PWR_MAINREGULATOR_UNDERDRIVE_ON: Main Regulator in under-drive mode
* and Flash memory in power-down when the device is in Stop under-drive mode
* @arg PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON: Low Power Regulator in under-drive mode
* and Flash memory in power-down when the device is in Stop under-drive mode
* @param STOPEntry specifies if STOP mode in entered with WFI or WFE instruction.
* This parameter can be one of the following values:
* @arg PWR_SLEEPENTRY_WFI: enter STOP mode with WFI instruction
* @arg PWR_SLEEPENTRY_WFE: enter STOP mode with WFE instruction
* @retval None
*/
HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
{
uint32_t tmpreg1 = 0U;
/* Check the parameters */
assert_param(IS_PWR_REGULATOR_UNDERDRIVE(Regulator));
assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
/* Enable Power ctrl clock */
__HAL_RCC_PWR_CLK_ENABLE();
/* Enable the Under-drive Mode ---------------------------------------------*/
/* Clear Under-drive flag */
__HAL_PWR_CLEAR_ODRUDR_FLAG();
/* Enable the Under-drive */
__HAL_PWR_UNDERDRIVE_ENABLE();
/* Select the regulator state in STOP mode ---------------------------------*/
tmpreg1 = PWR->CR;
/* Clear PDDS, LPDS, MRLUDS and LPLUDS bits */
tmpreg1 &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_LPUDS | PWR_CR_MRUDS);
/* Set LPDS, MRLUDS and LPLUDS bits according to PWR_Regulator value */
tmpreg1 |= Regulator;
/* Store the new value */
PWR->CR = tmpreg1;
/* Set SLEEPDEEP bit of Cortex System Control Register */
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
/* Select STOP mode entry --------------------------------------------------*/
if(STOPEntry == PWR_SLEEPENTRY_WFI)
{
/* Request Wait For Interrupt */
__WFI();
}
else
{
/* Request Wait For Event */
__WFE();
}
/* Reset SLEEPDEEP bit of Cortex System Control Register */
SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
return HAL_OK;
}
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
/**
* @}
*/
/**
* @}
*/
#endif /* HAL_PWR_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
@@ -1,868 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_rng.c
* @author MCD Application Team
* @brief RNG HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Random Number Generator (RNG) peripheral:
* + Initialization and configuration functions
* + Peripheral Control functions
* + Peripheral State functions
*
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
The RNG HAL driver can be used as follows:
(#) Enable the RNG controller clock using __HAL_RCC_RNG_CLK_ENABLE() macro
in HAL_RNG_MspInit().
(#) Activate the RNG peripheral using HAL_RNG_Init() function.
(#) Wait until the 32 bit Random Number Generator contains a valid
random data using (polling/interrupt) mode.
(#) Get the 32 bit random number using HAL_RNG_GenerateRandomNumber() function.
##### Callback registration #####
==================================
[..]
The compilation define USE_HAL_RNG_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
[..]
Use Function HAL_RNG_RegisterCallback() to register a user callback.
Function HAL_RNG_RegisterCallback() allows to register following callbacks:
(+) ErrorCallback : RNG Error Callback.
(+) MspInitCallback : RNG MspInit.
(+) MspDeInitCallback : RNG MspDeInit.
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
[..]
Use function HAL_RNG_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function.
HAL_RNG_UnRegisterCallback() takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) ErrorCallback : RNG Error Callback.
(+) MspInitCallback : RNG MspInit.
(+) MspDeInitCallback : RNG MspDeInit.
[..]
For specific callback ReadyDataCallback, use dedicated register callbacks:
respectively HAL_RNG_RegisterReadyDataCallback() , HAL_RNG_UnRegisterReadyDataCallback().
[..]
By default, after the HAL_RNG_Init() and when the state is HAL_RNG_STATE_RESET
all callbacks are set to the corresponding weak (surcharged) functions:
example HAL_RNG_ErrorCallback().
Exception done for MspInit and MspDeInit functions that are respectively
reset to the legacy weak (surcharged) functions in the HAL_RNG_Init()
and HAL_RNG_DeInit() only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the HAL_RNG_Init() and HAL_RNG_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
[..]
Callbacks can be registered/unregistered in HAL_RNG_STATE_READY state only.
Exception done MspInit/MspDeInit that can be registered/unregistered
in HAL_RNG_STATE_READY or HAL_RNG_STATE_RESET state, thus registered (user)
MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using HAL_RNG_RegisterCallback() before calling HAL_RNG_DeInit()
or HAL_RNG_Init() function.
[..]
When The compilation define USE_HAL_RNG_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registration feature is not available
and weak (surcharged) callbacks are used.
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
#if defined (RNG)
/** @addtogroup RNG
* @brief RNG HAL module driver.
* @{
*/
#ifdef HAL_RNG_MODULE_ENABLED
/* Private types -------------------------------------------------------------*/
/* Private defines -----------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/** @defgroup RNG_Private_Constants RNG Private Constants
* @{
*/
#define RNG_TIMEOUT_VALUE 2U
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/* Private functions prototypes ----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup RNG_Exported_Functions
* @{
*/
/** @addtogroup RNG_Exported_Functions_Group1
* @brief Initialization and configuration functions
*
@verbatim
===============================================================================
##### Initialization and configuration functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Initialize the RNG according to the specified parameters
in the RNG_InitTypeDef and create the associated handle
(+) DeInitialize the RNG peripheral
(+) Initialize the RNG MSP
(+) DeInitialize RNG MSP
@endverbatim
* @{
*/
/**
* @brief Initializes the RNG peripheral and creates the associated handle.
* @param hrng pointer to a RNG_HandleTypeDef structure that contains
* the configuration information for RNG.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng)
{
/* Check the RNG handle allocation */
if (hrng == NULL)
{
return HAL_ERROR;
}
/* Check the parameters */
assert_param(IS_RNG_ALL_INSTANCE(hrng->Instance));
#if (USE_HAL_RNG_REGISTER_CALLBACKS == 1)
if (hrng->State == HAL_RNG_STATE_RESET)
{
/* Allocate lock resource and initialize it */
hrng->Lock = HAL_UNLOCKED;
hrng->ReadyDataCallback = HAL_RNG_ReadyDataCallback; /* Legacy weak ReadyDataCallback */
hrng->ErrorCallback = HAL_RNG_ErrorCallback; /* Legacy weak ErrorCallback */
if (hrng->MspInitCallback == NULL)
{
hrng->MspInitCallback = HAL_RNG_MspInit; /* Legacy weak MspInit */
}
/* Init the low level hardware */
hrng->MspInitCallback(hrng);
}
#else
if (hrng->State == HAL_RNG_STATE_RESET)
{
/* Allocate lock resource and initialize it */
hrng->Lock = HAL_UNLOCKED;
/* Init the low level hardware */
HAL_RNG_MspInit(hrng);
}
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
/* Change RNG peripheral state */
hrng->State = HAL_RNG_STATE_BUSY;
/* Enable the RNG Peripheral */
__HAL_RNG_ENABLE(hrng);
/* Initialize the RNG state */
hrng->State = HAL_RNG_STATE_READY;
/* Initialise the error code */
hrng->ErrorCode = HAL_RNG_ERROR_NONE;
/* Return function status */
return HAL_OK;
}
/**
* @brief DeInitializes the RNG peripheral.
* @param hrng pointer to a RNG_HandleTypeDef structure that contains
* the configuration information for RNG.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RNG_DeInit(RNG_HandleTypeDef *hrng)
{
/* Check the RNG handle allocation */
if (hrng == NULL)
{
return HAL_ERROR;
}
/* Disable the RNG Peripheral */
CLEAR_BIT(hrng->Instance->CR, RNG_CR_IE | RNG_CR_RNGEN);
/* Clear RNG interrupt status flags */
CLEAR_BIT(hrng->Instance->SR, RNG_SR_CEIS | RNG_SR_SEIS);
#if (USE_HAL_RNG_REGISTER_CALLBACKS == 1)
if (hrng->MspDeInitCallback == NULL)
{
hrng->MspDeInitCallback = HAL_RNG_MspDeInit; /* Legacy weak MspDeInit */
}
/* DeInit the low level hardware */
hrng->MspDeInitCallback(hrng);
#else
/* DeInit the low level hardware */
HAL_RNG_MspDeInit(hrng);
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
/* Update the RNG state */
hrng->State = HAL_RNG_STATE_RESET;
/* Initialise the error code */
hrng->ErrorCode = HAL_RNG_ERROR_NONE;
/* Release Lock */
__HAL_UNLOCK(hrng);
/* Return the function status */
return HAL_OK;
}
/**
* @brief Initializes the RNG MSP.
* @param hrng pointer to a RNG_HandleTypeDef structure that contains
* the configuration information for RNG.
* @retval None
*/
__weak void HAL_RNG_MspInit(RNG_HandleTypeDef *hrng)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hrng);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_RNG_MspInit must be implemented in the user file.
*/
}
/**
* @brief DeInitializes the RNG MSP.
* @param hrng pointer to a RNG_HandleTypeDef structure that contains
* the configuration information for RNG.
* @retval None
*/
__weak void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hrng);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_RNG_MspDeInit must be implemented in the user file.
*/
}
#if (USE_HAL_RNG_REGISTER_CALLBACKS == 1)
/**
* @brief Register a User RNG Callback
* To be used instead of the weak predefined callback
* @param hrng RNG handle
* @param CallbackID ID of the callback to be registered
* This parameter can be one of the following values:
* @arg @ref HAL_RNG_ERROR_CB_ID Error callback ID
* @arg @ref HAL_RNG_MSPINIT_CB_ID MspInit callback ID
* @arg @ref HAL_RNG_MSPDEINIT_CB_ID MspDeInit callback ID
* @param pCallback pointer to the Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RNG_RegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_CallbackIDTypeDef CallbackID,
pRNG_CallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
if (pCallback == NULL)
{
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
return HAL_ERROR;
}
/* Process locked */
__HAL_LOCK(hrng);
if (HAL_RNG_STATE_READY == hrng->State)
{
switch (CallbackID)
{
case HAL_RNG_ERROR_CB_ID :
hrng->ErrorCallback = pCallback;
break;
case HAL_RNG_MSPINIT_CB_ID :
hrng->MspInitCallback = pCallback;
break;
case HAL_RNG_MSPDEINIT_CB_ID :
hrng->MspDeInitCallback = pCallback;
break;
default :
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
}
}
else if (HAL_RNG_STATE_RESET == hrng->State)
{
switch (CallbackID)
{
case HAL_RNG_MSPINIT_CB_ID :
hrng->MspInitCallback = pCallback;
break;
case HAL_RNG_MSPDEINIT_CB_ID :
hrng->MspDeInitCallback = pCallback;
break;
default :
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
}
}
else
{
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(hrng);
return status;
}
/**
* @brief Unregister an RNG Callback
* RNG callabck is redirected to the weak predefined callback
* @param hrng RNG handle
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
* @arg @ref HAL_RNG_ERROR_CB_ID Error callback ID
* @arg @ref HAL_RNG_MSPINIT_CB_ID MspInit callback ID
* @arg @ref HAL_RNG_MSPDEINIT_CB_ID MspDeInit callback ID
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RNG_UnRegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_CallbackIDTypeDef CallbackID)
{
HAL_StatusTypeDef status = HAL_OK;
/* Process locked */
__HAL_LOCK(hrng);
if (HAL_RNG_STATE_READY == hrng->State)
{
switch (CallbackID)
{
case HAL_RNG_ERROR_CB_ID :
hrng->ErrorCallback = HAL_RNG_ErrorCallback; /* Legacy weak ErrorCallback */
break;
case HAL_RNG_MSPINIT_CB_ID :
hrng->MspInitCallback = HAL_RNG_MspInit; /* Legacy weak MspInit */
break;
case HAL_RNG_MSPDEINIT_CB_ID :
hrng->MspDeInitCallback = HAL_RNG_MspDeInit; /* Legacy weak MspDeInit */
break;
default :
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
}
}
else if (HAL_RNG_STATE_RESET == hrng->State)
{
switch (CallbackID)
{
case HAL_RNG_MSPINIT_CB_ID :
hrng->MspInitCallback = HAL_RNG_MspInit; /* Legacy weak MspInit */
break;
case HAL_RNG_MSPDEINIT_CB_ID :
hrng->MspDeInitCallback = HAL_RNG_MspDeInit; /* Legacy weak MspInit */
break;
default :
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
}
}
else
{
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(hrng);
return status;
}
/**
* @brief Register Data Ready RNG Callback
* To be used instead of the weak HAL_RNG_ReadyDataCallback() predefined callback
* @param hrng RNG handle
* @param pCallback pointer to the Data Ready Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RNG_RegisterReadyDataCallback(RNG_HandleTypeDef *hrng, pRNG_ReadyDataCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
if (pCallback == NULL)
{
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
return HAL_ERROR;
}
/* Process locked */
__HAL_LOCK(hrng);
if (HAL_RNG_STATE_READY == hrng->State)
{
hrng->ReadyDataCallback = pCallback;
}
else
{
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(hrng);
return status;
}
/**
* @brief UnRegister the Data Ready RNG Callback
* Data Ready RNG Callback is redirected to the weak HAL_RNG_ReadyDataCallback() predefined callback
* @param hrng RNG handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RNG_UnRegisterReadyDataCallback(RNG_HandleTypeDef *hrng)
{
HAL_StatusTypeDef status = HAL_OK;
/* Process locked */
__HAL_LOCK(hrng);
if (HAL_RNG_STATE_READY == hrng->State)
{
hrng->ReadyDataCallback = HAL_RNG_ReadyDataCallback; /* Legacy weak ReadyDataCallback */
}
else
{
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(hrng);
return status;
}
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
/**
* @}
*/
/** @addtogroup RNG_Exported_Functions_Group2
* @brief Peripheral Control functions
*
@verbatim
===============================================================================
##### Peripheral Control functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Get the 32 bit Random number
(+) Get the 32 bit Random number with interrupt enabled
(+) Handle RNG interrupt request
@endverbatim
* @{
*/
/**
* @brief Generates a 32-bit random number.
* @note Each time the random number data is read the RNG_FLAG_DRDY flag
* is automatically cleared.
* @param hrng pointer to a RNG_HandleTypeDef structure that contains
* the configuration information for RNG.
* @param random32bit pointer to generated random number variable if successful.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit)
{
uint32_t tickstart;
HAL_StatusTypeDef status = HAL_OK;
/* Process Locked */
__HAL_LOCK(hrng);
/* Check RNG peripheral state */
if (hrng->State == HAL_RNG_STATE_READY)
{
/* Change RNG peripheral state */
hrng->State = HAL_RNG_STATE_BUSY;
/* Get tick */
tickstart = HAL_GetTick();
/* Check if data register contains valid random data */
while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
{
if ((HAL_GetTick() - tickstart) > RNG_TIMEOUT_VALUE)
{
/* New check to avoid false timeout detection in case of preemption */
if (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
{
hrng->State = HAL_RNG_STATE_READY;
hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT;
/* Process Unlocked */
__HAL_UNLOCK(hrng);
return HAL_ERROR;
}
}
}
/* Get a 32bit Random number */
hrng->RandomNumber = hrng->Instance->DR;
*random32bit = hrng->RandomNumber;
hrng->State = HAL_RNG_STATE_READY;
}
else
{
hrng->ErrorCode = HAL_RNG_ERROR_BUSY;
status = HAL_ERROR;
}
/* Process Unlocked */
__HAL_UNLOCK(hrng);
return status;
}
/**
* @brief Generates a 32-bit random number in interrupt mode.
* @param hrng pointer to a RNG_HandleTypeDef structure that contains
* the configuration information for RNG.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber_IT(RNG_HandleTypeDef *hrng)
{
HAL_StatusTypeDef status = HAL_OK;
/* Process Locked */
__HAL_LOCK(hrng);
/* Check RNG peripheral state */
if (hrng->State == HAL_RNG_STATE_READY)
{
/* Change RNG peripheral state */
hrng->State = HAL_RNG_STATE_BUSY;
/* Enable the RNG Interrupts: Data Ready, Clock error, Seed error */
__HAL_RNG_ENABLE_IT(hrng);
}
else
{
/* Process Unlocked */
__HAL_UNLOCK(hrng);
hrng->ErrorCode = HAL_RNG_ERROR_BUSY;
status = HAL_ERROR;
}
return status;
}
/**
* @brief Returns generated random number in polling mode (Obsolete)
* Use HAL_RNG_GenerateRandomNumber() API instead.
* @param hrng pointer to a RNG_HandleTypeDef structure that contains
* the configuration information for RNG.
* @retval Random value
*/
uint32_t HAL_RNG_GetRandomNumber(RNG_HandleTypeDef *hrng)
{
if (HAL_RNG_GenerateRandomNumber(hrng, &(hrng->RandomNumber)) == HAL_OK)
{
return hrng->RandomNumber;
}
else
{
return 0U;
}
}
/**
* @brief Returns a 32-bit random number with interrupt enabled (Obsolete),
* Use HAL_RNG_GenerateRandomNumber_IT() API instead.
* @param hrng pointer to a RNG_HandleTypeDef structure that contains
* the configuration information for RNG.
* @retval 32-bit random number
*/
uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng)
{
uint32_t random32bit = 0U;
/* Process locked */
__HAL_LOCK(hrng);
/* Change RNG peripheral state */
hrng->State = HAL_RNG_STATE_BUSY;
/* Get a 32bit Random number */
random32bit = hrng->Instance->DR;
/* Enable the RNG Interrupts: Data Ready, Clock error, Seed error */
__HAL_RNG_ENABLE_IT(hrng);
/* Return the 32 bit random number */
return random32bit;
}
/**
* @brief Handles RNG interrupt request.
* @note In the case of a clock error, the RNG is no more able to generate
* random numbers because the PLL48CLK clock is not correct. User has
* to check that the clock controller is correctly configured to provide
* the RNG clock and clear the CEIS bit using __HAL_RNG_CLEAR_IT().
* The clock error has no impact on the previously generated
* random numbers, and the RNG_DR register contents can be used.
* @note In the case of a seed error, the generation of random numbers is
* interrupted as long as the SECS bit is '1'. If a number is
* available in the RNG_DR register, it must not be used because it may
* not have enough entropy. In this case, it is recommended to clear the
* SEIS bit using __HAL_RNG_CLEAR_IT(), then disable and enable
* the RNG peripheral to reinitialize and restart the RNG.
* @note User-written HAL_RNG_ErrorCallback() API is called once whether SEIS
* or CEIS are set.
* @param hrng pointer to a RNG_HandleTypeDef structure that contains
* the configuration information for RNG.
* @retval None
*/
void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng)
{
uint32_t rngclockerror = 0U;
/* RNG clock error interrupt occurred */
if (__HAL_RNG_GET_IT(hrng, RNG_IT_CEI) != RESET)
{
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_CLOCK;
rngclockerror = 1U;
}
else if (__HAL_RNG_GET_IT(hrng, RNG_IT_SEI) != RESET)
{
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_SEED;
rngclockerror = 1U;
}
else
{
/* Nothing to do */
}
if (rngclockerror == 1U)
{
/* Change RNG peripheral state */
hrng->State = HAL_RNG_STATE_ERROR;
#if (USE_HAL_RNG_REGISTER_CALLBACKS == 1)
/* Call registered Error callback */
hrng->ErrorCallback(hrng);
#else
/* Call legacy weak Error callback */
HAL_RNG_ErrorCallback(hrng);
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
/* Clear the clock error flag */
__HAL_RNG_CLEAR_IT(hrng, RNG_IT_CEI | RNG_IT_SEI);
return;
}
/* Check RNG data ready interrupt occurred */
if (__HAL_RNG_GET_IT(hrng, RNG_IT_DRDY) != RESET)
{
/* Generate random number once, so disable the IT */
__HAL_RNG_DISABLE_IT(hrng);
/* Get the 32bit Random number (DRDY flag automatically cleared) */
hrng->RandomNumber = hrng->Instance->DR;
if (hrng->State != HAL_RNG_STATE_ERROR)
{
/* Change RNG peripheral state */
hrng->State = HAL_RNG_STATE_READY;
/* Process Unlocked */
__HAL_UNLOCK(hrng);
#if (USE_HAL_RNG_REGISTER_CALLBACKS == 1)
/* Call registered Data Ready callback */
hrng->ReadyDataCallback(hrng, hrng->RandomNumber);
#else
/* Call legacy weak Data Ready callback */
HAL_RNG_ReadyDataCallback(hrng, hrng->RandomNumber);
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
}
}
}
/**
* @brief Read latest generated random number.
* @param hrng pointer to a RNG_HandleTypeDef structure that contains
* the configuration information for RNG.
* @retval random value
*/
uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng)
{
return (hrng->RandomNumber);
}
/**
* @brief Data Ready callback in non-blocking mode.
* @param hrng pointer to a RNG_HandleTypeDef structure that contains
* the configuration information for RNG.
* @param random32bit generated random number.
* @retval None
*/
__weak void HAL_RNG_ReadyDataCallback(RNG_HandleTypeDef *hrng, uint32_t random32bit)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hrng);
UNUSED(random32bit);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_RNG_ReadyDataCallback must be implemented in the user file.
*/
}
/**
* @brief RNG error callbacks.
* @param hrng pointer to a RNG_HandleTypeDef structure that contains
* the configuration information for RNG.
* @retval None
*/
__weak void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hrng);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_RNG_ErrorCallback must be implemented in the user file.
*/
}
/**
* @}
*/
/** @addtogroup RNG_Exported_Functions_Group3
* @brief Peripheral State functions
*
@verbatim
===============================================================================
##### Peripheral State functions #####
===============================================================================
[..]
This subsection permits to get in run-time the status of the peripheral
and the data flow.
@endverbatim
* @{
*/
/**
* @brief Returns the RNG state.
* @param hrng pointer to a RNG_HandleTypeDef structure that contains
* the configuration information for RNG.
* @retval HAL state
*/
HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng)
{
return hrng->State;
}
/**
* @brief Return the RNG handle error code.
* @param hrng: pointer to a RNG_HandleTypeDef structure.
* @retval RNG Error Code
*/
uint32_t HAL_RNG_GetError(RNG_HandleTypeDef *hrng)
{
/* Return RNG Error Code */
return hrng->ErrorCode;
}
/**
* @}
*/
/**
* @}
*/
#endif /* HAL_RNG_MODULE_ENABLED */
/**
* @}
*/
#endif /* RNG */
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
File diff suppressed because it is too large Load Diff
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@@ -1,311 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_sai_ex.c
* @author MCD Application Team
* @brief SAI Extension HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of SAI extension peripheral:
* + Extension features functions
*
@verbatim
==============================================================================
##### SAI peripheral extension features #####
==============================================================================
[..] Comparing to other previous devices, the SAI interface for STM32F446xx
devices contains the following additional features :
(+) Possibility to be clocked from PLLR
##### How to use this driver #####
==============================================================================
[..] This driver provides functions to manage several sources to clock SAI
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup SAIEx SAIEx
* @brief SAI Extension HAL module driver
* @{
*/
#ifdef HAL_SAI_MODULE_ENABLED
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || \
defined(STM32F423xx)
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* SAI registers Masks */
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup SAI_Private_Functions SAI Private Functions
* @{
*/
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup SAIEx_Exported_Functions SAI Extended Exported Functions
* @{
*/
/** @defgroup SAIEx_Exported_Functions_Group1 Extension features functions
* @brief Extension features functions
*
@verbatim
===============================================================================
##### Extension features Functions #####
===============================================================================
[..]
This subsection provides a set of functions allowing to manage the possible
SAI clock sources.
@endverbatim
* @{
*/
/**
* @brief Configure SAI Block synchronization mode
* @param hsai pointer to a SAI_HandleTypeDef structure that contains
* the configuration information for SAI module.
* @retval SAI Clock Input
*/
void SAI_BlockSynchroConfig(SAI_HandleTypeDef *hsai)
{
uint32_t tmpregisterGCR;
#if defined(STM32F446xx)
/* This setting must be done with both audio block (A & B) disabled */
switch (hsai->Init.SynchroExt)
{
case SAI_SYNCEXT_DISABLE :
tmpregisterGCR = 0U;
break;
case SAI_SYNCEXT_OUTBLOCKA_ENABLE :
tmpregisterGCR = SAI_GCR_SYNCOUT_0;
break;
case SAI_SYNCEXT_OUTBLOCKB_ENABLE :
tmpregisterGCR = SAI_GCR_SYNCOUT_1;
break;
default:
tmpregisterGCR = 0U;
break;
}
if ((hsai->Init.Synchro) == SAI_SYNCHRONOUS_EXT_SAI2)
{
tmpregisterGCR |= SAI_GCR_SYNCIN_0;
}
if ((hsai->Instance == SAI1_Block_A) || (hsai->Instance == SAI1_Block_B))
{
SAI1->GCR = tmpregisterGCR;
}
else
{
SAI2->GCR = tmpregisterGCR;
}
#endif /* STM32F446xx */
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || defined(STM32F423xx)
/* This setting must be done with both audio block (A & B) disabled */
switch (hsai->Init.SynchroExt)
{
case SAI_SYNCEXT_DISABLE :
tmpregisterGCR = 0U;
break;
case SAI_SYNCEXT_OUTBLOCKA_ENABLE :
tmpregisterGCR = SAI_GCR_SYNCOUT_0;
break;
case SAI_SYNCEXT_OUTBLOCKB_ENABLE :
tmpregisterGCR = SAI_GCR_SYNCOUT_1;
break;
default:
tmpregisterGCR = 0U;
break;
}
SAI1->GCR = tmpregisterGCR;
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F413xx || STM32F423xx */
}
/**
* @brief Get SAI Input Clock based on SAI source clock selection
* @param hsai pointer to a SAI_HandleTypeDef structure that contains
* the configuration information for SAI module.
* @retval SAI Clock Input
*/
uint32_t SAI_GetInputClock(SAI_HandleTypeDef *hsai)
{
/* This variable used to store the SAI_CK_x (value in Hz) */
uint32_t saiclocksource = 0U;
#if defined(STM32F446xx)
if ((hsai->Instance == SAI1_Block_A) || (hsai->Instance == SAI1_Block_B))
{
saiclocksource = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SAI1);
}
else /* SAI2_Block_A || SAI2_Block_B*/
{
saiclocksource = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SAI2);
}
#endif /* STM32F446xx */
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || defined(STM32F423xx)
uint32_t vcoinput = 0U, tmpreg = 0U;
/* Check the SAI Block parameters */
assert_param(IS_SAI_CLK_SOURCE(hsai->Init.ClockSource));
/* SAI Block clock source selection */
if (hsai->Instance == SAI1_Block_A)
{
__HAL_RCC_SAI_BLOCKACLKSOURCE_CONFIG(hsai->Init.ClockSource);
}
else
{
__HAL_RCC_SAI_BLOCKBCLKSOURCE_CONFIG((uint32_t)(hsai->Init.ClockSource << 2U));
}
/* VCO Input Clock value calculation */
if ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSI)
{
/* In Case the PLL Source is HSI (Internal Clock) */
vcoinput = (HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
}
else
{
/* In Case the PLL Source is HSE (External Clock) */
vcoinput = ((HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM)));
}
#if defined(STM32F413xx) || defined(STM32F423xx)
/* SAI_CLK_x : SAI Block Clock configuration for different clock sources selected */
if (hsai->Init.ClockSource == SAI_CLKSOURCE_PLLR)
{
/* Configure the PLLI2S division factor */
/* PLL_VCO Input = PLL_SOURCE/PLLM */
/* PLL_VCO Output = PLL_VCO Input * PLLN */
/* SAI_CLK(first level) = PLL_VCO Output/PLLR */
tmpreg = (RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 28U;
saiclocksource = (vcoinput * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6U)) / (tmpreg);
/* SAI_CLK_x = SAI_CLK(first level)/PLLDIVR */
tmpreg = (((RCC->DCKCFGR & RCC_DCKCFGR_PLLDIVR) >> 8U) + 1U);
saiclocksource = saiclocksource / (tmpreg);
}
else if (hsai->Init.ClockSource == SAI_CLKSOURCE_PLLI2S)
{
/* Configure the PLLI2S division factor */
/* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
/* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
/* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SR */
tmpreg = (RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28U;
saiclocksource = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U)) / (tmpreg);
/* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVR */
tmpreg = ((RCC->DCKCFGR & RCC_DCKCFGR_PLLI2SDIVR) + 1U);
saiclocksource = saiclocksource / (tmpreg);
}
else if (hsai->Init.ClockSource == SAI_CLKSOURCE_HS)
{
if ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
{
/* Get the I2S source clock value */
saiclocksource = (uint32_t)(HSE_VALUE);
}
else
{
/* Get the I2S source clock value */
saiclocksource = (uint32_t)(HSI_VALUE);
}
}
else /* sConfig->ClockSource == SAI_CLKSource_Ext */
{
saiclocksource = EXTERNAL_CLOCK_VALUE;
}
#else
/* SAI_CLK_x : SAI Block Clock configuration for different clock sources selected */
if (hsai->Init.ClockSource == SAI_CLKSOURCE_PLLSAI)
{
/* Configure the PLLI2S division factor */
/* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
/* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
/* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
tmpreg = (RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> 24U;
saiclocksource = (vcoinput * ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIN) >> 6U)) / (tmpreg);
/* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
tmpreg = (((RCC->DCKCFGR & RCC_DCKCFGR_PLLSAIDIVQ) >> 8U) + 1U);
saiclocksource = saiclocksource / (tmpreg);
}
else if (hsai->Init.ClockSource == SAI_CLKSOURCE_PLLI2S)
{
/* Configure the PLLI2S division factor */
/* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
/* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
/* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
tmpreg = (RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> 24U;
saiclocksource = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U)) / (tmpreg);
/* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
tmpreg = ((RCC->DCKCFGR & RCC_DCKCFGR_PLLI2SDIVQ) + 1U);
saiclocksource = saiclocksource / (tmpreg);
}
else /* sConfig->ClockSource == SAI_CLKSource_Ext */
{
/* Enable the External Clock selection */
__HAL_RCC_I2S_CONFIG(RCC_I2SCLKSOURCE_EXT);
saiclocksource = EXTERNAL_CLOCK_VALUE;
}
#endif /* STM32F413xx || STM32F423xx */
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F413xx || STM32F423xx */
/* the return result is the value of SAI clock */
return saiclocksource;
}
/**
* @}
*/
/**
* @}
*/
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx || STM32F413xx || STM32F423xx */
#endif /* HAL_SAI_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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@@ -1,912 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_sram.c
* @author MCD Application Team
* @brief SRAM HAL module driver.
* This file provides a generic firmware to drive SRAM memories
* mounted as external device.
*
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
This driver is a generic layered driver which contains a set of APIs used to
control SRAM memories. It uses the FMC layer functions to interface
with SRAM devices.
The following sequence should be followed to configure the FMC/FSMC to interface
with SRAM/PSRAM memories:
(#) Declare a SRAM_HandleTypeDef handle structure, for example:
SRAM_HandleTypeDef hsram; and:
(++) Fill the SRAM_HandleTypeDef handle "Init" field with the allowed
values of the structure member.
(++) Fill the SRAM_HandleTypeDef handle "Instance" field with a predefined
base register instance for NOR or SRAM device
(++) Fill the SRAM_HandleTypeDef handle "Extended" field with a predefined
base register instance for NOR or SRAM extended mode
(#) Declare two FMC_NORSRAM_TimingTypeDef structures, for both normal and extended
mode timings; for example:
FMC_NORSRAM_TimingTypeDef Timing and FMC_NORSRAM_TimingTypeDef ExTiming;
and fill its fields with the allowed values of the structure member.
(#) Initialize the SRAM Controller by calling the function HAL_SRAM_Init(). This function
performs the following sequence:
(##) MSP hardware layer configuration using the function HAL_SRAM_MspInit()
(##) Control register configuration using the FMC NORSRAM interface function
FMC_NORSRAM_Init()
(##) Timing register configuration using the FMC NORSRAM interface function
FMC_NORSRAM_Timing_Init()
(##) Extended mode Timing register configuration using the FMC NORSRAM interface function
FMC_NORSRAM_Extended_Timing_Init()
(##) Enable the SRAM device using the macro __FMC_NORSRAM_ENABLE()
(#) At this stage you can perform read/write accesses from/to the memory connected
to the NOR/SRAM Bank. You can perform either polling or DMA transfer using the
following APIs:
(++) HAL_SRAM_Read()/HAL_SRAM_Write() for polling read/write access
(++) HAL_SRAM_Read_DMA()/HAL_SRAM_Write_DMA() for DMA read/write transfer
(#) You can also control the SRAM device by calling the control APIs HAL_SRAM_WriteOperation_Enable()/
HAL_SRAM_WriteOperation_Disable() to respectively enable/disable the SRAM write operation
(#) You can continuously monitor the SRAM device HAL state by calling the function
HAL_SRAM_GetState()
*** Callback registration ***
=============================================
[..]
The compilation define USE_HAL_SRAM_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
Use Functions @ref HAL_SRAM_RegisterCallback() to register a user callback,
it allows to register following callbacks:
(+) MspInitCallback : SRAM MspInit.
(+) MspDeInitCallback : SRAM MspDeInit.
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
Use function @ref HAL_SRAM_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function. It allows to reset following callbacks:
(+) MspInitCallback : SRAM MspInit.
(+) MspDeInitCallback : SRAM MspDeInit.
This function) takes as parameters the HAL peripheral handle and the Callback ID.
By default, after the @ref HAL_SRAM_Init and if the state is HAL_SRAM_STATE_RESET
all callbacks are reset to the corresponding legacy weak (surcharged) functions.
Exception done for MspInit and MspDeInit callbacks that are respectively
reset to the legacy weak (surcharged) functions in the @ref HAL_SRAM_Init
and @ref HAL_SRAM_DeInit only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the @ref HAL_SRAM_Init and @ref HAL_SRAM_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in READY state only.
Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_SRAM_RegisterCallback before calling @ref HAL_SRAM_DeInit
or @ref HAL_SRAM_Init function.
When The compilation define USE_HAL_SRAM_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
and weak (surcharged) callbacks are used.
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup SRAM SRAM
* @brief SRAM driver modules
* @{
*/
#ifdef HAL_SRAM_MODULE_ENABLED
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx)
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup SRAM_Exported_Functions SRAM Exported Functions
* @{
*/
/** @defgroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
* @brief Initialization and Configuration functions
*
@verbatim
==============================================================================
##### SRAM Initialization and de_initialization functions #####
==============================================================================
[..] This section provides functions allowing to initialize/de-initialize
the SRAM memory
@endverbatim
* @{
*/
/**
* @brief Performs the SRAM device initialization sequence
* @param hsram pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @param Timing Pointer to SRAM control timing structure
* @param ExtTiming Pointer to SRAM extended mode timing structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
{
/* Check the SRAM handle parameter */
if(hsram == NULL)
{
return HAL_ERROR;
}
if(hsram->State == HAL_SRAM_STATE_RESET)
{
/* Allocate lock resource and initialize it */
hsram->Lock = HAL_UNLOCKED;
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
if(hsram->MspInitCallback == NULL)
{
hsram->MspInitCallback = HAL_SRAM_MspInit;
}
hsram->DmaXferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
hsram->DmaXferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
/* Init the low level hardware */
hsram->MspInitCallback(hsram);
#else
/* Initialize the low level hardware (MSP) */
HAL_SRAM_MspInit(hsram);
#endif
}
/* Initialize SRAM control Interface */
FMC_NORSRAM_Init(hsram->Instance, &(hsram->Init));
/* Initialize SRAM timing Interface */
FMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank);
/* Initialize SRAM extended mode timing Interface */
FMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank, hsram->Init.ExtendedMode);
/* Enable the NORSRAM device */
__FMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank);
return HAL_OK;
}
/**
* @brief Performs the SRAM device De-initialization sequence.
* @param hsram pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram)
{
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
if(hsram->MspDeInitCallback == NULL)
{
hsram->MspDeInitCallback = HAL_SRAM_MspDeInit;
}
/* DeInit the low level hardware */
hsram->MspDeInitCallback(hsram);
#else
/* De-Initialize the low level hardware (MSP) */
HAL_SRAM_MspDeInit(hsram);
#endif
/* Configure the SRAM registers with their reset values */
FMC_NORSRAM_DeInit(hsram->Instance, hsram->Extended, hsram->Init.NSBank);
hsram->State = HAL_SRAM_STATE_RESET;
/* Release Lock */
__HAL_UNLOCK(hsram);
return HAL_OK;
}
/**
* @brief SRAM MSP Init.
* @param hsram pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @retval None
*/
__weak void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hsram);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_SRAM_MspInit could be implemented in the user file
*/
}
/**
* @brief SRAM MSP DeInit.
* @param hsram pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @retval None
*/
__weak void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hsram);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_SRAM_MspDeInit could be implemented in the user file
*/
}
/**
* @brief DMA transfer complete callback.
* @param hdma pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @retval None
*/
__weak void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hdma);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_SRAM_DMA_XferCpltCallback could be implemented in the user file
*/
}
/**
* @brief DMA transfer complete error callback.
* @param hdma pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @retval None
*/
__weak void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hdma);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_SRAM_DMA_XferErrorCallback could be implemented in the user file
*/
}
/**
* @}
*/
/** @defgroup SRAM_Exported_Functions_Group2 Input and Output functions
* @brief Input Output and memory control functions
*
@verbatim
==============================================================================
##### SRAM Input and Output functions #####
==============================================================================
[..]
This section provides functions allowing to use and control the SRAM memory
@endverbatim
* @{
*/
/**
* @brief Reads 8-bit buffer from SRAM memory.
* @param hsram pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @param pAddress Pointer to read start address
* @param pDstBuffer Pointer to destination buffer
* @param BufferSize Size of the buffer to read from memory
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
{
__IO uint8_t * pSramAddress = (uint8_t *)pAddress;
/* Process Locked */
__HAL_LOCK(hsram);
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_BUSY;
/* Read data from memory */
for(; BufferSize != 0U; BufferSize--)
{
*pDstBuffer = *(__IO uint8_t *)pSramAddress;
pDstBuffer++;
pSramAddress++;
}
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hsram);
return HAL_OK;
}
/**
* @brief Writes 8-bit buffer to SRAM memory.
* @param hsram pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @param pAddress Pointer to write start address
* @param pSrcBuffer Pointer to source buffer to write
* @param BufferSize Size of the buffer to write to memory
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
{
__IO uint8_t * pSramAddress = (uint8_t *)pAddress;
/* Check the SRAM controller state */
if(hsram->State == HAL_SRAM_STATE_PROTECTED)
{
return HAL_ERROR;
}
/* Process Locked */
__HAL_LOCK(hsram);
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_BUSY;
/* Write data to memory */
for(; BufferSize != 0U; BufferSize--)
{
*(__IO uint8_t *)pSramAddress = *pSrcBuffer;
pSrcBuffer++;
pSramAddress++;
}
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hsram);
return HAL_OK;
}
/**
* @brief Reads 16-bit buffer from SRAM memory.
* @param hsram pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @param pAddress Pointer to read start address
* @param pDstBuffer Pointer to destination buffer
* @param BufferSize Size of the buffer to read from memory
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
{
__IO uint16_t * pSramAddress = (uint16_t *)pAddress;
/* Process Locked */
__HAL_LOCK(hsram);
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_BUSY;
/* Read data from memory */
for(; BufferSize != 0U; BufferSize--)
{
*pDstBuffer = *(__IO uint16_t *)pSramAddress;
pDstBuffer++;
pSramAddress++;
}
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hsram);
return HAL_OK;
}
/**
* @brief Writes 16-bit buffer to SRAM memory.
* @param hsram pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @param pAddress Pointer to write start address
* @param pSrcBuffer Pointer to source buffer to write
* @param BufferSize Size of the buffer to write to memory
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
{
__IO uint16_t * pSramAddress = (uint16_t *)pAddress;
/* Check the SRAM controller state */
if(hsram->State == HAL_SRAM_STATE_PROTECTED)
{
return HAL_ERROR;
}
/* Process Locked */
__HAL_LOCK(hsram);
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_BUSY;
/* Write data to memory */
for(; BufferSize != 0U; BufferSize--)
{
*(__IO uint16_t *)pSramAddress = *pSrcBuffer;
pSrcBuffer++;
pSramAddress++;
}
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hsram);
return HAL_OK;
}
/**
* @brief Reads 32-bit buffer from SRAM memory.
* @param hsram pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @param pAddress Pointer to read start address
* @param pDstBuffer Pointer to destination buffer
* @param BufferSize Size of the buffer to read from memory
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
{
/* Process Locked */
__HAL_LOCK(hsram);
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_BUSY;
/* Read data from memory */
for(; BufferSize != 0U; BufferSize--)
{
*pDstBuffer = *(__IO uint32_t *)pAddress;
pDstBuffer++;
pAddress++;
}
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hsram);
return HAL_OK;
}
/**
* @brief Writes 32-bit buffer to SRAM memory.
* @param hsram pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @param pAddress Pointer to write start address
* @param pSrcBuffer Pointer to source buffer to write
* @param BufferSize Size of the buffer to write to memory
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
{
/* Check the SRAM controller state */
if(hsram->State == HAL_SRAM_STATE_PROTECTED)
{
return HAL_ERROR;
}
/* Process Locked */
__HAL_LOCK(hsram);
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_BUSY;
/* Write data to memory */
for(; BufferSize != 0U; BufferSize--)
{
*(__IO uint32_t *)pAddress = *pSrcBuffer;
pSrcBuffer++;
pAddress++;
}
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hsram);
return HAL_OK;
}
/**
* @brief Reads a Words data from the SRAM memory using DMA transfer.
* @param hsram pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @param pAddress Pointer to read start address
* @param pDstBuffer Pointer to destination buffer
* @param BufferSize Size of the buffer to read from memory
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
{
/* Process Locked */
__HAL_LOCK(hsram);
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_BUSY;
/* Configure DMA user callbacks */
hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
/* Enable the DMA Stream */
HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hsram);
return HAL_OK;
}
/**
* @brief Writes a Words data buffer to SRAM memory using DMA transfer.
* @param hsram pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @param pAddress Pointer to write start address
* @param pSrcBuffer Pointer to source buffer to write
* @param BufferSize Size of the buffer to write to memory
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
{
/* Check the SRAM controller state */
if(hsram->State == HAL_SRAM_STATE_PROTECTED)
{
return HAL_ERROR;
}
/* Process Locked */
__HAL_LOCK(hsram);
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_BUSY;
/* Configure DMA user callbacks */
hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
/* Enable the DMA Stream */
HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hsram);
return HAL_OK;
}
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
/**
* @brief Register a User SRAM Callback
* To be used instead of the weak (surcharged) predefined callback
* @param hsram : SRAM handle
* @param CallbackId : ID of the callback to be registered
* This parameter can be one of the following values:
* @arg @ref HAL_SRAM_MSP_INIT_CB_ID SRAM MspInit callback ID
* @arg @ref HAL_SRAM_MSP_DEINIT_CB_ID SRAM MspDeInit callback ID
* @param pCallback : pointer to the Callback function
* @retval status
*/
HAL_StatusTypeDef HAL_SRAM_RegisterCallback (SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId, pSRAM_CallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
HAL_SRAM_StateTypeDef state;
if(pCallback == NULL)
{
return HAL_ERROR;
}
/* Process locked */
__HAL_LOCK(hsram);
state = hsram->State;
if((state == HAL_SRAM_STATE_READY) || (state == HAL_SRAM_STATE_RESET) || (state == HAL_SRAM_STATE_PROTECTED))
{
switch (CallbackId)
{
case HAL_SRAM_MSP_INIT_CB_ID :
hsram->MspInitCallback = pCallback;
break;
case HAL_SRAM_MSP_DEINIT_CB_ID :
hsram->MspDeInitCallback = pCallback;
break;
default :
/* update return status */
status = HAL_ERROR;
break;
}
}
else
{
/* update return status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(hsram);
return status;
}
/**
* @brief Unregister a User SRAM Callback
* SRAM Callback is redirected to the weak (surcharged) predefined callback
* @param hsram : SRAM handle
* @param CallbackId : ID of the callback to be unregistered
* This parameter can be one of the following values:
* @arg @ref HAL_SRAM_MSP_INIT_CB_ID SRAM MspInit callback ID
* @arg @ref HAL_SRAM_MSP_DEINIT_CB_ID SRAM MspDeInit callback ID
* @arg @ref HAL_SRAM_DMA_XFER_CPLT_CB_ID SRAM DMA Xfer Complete callback ID
* @arg @ref HAL_SRAM_DMA_XFER_ERR_CB_ID SRAM DMA Xfer Error callback ID
* @retval status
*/
HAL_StatusTypeDef HAL_SRAM_UnRegisterCallback (SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId)
{
HAL_StatusTypeDef status = HAL_OK;
HAL_SRAM_StateTypeDef state;
/* Process locked */
__HAL_LOCK(hsram);
state = hsram->State;
if((state == HAL_SRAM_STATE_READY) || (state == HAL_SRAM_STATE_PROTECTED))
{
switch (CallbackId)
{
case HAL_SRAM_MSP_INIT_CB_ID :
hsram->MspInitCallback = HAL_SRAM_MspInit;
break;
case HAL_SRAM_MSP_DEINIT_CB_ID :
hsram->MspDeInitCallback = HAL_SRAM_MspDeInit;
break;
case HAL_SRAM_DMA_XFER_CPLT_CB_ID :
hsram->DmaXferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
break;
case HAL_SRAM_DMA_XFER_ERR_CB_ID :
hsram->DmaXferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
break;
default :
/* update return status */
status = HAL_ERROR;
break;
}
}
else if(state == HAL_SRAM_STATE_RESET)
{
switch (CallbackId)
{
case HAL_SRAM_MSP_INIT_CB_ID :
hsram->MspInitCallback = HAL_SRAM_MspInit;
break;
case HAL_SRAM_MSP_DEINIT_CB_ID :
hsram->MspDeInitCallback = HAL_SRAM_MspDeInit;
break;
default :
/* update return status */
status = HAL_ERROR;
break;
}
}
else
{
/* update return status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(hsram);
return status;
}
/**
* @brief Register a User SRAM Callback for DMA transfers
* To be used instead of the weak (surcharged) predefined callback
* @param hsram : SRAM handle
* @param CallbackId : ID of the callback to be registered
* This parameter can be one of the following values:
* @arg @ref HAL_SRAM_DMA_XFER_CPLT_CB_ID SRAM DMA Xfer Complete callback ID
* @arg @ref HAL_SRAM_DMA_XFER_ERR_CB_ID SRAM DMA Xfer Error callback ID
* @param pCallback : pointer to the Callback function
* @retval status
*/
HAL_StatusTypeDef HAL_SRAM_RegisterDmaCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId, pSRAM_DmaCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
HAL_SRAM_StateTypeDef state;
if(pCallback == NULL)
{
return HAL_ERROR;
}
/* Process locked */
__HAL_LOCK(hsram);
state = hsram->State;
if((state == HAL_SRAM_STATE_READY) || (state == HAL_SRAM_STATE_PROTECTED))
{
switch (CallbackId)
{
case HAL_SRAM_DMA_XFER_CPLT_CB_ID :
hsram->DmaXferCpltCallback = pCallback;
break;
case HAL_SRAM_DMA_XFER_ERR_CB_ID :
hsram->DmaXferErrorCallback = pCallback;
break;
default :
/* update return status */
status = HAL_ERROR;
break;
}
}
else
{
/* update return status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(hsram);
return status;
}
#endif
/**
* @}
*/
/** @defgroup SRAM_Exported_Functions_Group3 Control functions
* @brief management functions
*
@verbatim
==============================================================================
##### SRAM Control functions #####
==============================================================================
[..]
This subsection provides a set of functions allowing to control dynamically
the SRAM interface.
@endverbatim
* @{
*/
/**
* @brief Enables dynamically SRAM write operation.
* @param hsram pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram)
{
/* Process Locked */
__HAL_LOCK(hsram);
/* Enable write operation */
FMC_NORSRAM_WriteOperation_Enable(hsram->Instance, hsram->Init.NSBank);
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hsram);
return HAL_OK;
}
/**
* @brief Disables dynamically SRAM write operation.
* @param hsram pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram)
{
/* Process Locked */
__HAL_LOCK(hsram);
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_BUSY;
/* Disable write operation */
FMC_NORSRAM_WriteOperation_Disable(hsram->Instance, hsram->Init.NSBank);
/* Update the SRAM controller state */
hsram->State = HAL_SRAM_STATE_PROTECTED;
/* Process unlocked */
__HAL_UNLOCK(hsram);
return HAL_OK;
}
/**
* @}
*/
/** @defgroup SRAM_Exported_Functions_Group4 State functions
* @brief Peripheral State functions
*
@verbatim
==============================================================================
##### SRAM State functions #####
==============================================================================
[..]
This subsection permits to get in run-time the status of the SRAM controller
and the data flow.
@endverbatim
* @{
*/
/**
* @brief Returns the SRAM controller state
* @param hsram pointer to a SRAM_HandleTypeDef structure that contains
* the configuration information for SRAM module.
* @retval HAL state
*/
HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram)
{
return hsram->State;
}
/**
* @}
*/
/**
* @}
*/
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
#endif /* HAL_SRAM_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
@@ -1,317 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_timebase_rtc_alarm_template.c
* @author MCD Application Team
* @brief HAL time base based on the hardware RTC_ALARM Template.
*
* This file override the native HAL time base functions (defined as weak)
* to use the RTC ALARM for time base generation:
* + Intializes the RTC peripheral to increment the seconds registers each 1ms
* + The alarm is configured to assert an interrupt when the RTC reaches 1ms
* + HAL_IncTick is called at each Alarm event and the time is reset to 00:00:00
* + HSE (default), LSE or LSI can be selected as RTC clock source
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
This file must be copied to the application folder and modified as follows:
(#) Rename it to 'stm32f4xx_hal_timebase_rtc_alarm.c'
(#) Add this file and the RTC HAL drivers to your project and uncomment
HAL_RTC_MODULE_ENABLED define in stm32f4xx_hal_conf.h
[..]
(@) HAL RTC alarm and HAL RTC wakeup drivers cant be used with low power modes:
The wake up capability of the RTC may be intrusive in case of prior low power mode
configuration requiring different wake up sources.
Application/Example behavior is no more guaranteed
(@) The stm32f4xx_hal_timebase_tim use is recommended for the Applications/Examples
requiring low power modes
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup HAL_TimeBase_RTC_Alarm_Template HAL TimeBase RTC Alarm Template
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Uncomment the line below to select the appropriate RTC Clock source for your application:
+ RTC_CLOCK_SOURCE_HSE: can be selected for applications requiring timing precision.
+ RTC_CLOCK_SOURCE_LSE: can be selected for applications with low constraint on timing
precision.
+ RTC_CLOCK_SOURCE_LSI: can be selected for applications with low constraint on timing
precision.
*/
#define RTC_CLOCK_SOURCE_HSE
/* #define RTC_CLOCK_SOURCE_LSE */
/* #define RTC_CLOCK_SOURCE_LSI */
#ifdef RTC_CLOCK_SOURCE_HSE
#define RTC_ASYNCH_PREDIV 99U
#define RTC_SYNCH_PREDIV 9U
#define RCC_RTCCLKSOURCE_1MHZ ((uint32_t)((uint32_t)RCC_BDCR_RTCSEL | (uint32_t)((HSE_VALUE/1000000U) << 16U)))
#else /* RTC_CLOCK_SOURCE_LSE || RTC_CLOCK_SOURCE_LSI */
#define RTC_ASYNCH_PREDIV 0U
#define RTC_SYNCH_PREDIV 31U
#endif /* RTC_CLOCK_SOURCE_HSE */
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
RTC_HandleTypeDef hRTC_Handle;
/* Private function prototypes -----------------------------------------------*/
void RTC_Alarm_IRQHandler(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief This function configures the RTC_ALARMA as a time base source.
* The time source is configured to have 1ms time base with a dedicated
* Tick interrupt priority.
* @note This function is called automatically at the beginning of program after
* reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
__IO uint32_t counter = 0U;
RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
HAL_StatusTypeDef status;
#ifdef RTC_CLOCK_SOURCE_LSE
/* Configue LSE as RTC clock soucre */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
#elif defined (RTC_CLOCK_SOURCE_LSI)
/* Configue LSI as RTC clock soucre */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
#elif defined (RTC_CLOCK_SOURCE_HSE)
/* Configue HSE as RTC clock soucre */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
/* Ensure that RTC is clocked by 1MHz */
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_1MHZ;
#else
#error Please select the RTC Clock source
#endif /* RTC_CLOCK_SOURCE_LSE */
status = HAL_RCC_OscConfig(&RCC_OscInitStruct);
if (status == HAL_OK)
{
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
status = HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
}
if (status == HAL_OK)
{
/* Enable RTC Clock */
__HAL_RCC_RTC_ENABLE();
/* The time base should be 1ms
Time base = ((RTC_ASYNCH_PREDIV + 1) * (RTC_SYNCH_PREDIV + 1)) / RTC_CLOCK
HSE as RTC clock
Time base = ((99 + 1) * (9 + 1)) / 1MHz
= 1ms
LSE as RTC clock
Time base = ((31 + 1) * (0 + 1)) / 32.768KHz
= ~1ms
LSI as RTC clock
Time base = ((31 + 1) * (0 + 1)) / 32KHz
= 1ms
*/
hRTC_Handle.Instance = RTC;
hRTC_Handle.Init.HourFormat = RTC_HOURFORMAT_24;
hRTC_Handle.Init.AsynchPrediv = RTC_ASYNCH_PREDIV;
hRTC_Handle.Init.SynchPrediv = RTC_SYNCH_PREDIV;
hRTC_Handle.Init.OutPut = RTC_OUTPUT_DISABLE;
hRTC_Handle.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
hRTC_Handle.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
status = HAL_RTC_Init(&hRTC_Handle);
}
if (status == HAL_OK)
{
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(&hRTC_Handle);
/* Disable the Alarm A interrupt */
__HAL_RTC_ALARMA_DISABLE(&hRTC_Handle);
/* Clear flag alarm A */
__HAL_RTC_ALARM_CLEAR_FLAG(&hRTC_Handle, RTC_FLAG_ALRAF);
counter = 0U;
/* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
while (__HAL_RTC_ALARM_GET_FLAG(&hRTC_Handle, RTC_FLAG_ALRAWF) == RESET)
{
if (counter++ == (SystemCoreClock / 48U)) /* Timeout = ~ 1s */
{
status = HAL_ERROR;
}
}
}
if (status == HAL_OK)
{
hRTC_Handle.Instance->ALRMAR = (uint32_t)0x01U;
/* Configure the Alarm state: Enable Alarm */
__HAL_RTC_ALARMA_ENABLE(&hRTC_Handle);
/* Configure the Alarm interrupt */
__HAL_RTC_ALARM_ENABLE_IT(&hRTC_Handle, RTC_IT_ALRA);
/* RTC Alarm Interrupt Configuration: EXTI configuration */
__HAL_RTC_ALARM_EXTI_ENABLE_IT();
__HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE();
/* Check if the Initialization mode is set */
if ((hRTC_Handle.Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
{
/* Set the Initialization mode */
hRTC_Handle.Instance->ISR = (uint32_t)RTC_INIT_MASK;
counter = 0U;
while ((hRTC_Handle.Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
{
if (counter++ == (SystemCoreClock / 48U)) /* Timeout = ~ 1s */
{
status = HAL_ERROR;
}
}
}
}
if (status == HAL_OK)
{
hRTC_Handle.Instance->DR = 0U;
hRTC_Handle.Instance->TR = 0U;
hRTC_Handle.Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(&hRTC_Handle);
/* Enable the RTC Alarm Interrupt */
HAL_NVIC_EnableIRQ(RTC_Alarm_IRQn);
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
{
HAL_NVIC_SetPriority(RTC_Alarm_IRQn, TickPriority, 0U);
uwTickPrio = TickPriority;
}
else
{
status = HAL_ERROR;
}
}
return status;
}
/**
* @brief Suspend Tick increment.
* @note Disable the tick increment by disabling RTC ALARM interrupt.
* @retval None
*/
void HAL_SuspendTick(void)
{
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(&hRTC_Handle);
/* Disable RTC ALARM update Interrupt */
__HAL_RTC_ALARM_DISABLE_IT(&hRTC_Handle, RTC_IT_ALRA);
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(&hRTC_Handle);
}
/**
* @brief Resume Tick increment.
* @note Enable the tick increment by Enabling RTC ALARM interrupt.
* @retval None
*/
void HAL_ResumeTick(void)
{
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(&hRTC_Handle);
/* Enable RTC ALARM Update interrupt */
__HAL_RTC_ALARM_ENABLE_IT(&hRTC_Handle, RTC_IT_ALRA);
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(&hRTC_Handle);
}
/**
* @brief ALARM A Event Callback in non blocking mode
* @note This function is called when RTC_ALARM interrupt took place, inside
* RTC_ALARM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
* a global variable "uwTick" used as application time base.
* @param hrtc RTC handle
* @retval None
*/
void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc)
{
__IO uint32_t counter = 0U;
HAL_IncTick();
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
/* Set the Initialization mode */
hrtc->Instance->ISR = (uint32_t)RTC_INIT_MASK;
while((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
{
if(counter++ == (SystemCoreClock /48U)) /* Timeout = ~ 1s */
{
break;
}
}
hrtc->Instance->DR = 0U;
hrtc->Instance->TR = 0U;
hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
}
/**
* @brief This function handles RTC ALARM interrupt request.
* @retval None
*/
void RTC_Alarm_IRQHandler(void)
{
HAL_RTC_AlarmIRQHandler(&hRTC_Handle);
}
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
@@ -1,292 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_timebase_rtc_wakeup_template.c
* @author MCD Application Team
* @brief HAL time base based on the hardware RTC_WAKEUP Template.
*
* This file overrides the native HAL time base functions (defined as weak)
* to use the RTC WAKEUP for the time base generation:
* + Intializes the RTC peripheral and configures the wakeup timer to be
* incremented each 1ms
* + The wakeup feature is configured to assert an interrupt each 1ms
* + HAL_IncTick is called inside the HAL_RTCEx_WakeUpTimerEventCallback
* + HSE (default), LSE or LSI can be selected as RTC clock source
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
This file must be copied to the application folder and modified as follows:
(#) Rename it to 'stm32f4xx_hal_timebase_rtc_wakeup.c'
(#) Add this file and the RTC HAL drivers to your project and uncomment
HAL_RTC_MODULE_ENABLED define in stm32f4xx_hal_conf.h
[..]
(@) HAL RTC alarm and HAL RTC wakeup drivers cant be used with low power modes:
The wake up capability of the RTC may be intrusive in case of prior low power mode
configuration requiring different wake up sources.
Application/Example behavior is no more guaranteed
(@) The stm32f4xx_hal_timebase_tim use is recommended for the Applications/Examples
requiring low power modes
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @defgroup HAL_TimeBase_RTC_WakeUp_Template HAL TimeBase RTC WakeUp Template
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Uncomment the line below to select the appropriate RTC Clock source for your application:
+ RTC_CLOCK_SOURCE_HSE: can be selected for applications requiring timing precision.
+ RTC_CLOCK_SOURCE_LSE: can be selected for applications with low constraint on timing
precision.
+ RTC_CLOCK_SOURCE_LSI: can be selected for applications with low constraint on timing
precision.
*/
#define RTC_CLOCK_SOURCE_HSE
/* #define RTC_CLOCK_SOURCE_LSE */
/* #define RTC_CLOCK_SOURCE_LSI */
#ifdef RTC_CLOCK_SOURCE_HSE
#define RTC_ASYNCH_PREDIV 99U
#define RTC_SYNCH_PREDIV 9U
#define RCC_RTCCLKSOURCE_1MHZ ((uint32_t)((uint32_t)RCC_BDCR_RTCSEL | (uint32_t)((HSE_VALUE/1000000U) << 16U)))
#else /* RTC_CLOCK_SOURCE_LSE || RTC_CLOCK_SOURCE_LSI */
#define RTC_ASYNCH_PREDIV 0U
#define RTC_SYNCH_PREDIV 31U
#endif /* RTC_CLOCK_SOURCE_HSE */
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
RTC_HandleTypeDef hRTC_Handle;
/* Private function prototypes -----------------------------------------------*/
void RTC_WKUP_IRQHandler(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief This function configures the RTC_WKUP as a time base source.
* The time source is configured to have 1ms time base with a dedicated
* Tick interrupt priority.
* Wakeup Time base = ((RTC_ASYNCH_PREDIV + 1) * (RTC_SYNCH_PREDIV + 1)) / RTC_CLOCK
= 1ms
* Wakeup Time = WakeupTimebase * WakeUpCounter (0 + 1)
= 1 ms
* @note This function is called automatically at the beginning of program after
* reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority)
{
__IO uint32_t counter = 0U;
RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
HAL_StatusTypeDef status;
#ifdef RTC_CLOCK_SOURCE_LSE
/* Configue LSE as RTC clock soucre */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
#elif defined (RTC_CLOCK_SOURCE_LSI)
/* Configue LSI as RTC clock soucre */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
#elif defined (RTC_CLOCK_SOURCE_HSE)
/* Configue HSE as RTC clock soucre */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
/* Ensure that RTC is clocked by 1MHz */
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_1MHZ;
#else
#error Please select the RTC Clock source
#endif /* RTC_CLOCK_SOURCE_LSE */
status = HAL_RCC_OscConfig(&RCC_OscInitStruct);
if (status == HAL_OK)
{
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
status = HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
}
if (status == HAL_OK)
{
/* Enable RTC Clock */
__HAL_RCC_RTC_ENABLE();
/* The time base should be 1ms
Time base = ((RTC_ASYNCH_PREDIV + 1) * (RTC_SYNCH_PREDIV + 1)) / RTC_CLOCK
HSE as RTC clock
Time base = ((99 + 1) * (9 + 1)) / 1Mhz
= 1ms
LSE as RTC clock
Time base = ((31 + 1) * (0 + 1)) / 32.768Khz
= ~1ms
LSI as RTC clock
Time base = ((31 + 1) * (0 + 1)) / 32Khz
= 1ms
*/
hRTC_Handle.Instance = RTC;
hRTC_Handle.Init.HourFormat = RTC_HOURFORMAT_24;
hRTC_Handle.Init.AsynchPrediv = RTC_ASYNCH_PREDIV;
hRTC_Handle.Init.SynchPrediv = RTC_SYNCH_PREDIV;
hRTC_Handle.Init.OutPut = RTC_OUTPUT_DISABLE;
hRTC_Handle.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
hRTC_Handle.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
status = HAL_RTC_Init(&hRTC_Handle);
}
if (status == HAL_OK)
{
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(&hRTC_Handle);
/* Disable the Wake-up Timer */
__HAL_RTC_WAKEUPTIMER_DISABLE(&hRTC_Handle);
/* In case of interrupt mode is used, the interrupt source must disabled */
__HAL_RTC_WAKEUPTIMER_DISABLE_IT(&hRTC_Handle, RTC_IT_WUT);
/* Wait till RTC WUTWF flag is set */
while (__HAL_RTC_WAKEUPTIMER_GET_FLAG(&hRTC_Handle, RTC_FLAG_WUTWF) == RESET)
{
if (counter++ == (SystemCoreClock / 48U))
{
status = HAL_ERROR;
}
}
}
if (status == HAL_OK)
{
/* Clear PWR wake up Flag */
__HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU);
/* Clear RTC Wake Up timer Flag */
__HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(&hRTC_Handle, RTC_FLAG_WUTF);
/* Configure the Wake-up Timer counter */
hRTC_Handle.Instance->WUTR = 0U;
/* Clear the Wake-up Timer clock source bits in CR register */
hRTC_Handle.Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL;
/* Configure the clock source */
hRTC_Handle.Instance->CR |= (uint32_t)RTC_WAKEUPCLOCK_CK_SPRE_16BITS;
/* RTC WakeUpTimer Interrupt Configuration: EXTI configuration */
__HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT();
__HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
/* Configure the Interrupt in the RTC_CR register */
__HAL_RTC_WAKEUPTIMER_ENABLE_IT(&hRTC_Handle,RTC_IT_WUT);
/* Enable the Wake-up Timer */
__HAL_RTC_WAKEUPTIMER_ENABLE(&hRTC_Handle);
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(&hRTC_Handle);
/* Enable the RTC global Interrupt */
HAL_NVIC_EnableIRQ(RTC_WKUP_IRQn);
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
{
HAL_NVIC_SetPriority(RTC_WKUP_IRQn, TickPriority, 0U);
uwTickPrio = TickPriority;
}
else
{
status = HAL_ERROR;
}
}
return status;
}
/**
* @brief Suspend Tick increment.
* @note Disable the tick increment by disabling RTC_WKUP interrupt.
* @retval None
*/
void HAL_SuspendTick(void)
{
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(&hRTC_Handle);
/* Disable WAKE UP TIMER Interrupt */
__HAL_RTC_WAKEUPTIMER_DISABLE_IT(&hRTC_Handle, RTC_IT_WUT);
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(&hRTC_Handle);
}
/**
* @brief Resume Tick increment.
* @note Enable the tick increment by Enabling RTC_WKUP interrupt.
* @retval None
*/
void HAL_ResumeTick(void)
{
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(&hRTC_Handle);
/* Enable WAKE UP TIMER interrupt */
__HAL_RTC_WAKEUPTIMER_ENABLE_IT(&hRTC_Handle, RTC_IT_WUT);
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(&hRTC_Handle);
}
/**
* @brief Wake Up Timer Event Callback in non blocking mode
* @note This function is called when RTC_WKUP interrupt took place, inside
* RTC_WKUP_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
* a global variable "uwTick" used as application time base.
* @param hrtc RTC handle
* @retval None
*/
void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc)
{
HAL_IncTick();
}
/**
* @brief This function handles WAKE UP TIMER interrupt request.
* @retval None
*/
void RTC_WKUP_IRQHandler(void)
{
HAL_RTCEx_WakeUpTimerIRQHandler(&hRTC_Handle);
}
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
@@ -1,178 +0,0 @@
/**
******************************************************************************
* @file stm32f4xx_hal_timebase_tim_template.c
* @author MCD Application Team
* @brief HAL time base based on the hardware TIM Template.
*
* This file overrides the native HAL time base functions (defined as weak)
* the TIM time base:
* + Intializes the TIM peripheral generate a Period elapsed Event each 1ms
* + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
*
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup STM32F4xx_HAL_Driver
* @{
*/
/** @addtogroup HAL_TimeBase_TIM
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
TIM_HandleTypeDef TimHandle;
/* Private function prototypes -----------------------------------------------*/
void TIM6_DAC_IRQHandler(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief This function configures the TIM6 as a time base source.
* The time source is configured to have 1ms time base with a dedicated
* Tick interrupt priority.
* @note This function is called automatically at the beginning of program after
* reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority)
{
RCC_ClkInitTypeDef clkconfig;
uint32_t uwTimclock, uwAPB1Prescaler = 0U;
uint32_t uwPrescalerValue = 0U;
uint32_t pFLatency;
HAL_StatusTypeDef status;
/* Enable TIM6 clock */
__HAL_RCC_TIM6_CLK_ENABLE();
/* Get clock configuration */
HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
/* Get APB1 prescaler */
uwAPB1Prescaler = clkconfig.APB1CLKDivider;
/* Compute TIM6 clock */
if (uwAPB1Prescaler == RCC_HCLK_DIV1)
{
uwTimclock = HAL_RCC_GetPCLK1Freq();
}
else
{
uwTimclock = 2 * HAL_RCC_GetPCLK1Freq();
}
/* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
/* Initialize TIM6 */
TimHandle.Instance = TIM6;
/* Initialize TIMx peripheral as follow:
+ Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+ Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+ ClockDivision = 0
+ Counter direction = Up
*/
TimHandle.Init.Period = (1000000U / 1000U) - 1U;
TimHandle.Init.Prescaler = uwPrescalerValue;
TimHandle.Init.ClockDivision = 0U;
TimHandle.Init.CounterMode = TIM_COUNTERMODE_UP;
TimHandle.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
status = HAL_TIM_Base_Init(&TimHandle);
if (status == HAL_OK)
{
/* Start the TIM time Base generation in interrupt mode */
status = HAL_TIM_Base_Start_IT(&TimHandle);
if (status == HAL_OK)
{
/* Enable the TIM6 global Interrupt */
HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
{
/* Enable the TIM6 global Interrupt */
HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0);
uwTickPrio = TickPriority;
}
else
{
status = HAL_ERROR;
}
}
}
/* Return function status */
return status;
}
/**
* @brief Suspend Tick increment.
* @note Disable the tick increment by disabling TIM6 update interrupt.
* @retval None
*/
void HAL_SuspendTick(void)
{
/* Disable TIM6 update Interrupt */
__HAL_TIM_DISABLE_IT(&TimHandle, TIM_IT_UPDATE);
}
/**
* @brief Resume Tick increment.
* @note Enable the tick increment by Enabling TIM6 update interrupt.
* @retval None
*/
void HAL_ResumeTick(void)
{
/* Enable TIM6 Update interrupt */
__HAL_TIM_ENABLE_IT(&TimHandle, TIM_IT_UPDATE);
}
/**
* @brief Period elapsed callback in non blocking mode
* @note This function is called when TIM6 interrupt took place, inside
* HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
* a global variable "uwTick" used as application time base.
* @param htim TIM handle
* @retval None
*/
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
HAL_IncTick();
}
/**
* @brief This function handles TIM interrupt request.
* @retval None
*/
void TIM6_DAC_IRQHandler(void)
{
HAL_TIM_IRQHandler(&TimHandle);
}
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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