msm: camera: isp: Enable early EOF

This change enables generating EOF strobe immediately after
last line of the image. This feature reuses the START_LINE and
END_LINE fields of the VCROP register to know what the actual
frame height is. Hence this bit is enabled only when user
correctly programs the start and end lines of the vcrop register.
Also the change adds a debugfs to disable this feature.

Change-Id: I3b884a18ea50931cad58ee7d03829bfb596e01a2
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
This commit is contained in:
Karthik Anantha Ram
2018-09-10 13:59:28 -07:00
committed by Haizhou Fan
parent d7d7ad2c1b
commit d7dd8e156b
3 changed files with 13 additions and 1 deletions

View File

@@ -52,6 +52,7 @@ static struct cam_ife_csid_ipp_reg_offset cam_ife_csid_170_ipp_reg_offset = {
.csid_ipp_timestamp_perv1_eof_addr = 0x2ac,
/* configurations */
.pix_store_en_shift_val = 7,
.early_eof_en_shift_val = 29,
};
static struct cam_ife_csid_rdi_reg_offset cam_ife_csid_170_rdi_0_reg_offset = {

View File

@@ -1415,6 +1415,16 @@ static int cam_ife_csid_init_config_ipp_path(
csid_reg->ipp_reg->csid_ipp_vcrop_addr);
CAM_DBG(CAM_ISP, "CSID:%d Vertical Crop config val: 0x%x",
csid_hw->hw_intf->hw_idx, val);
/* Enable generating early eof strobe based on crop config */
if (!(csid_hw->csid_debug & CSID_DEBUG_DISABLE_EARLY_EOF)) {
val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
csid_reg->ipp_reg->csid_ipp_cfg0_addr);
val |= (1 <<
csid_reg->ipp_reg->early_eof_en_shift_val);
cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
csid_reg->ipp_reg->csid_ipp_cfg0_addr);
}
}
/* set frame drop pattern to 0 and period to 1 */

View File

@@ -77,7 +77,7 @@
#define CSID_DEBUG_ENABLE_LONG_PKT_CAPTURE BIT(5)
#define CSID_DEBUG_ENABLE_CPHY_PKT_CAPTURE BIT(6)
#define CSID_DEBUG_ENABLE_HBI_VBI_INFO BIT(7)
#define CSID_DEBUG_DISABLE_EARLY_EOF BIT(8)
/* enum cam_csid_path_halt_mode select the path halt mode control */
enum cam_csid_path_halt_mode {
@@ -137,6 +137,7 @@ struct cam_ife_csid_ipp_reg_offset {
/* configuration */
uint32_t pix_store_en_shift_val;
uint32_t early_eof_en_shift_val;
};
struct cam_ife_csid_rdi_reg_offset {