msm: camera: isp: Add debugfs to dump hbi/vbi info

Add debugfs which when enabled dumps the configured
horizontal & vertical blanking.

To dump hbi/vbi from csid-
adb shell "echo 0x80 > /sys/kernel/debug/camera_ife/ife_csid_debug"

To dump camif sensor diagnostic status-
adb shell "echo 0x1 > /sys/kernel/debug/camera_ife/ife_camif_debug"

Change-Id: Ib6372600883b68893563e137f62eef21cf4b7ff1
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
This commit is contained in:
Karthik Anantha Ram
2018-09-06 16:43:43 -07:00
committed by Haizhou Fan
parent b36fa62ea1
commit d7d7ad2c1b
9 changed files with 233 additions and 7 deletions

View File

@@ -2160,7 +2160,8 @@ static int cam_ife_mgr_start_hw(void *hw_mgr_priv, void *start_hw_args)
struct cam_isp_stop_args stop_isp;
struct cam_ife_hw_mgr_ctx *ctx;
struct cam_ife_hw_mgr_res *hw_mgr_res;
uint32_t i;
struct cam_isp_resource_node *rsrc_node = NULL;
uint32_t i, camif_debug;
if (!hw_mgr_priv || !start_isp) {
CAM_ERR(CAM_ISP, "Invalid arguments");
@@ -2194,6 +2195,24 @@ static int cam_ife_mgr_start_hw(void *hw_mgr_priv, void *start_hw_args)
sizeof(g_ife_hw_mgr.debug_cfg.csid_debug));
}
camif_debug = g_ife_hw_mgr.debug_cfg.camif_debug;
list_for_each_entry(hw_mgr_res, &ctx->res_list_ife_src, list) {
for (i = 0; i < CAM_ISP_HW_SPLIT_MAX; i++) {
if (!hw_mgr_res->hw_res[i])
continue;
rsrc_node = hw_mgr_res->hw_res[i];
if (rsrc_node->process_cmd && (rsrc_node->res_id ==
CAM_ISP_HW_VFE_IN_CAMIF)) {
rc = hw_mgr_res->hw_res[i]->process_cmd(
hw_mgr_res->hw_res[i],
CAM_ISP_HW_CMD_SET_CAMIF_DEBUG,
&camif_debug,
sizeof(camif_debug));
}
}
}
rc = cam_ife_hw_mgr_init_hw(ctx);
if (rc) {
CAM_ERR(CAM_ISP, "Init failed");
@@ -4263,6 +4282,28 @@ DEFINE_SIMPLE_ATTRIBUTE(cam_ife_csid_debug,
cam_ife_get_csid_debug,
cam_ife_set_csid_debug, "%16llu");
static int cam_ife_set_camif_debug(void *data, u64 val)
{
g_ife_hw_mgr.debug_cfg.camif_debug = val;
CAM_DBG(CAM_ISP,
"Set camif enable_diag_sensor_status value :%lld", val);
return 0;
}
static int cam_ife_get_camif_debug(void *data, u64 *val)
{
*val = g_ife_hw_mgr.debug_cfg.camif_debug;
CAM_DBG(CAM_ISP,
"Set camif enable_diag_sensor_status value :%lld",
g_ife_hw_mgr.debug_cfg.csid_debug);
return 0;
}
DEFINE_SIMPLE_ATTRIBUTE(cam_ife_camif_debug,
cam_ife_get_camif_debug,
cam_ife_set_camif_debug, "%16llu");
static int cam_ife_hw_mgr_debug_register(void)
{
g_ife_hw_mgr.debug_cfg.dentry = debugfs_create_dir("camera_ife",
@@ -4288,6 +4329,14 @@ static int cam_ife_hw_mgr_debug_register(void)
CAM_ERR(CAM_ISP, "failed to create enable_recovery");
goto err;
}
if (!debugfs_create_file("ife_camif_debug",
0644,
g_ife_hw_mgr.debug_cfg.dentry, NULL,
&cam_ife_camif_debug)) {
CAM_ERR(CAM_ISP, "failed to create cam_ife_camif_debug");
goto err;
}
g_ife_hw_mgr.debug_cfg.enable_recovery = 0;
return 0;

View File

@@ -81,15 +81,17 @@ struct ctx_base_info {
/**
* struct cam_ife_hw_mgr_debug - contain the debug information
*
* @dentry: Debugfs entry
* @csid_debug: csid debug information
* @enable_recovery enable recovery
* @dentry: Debugfs entry
* @csid_debug: csid debug information
* @enable_recovery: enable recovery
* @enable_diag_sensor_status: enable sensor diagnosis status
*
*/
struct cam_ife_hw_mgr_debug {
struct dentry *dentry;
uint64_t csid_debug;
uint32_t enable_recovery;
uint32_t camif_debug;
};
/**

View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -286,6 +286,8 @@ static struct cam_ife_csid_common_reg_offset
.crop_shift = 16,
.ipp_irq_mask_all = 0x7FFF,
.rdi_irq_mask_all = 0x7FFF,
.measure_en_hbi_vbi_cnt_mask = 0xC,
.format_measure_en_val = 1,
};
struct cam_ife_csid_reg_offset cam_ife_csid_170_reg_offset = {

View File

@@ -1443,9 +1443,23 @@ static int cam_ife_csid_init_config_ipp_path(
val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
csid_reg->ipp_reg->csid_ipp_cfg0_addr);
val |= (1 << csid_reg->cmn_reg->path_en_shift_val);
if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_HBI_VBI_INFO)
val |= csid_reg->cmn_reg->format_measure_en_val;
cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
csid_reg->ipp_reg->csid_ipp_cfg0_addr);
/* Enable the HBI/VBI counter */
if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_HBI_VBI_INFO) {
val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
csid_reg->ipp_reg->csid_ipp_format_measure_cfg0_addr);
val |= csid_reg->cmn_reg->measure_en_hbi_vbi_cnt_mask;
cam_io_w_mb(val,
soc_info->reg_map[0].mem_base +
csid_reg->ipp_reg->csid_ipp_format_measure_cfg0_addr);
}
/* configure the rx packet capture based on csid debug set */
val = 0;
if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_SHORT_PKT_CAPTURE)
@@ -1484,8 +1498,10 @@ static int cam_ife_csid_deinit_ipp_path(
struct cam_isp_resource_node *res)
{
int rc = 0;
uint32_t val = 0;
struct cam_ife_csid_reg_offset *csid_reg;
struct cam_hw_soc_info *soc_info;
struct cam_ife_csid_ipp_reg_offset *ipp_reg;
csid_reg = csid_hw->csid_info->csid_reg;
soc_info = &csid_hw->hw_info->soc_info;
@@ -1503,8 +1519,26 @@ static int cam_ife_csid_deinit_ipp_path(
csid_hw->hw_intf->hw_idx,
res->res_id);
rc = -EINVAL;
goto end;
}
ipp_reg = csid_reg->ipp_reg;
val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
ipp_reg->csid_ipp_cfg0_addr);
if (val & csid_reg->cmn_reg->format_measure_en_val) {
val &= ~csid_reg->cmn_reg->format_measure_en_val;
cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
ipp_reg->csid_ipp_cfg0_addr);
/* Disable the HBI/VBI counter */
val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
ipp_reg->csid_ipp_format_measure_cfg0_addr);
val &= ~csid_reg->cmn_reg->measure_en_hbi_vbi_cnt_mask;
cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
ipp_reg->csid_ipp_format_measure_cfg0_addr);
}
end:
res->res_state = CAM_ISP_RESOURCE_STATE_RESERVED;
return rc;
}
@@ -1649,6 +1683,7 @@ static int cam_ife_csid_init_config_rdi_path(
struct cam_ife_csid_reg_offset *csid_reg;
struct cam_hw_soc_info *soc_info;
uint32_t path_format = 0, plain_fmt = 0, val = 0, id;
uint32_t format_measure_addr;
path_data = (struct cam_ife_csid_path_cfg *) res->res_priv;
csid_reg = csid_hw->csid_info->csid_reg;
@@ -1742,9 +1777,24 @@ static int cam_ife_csid_init_config_rdi_path(
csid_reg->rdi_reg[id]->csid_rdi_cfg0_addr);
val |= (1 << csid_reg->cmn_reg->path_en_shift_val);
if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_HBI_VBI_INFO)
val |= csid_reg->cmn_reg->format_measure_en_val;
cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
csid_reg->rdi_reg[id]->csid_rdi_cfg0_addr);
format_measure_addr =
csid_reg->rdi_reg[id]->csid_rdi_format_measure_cfg0_addr;
/* Enable the HBI/VBI counter */
if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_HBI_VBI_INFO) {
val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
format_measure_addr);
val |= csid_reg->cmn_reg->measure_en_hbi_vbi_cnt_mask;
cam_io_w_mb(val,
soc_info->reg_map[0].mem_base + format_measure_addr);
}
/* configure the rx packet capture based on csid debug set */
if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_SHORT_PKT_CAPTURE)
val = ((1 <<
@@ -1780,7 +1830,7 @@ static int cam_ife_csid_deinit_rdi_path(
struct cam_isp_resource_node *res)
{
int rc = 0;
uint32_t id;
uint32_t id, val, format_measure_addr;
struct cam_ife_csid_reg_offset *csid_reg;
struct cam_hw_soc_info *soc_info;
@@ -1797,6 +1847,24 @@ static int cam_ife_csid_deinit_rdi_path(
return -EINVAL;
}
format_measure_addr =
csid_reg->rdi_reg[id]->csid_rdi_format_measure_cfg0_addr;
if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_HBI_VBI_INFO) {
val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
csid_reg->rdi_reg[id]->csid_rdi_cfg0_addr);
val &= ~csid_reg->cmn_reg->format_measure_en_val;
cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
csid_reg->rdi_reg[id]->csid_rdi_cfg0_addr);
/* Disable the HBI/VBI counter */
val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
format_measure_addr);
val &= ~csid_reg->cmn_reg->measure_en_hbi_vbi_cnt_mask;
cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
format_measure_addr);
}
res->res_state = CAM_ISP_RESOURCE_STATE_RESERVED;
return rc;
}
@@ -1899,6 +1967,55 @@ static int cam_ife_csid_disable_rdi_path(
return rc;
}
static int cam_ife_csid_get_hbi_vbi(
struct cam_ife_csid_hw *csid_hw,
struct cam_isp_resource_node *res)
{
uint32_t hbi, vbi;
const struct cam_ife_csid_reg_offset *csid_reg;
const struct cam_ife_csid_rdi_reg_offset *rdi_reg;
struct cam_hw_soc_info *soc_info;
csid_reg = csid_hw->csid_info->csid_reg;
soc_info = &csid_hw->hw_info->soc_info;
if (res->res_type != CAM_ISP_RESOURCE_PIX_PATH ||
res->res_id >= CAM_IFE_PIX_PATH_RES_MAX) {
CAM_ERR(CAM_ISP, "CSID:%d Invalid res_type:%d res id%d",
csid_hw->hw_intf->hw_idx, res->res_type,
res->res_id);
return -EINVAL;
}
if (csid_hw->hw_info->hw_state != CAM_HW_STATE_POWER_UP) {
CAM_ERR(CAM_ISP, "CSID:%d Invalid dev state :%d",
csid_hw->hw_intf->hw_idx,
csid_hw->hw_info->hw_state);
return -EINVAL;
}
if (res->res_id == CAM_IFE_PIX_PATH_RES_IPP) {
hbi = cam_io_r_mb(soc_info->reg_map[0].mem_base +
csid_reg->ipp_reg->csid_ipp_format_measure1_addr);
vbi = cam_io_r_mb(soc_info->reg_map[0].mem_base +
csid_reg->ipp_reg->csid_ipp_format_measure2_addr);
} else {
rdi_reg = csid_reg->rdi_reg[res->res_id];
hbi = cam_io_r_mb(soc_info->reg_map[0].mem_base +
rdi_reg->csid_rdi_format_measure1_addr);
vbi = cam_io_r_mb(soc_info->reg_map[0].mem_base +
rdi_reg->csid_rdi_format_measure2_addr);
}
CAM_INFO_RATE_LIMIT(CAM_ISP, "Resource %u HBI: 0x%x", res->res_id,
hbi);
CAM_INFO_RATE_LIMIT(CAM_ISP, "Resource %u VBI: 0x%x", res->res_id,
vbi);
return 0;
}
static int cam_ife_csid_get_time_stamp(
struct cam_ife_csid_hw *csid_hw, void *cmd_args)
{
@@ -2552,6 +2669,7 @@ static int cam_ife_csid_process_cmd(void *hw_priv,
int rc = 0;
struct cam_ife_csid_hw *csid_hw;
struct cam_hw_info *csid_hw_info;
struct cam_isp_resource_node *res = NULL;
if (!hw_priv || !cmd_args) {
CAM_ERR(CAM_ISP, "CSID: Invalid arguments");
@@ -2564,6 +2682,11 @@ static int cam_ife_csid_process_cmd(void *hw_priv,
switch (cmd_type) {
case CAM_IFE_CSID_CMD_GET_TIME_STAMP:
rc = cam_ife_csid_get_time_stamp(csid_hw, cmd_args);
if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_HBI_VBI_INFO) {
res = ((struct cam_csid_get_time_stamp_args *)
cmd_args)->node_res;
cam_ife_csid_get_hbi_vbi(csid_hw, res);
}
break;
case CAM_IFE_CSID_SET_CSID_DEBUG:
rc = cam_ife_csid_set_csid_debug(csid_hw, cmd_args);

View File

@@ -76,6 +76,8 @@
#define CSID_DEBUG_ENABLE_SHORT_PKT_CAPTURE BIT(4)
#define CSID_DEBUG_ENABLE_LONG_PKT_CAPTURE BIT(5)
#define CSID_DEBUG_ENABLE_CPHY_PKT_CAPTURE BIT(6)
#define CSID_DEBUG_ENABLE_HBI_VBI_INFO BIT(7)
/* enum cam_csid_path_halt_mode select the path halt mode control */
enum cam_csid_path_halt_mode {
@@ -285,6 +287,8 @@ struct cam_ife_csid_common_reg_offset {
uint32_t crop_shift;
uint32_t ipp_irq_mask_all;
uint32_t rdi_irq_mask_all;
uint32_t measure_en_hbi_vbi_cnt_mask;
uint32_t format_measure_en_val;
};
/**

View File

@@ -96,6 +96,7 @@ enum cam_isp_hw_cmd_type {
CAM_ISP_HW_CMD_STOP_BUS_ERR_IRQ,
CAM_ISP_HW_CMD_GET_REG_DUMP,
CAM_ISP_HW_CMD_SOF_IRQ_DEBUG,
CAM_ISP_HW_CMD_SET_CAMIF_DEBUG,
CAM_ISP_HW_CMD_MAX,
};

View File

@@ -50,6 +50,8 @@ static struct cam_vfe_camif_ver2_reg vfe170_camif_reg = {
.raw_crop_width_cfg = 0x00000CE4,
.raw_crop_height_cfg = 0x00000CE8,
.reg_update_cmd = 0x000004AC,
.vfe_diag_config = 0x00000C48,
.vfe_diag_sensor_status = 0x00000C4C,
};
static struct cam_vfe_camif_reg_data vfe_170_camif_reg_data = {
@@ -79,6 +81,7 @@ static struct cam_vfe_camif_reg_data vfe_170_camif_reg_data = {
.eof_irq_mask = 0x00000002,
.error_irq_mask0 = 0x0003FC00,
.error_irq_mask1 = 0x0FFF7E80,
.enable_diagnostic_hw = 0x1,
};
struct cam_vfe_top_ver2_reg_offset_module_ctrl lens_170_reg = {

View File

@@ -43,6 +43,7 @@ struct cam_vfe_mux_camif_data {
uint32_t last_line;
bool enable_sof_irq_debug;
uint32_t irq_debug_cnt;
uint32_t camif_debug;
};
static int cam_vfe_camif_validate_pix_pattern(uint32_t pattern)
@@ -309,6 +310,15 @@ static int cam_vfe_camif_resource_start(
rsrc_data->enable_sof_irq_debug = false;
rsrc_data->irq_debug_cnt = 0;
if (rsrc_data->camif_debug &
CAMIF_DEBUG_ENABLE_SENSOR_DIAG_STATUS) {
val = cam_io_r_mb(rsrc_data->mem_base +
rsrc_data->camif_reg->vfe_diag_config);
val |= rsrc_data->reg_data->enable_diagnostic_hw;
cam_io_w_mb(val, rsrc_data->mem_base +
rsrc_data->camif_reg->vfe_diag_config);
}
CAM_DBG(CAM_ISP, "Start Camif IFE %d Done", camif_res->hw_intf->hw_idx);
return 0;
}
@@ -400,6 +410,14 @@ static int cam_vfe_camif_resource_stop(
if (camif_res->res_state == CAM_ISP_RESOURCE_STATE_STREAMING)
camif_res->res_state = CAM_ISP_RESOURCE_STATE_RESERVED;
val = cam_io_r_mb(camif_priv->mem_base +
camif_priv->camif_reg->vfe_diag_config);
if (val & camif_priv->reg_data->enable_diagnostic_hw) {
val &= ~camif_priv->reg_data->enable_diagnostic_hw;
cam_io_w_mb(val, camif_priv->mem_base +
camif_priv->camif_reg->vfe_diag_config);
}
return rc;
}
@@ -424,6 +442,7 @@ static int cam_vfe_camif_process_cmd(struct cam_isp_resource_node *rsrc_node,
uint32_t cmd_type, void *cmd_args, uint32_t arg_size)
{
int rc = -EINVAL;
struct cam_vfe_mux_camif_data *camif_priv = NULL;
if (!rsrc_node || !cmd_args) {
CAM_ERR(CAM_ISP, "Invalid input arguments");
@@ -441,6 +460,11 @@ static int cam_vfe_camif_process_cmd(struct cam_isp_resource_node *rsrc_node,
case CAM_ISP_HW_CMD_SOF_IRQ_DEBUG:
rc = cam_vfe_camif_sof_irq_debug(rsrc_node, cmd_args);
break;
case CAM_ISP_HW_CMD_SET_CAMIF_DEBUG:
camif_priv =
(struct cam_vfe_mux_camif_data *)rsrc_node->res_priv;
camif_priv->camif_debug = *((uint32_t *)cmd_args);
break;
default:
CAM_ERR(CAM_ISP,
"unsupported process command:%d", cmd_type);
@@ -465,6 +489,7 @@ static int cam_vfe_camif_handle_irq_bottom_half(void *handler_priv,
struct cam_vfe_top_irq_evt_payload *payload;
uint32_t irq_status0;
uint32_t irq_status1;
uint32_t val;
if (!handler_priv || !evt_payload_priv) {
CAM_ERR(CAM_ISP, "Invalid params");
@@ -527,6 +552,14 @@ static int cam_vfe_camif_handle_irq_bottom_half(void *handler_priv,
} else {
ret = CAM_ISP_HW_ERROR_NONE;
}
if (camif_priv->camif_debug &
CAMIF_DEBUG_ENABLE_SENSOR_DIAG_STATUS) {
val = cam_io_r(camif_priv->mem_base +
camif_priv->camif_reg->vfe_diag_sensor_status);
CAM_DBG(CAM_ISP, "VFE_DIAG_SENSOR_STATUS: 0x%x",
camif_priv->mem_base, val);
}
break;
default:
break;

View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -16,6 +16,11 @@
#include "cam_isp_hw.h"
#include "cam_vfe_top.h"
/*
* Debug values for camif module
*/
#define CAMIF_DEBUG_ENABLE_SENSOR_DIAG_STATUS BIT(0)
struct cam_vfe_camif_ver2_reg {
uint32_t camif_cmd;
uint32_t camif_config;
@@ -27,6 +32,8 @@ struct cam_vfe_camif_ver2_reg {
uint32_t raw_crop_width_cfg;
uint32_t raw_crop_height_cfg;
uint32_t reg_update_cmd;
uint32_t vfe_diag_config;
uint32_t vfe_diag_sensor_status;
};
struct cam_vfe_camif_reg_data {
@@ -63,6 +70,8 @@ struct cam_vfe_camif_reg_data {
uint32_t eof_irq_mask;
uint32_t error_irq_mask0;
uint32_t error_irq_mask1;
uint32_t enable_diagnostic_hw;
};
struct cam_vfe_camif_ver2_hw_info {