self.poller not used (#759)

I do not see the need for zmq and the poller being initialized and not used.

.gitignore

@@ -1,3 +1,4 @@
+venv/
 .DS_Store
 .tags
 .ipynb_checkpoints
@@ -31,6 +32,12 @@ selfdrive/proclogd/proclogd
 selfdrive/ui/ui
 selfdrive/test/tests/plant/out
 selfdrive/visiond/visiond
+selfdrive/loggerd/loggerd
+selfdrive/sensord/gpsd
+selfdrive/sensord/sensord
 /src/
 
 one
+openpilot
+xx
+

.travis.yml

@@ -3,21 +3,5 @@ sudo: required
 services:
   - docker
 
-install:
-  - docker build -t tmppilot -f Dockerfile.openpilot .
-
 script:
-  - docker run
-      tmppilot /bin/sh -c 'cd /tmp/openpilot/selfdrive/test/ && ./test_fingerprints.py'
-  - docker run
-      tmppilot /bin/sh -c 'cd /tmp/openpilot/ && pyflakes $(find . -iname "*.py" | grep -vi "^\./pyextra.*" | grep -vi "^\./panda")'
-  - docker run
-      tmppilot /bin/sh -c 'cd /tmp/openpilot/ && pylint $(find . -iname "*.py" | grep -vi "^\./pyextra.*" | grep -vi "^\./panda"); exit $(($? & 3))'
-  - docker run tmppilot /bin/sh -c 'cd /tmp/openpilot/ && make -C cereal && python -m unittest discover common'
-  - docker run tmppilot /bin/sh -c 'cd /tmp/openpilot/ && make -C cereal && python -m unittest discover selfdrive/can'
-  - docker run tmppilot /bin/sh -c 'cd /tmp/openpilot/ && make -C cereal && python -m unittest discover selfdrive/boardd'
-  - docker run tmppilot /bin/sh -c 'cd /tmp/openpilot/ && make -C cereal && python -m unittest discover selfdrive/controls'
-  - docker run tmppilot /bin/sh -c 'cd /tmp/openpilot/ && python -m unittest discover selfdrive/loggerd'
-  - docker run
-      -v "$(pwd)"/selfdrive/test/tests/plant/out:/tmp/openpilot/selfdrive/test/tests/plant/out
-      tmppilot /bin/sh -c 'cd /tmp/openpilot/selfdrive/test/tests/plant && OPTEST=1 ./test_longitudinal.py'
+  - ./run_docker_tests.sh

Dockerfile.openpilot

@@ -4,32 +4,45 @@ ENV PYTHONUNBUFFERED 1
 RUN apt-get update && apt-get install -y \
     autoconf \
     build-essential \
-    clang \
-    wget \
     bzip2 \
+    clang \
     git \
-    libglib2.0-0 \
-    libtool \
-    python-pip \
-    libzmq5-dev \
+    libarchive-dev \
+    libavcodec-dev \
+    libavdevice-dev \
+    libavfilter-dev \
+    libavresample-dev \
+    libavutil-dev \
     libffi-dev \
-    libusb-1.0-0 \
+    libglib2.0-0 \
     libssl-dev \
+    libswscale-dev \
+    libtool \
+    libusb-1.0-0 \
+    libzmq5-dev \
     ocl-icd-libopencl1 \
     ocl-icd-opencl-dev \
-    opencl-headers
+    opencl-headers \
+    pkg-config \
+    python-pip \
+    wget
 
 COPY phonelibs/install_capnp.sh /tmp/install_capnp.sh
 RUN /tmp/install_capnp.sh
 
 RUN pip install --upgrade pip==18.0
-RUN pip install numpy==1.11.2 scipy==0.18.1 matplotlib==2.1.2
+RUN pip install pipenv==2018.11.26
 
-COPY requirements_openpilot.txt /tmp/
-RUN pip install -r /tmp/requirements_openpilot.txt
+COPY Pipfile /tmp/
+COPY Pipfile.lock /tmp/
+RUN cd /tmp && pipenv install --deploy --system
 
 ENV PYTHONPATH /tmp/openpilot:$PYTHONPATH
 
+RUN git clone --branch v0.6  https://github.com/commaai/openpilot-tools.git /tmp/openpilot/tools
+RUN pip install -r /tmp/openpilot/tools/requirements.txt
+RUN pip install fastcluster==1.1.20 scipy==0.19.1
+
 COPY ./.pylintrc /tmp/openpilot/.pylintrc
 COPY ./common /tmp/openpilot/common
 COPY ./cereal /tmp/openpilot/cereal

Pipfile

@@ -0,0 +1,143 @@
+[[source]]
+name = "pypi"
+url = "https://pypi.org/simple"
+verify_ssl = true
+
+[dev-packages]
+ipython = "<6.0"
+aenum = "*"
+azure-batch = "==4.1.3"
+azure-common = "==1.1.16"
+azure-nspkg = "==3.0.1"
+azure-storage-blob = "==1.3.1"
+azure-storage-common = "==1.3.0"
+azure-storage-nspkg = "==3.0.0"
+bincopy = "*"
+bleach = "==1.5.0"
+boto = "*"
+"boto3" = "*"
+celery = "*"
+control = "*"
+datadog = "*"
+decorator = "*"
+dlib = "*"
+dominate = "*"
+elasticsearch = "*"
+entium = "==0.1.4"
+fasteners = "*"
+future = "*"
+futures = "*"
+gevent = "*"
+pycocotools = {git = "https://github.com/cocodataset/cocoapi.git",subdirectory = "PythonAPI"}
+gunicorn = "*"
+"h5py" = "*"
+hexdump = "*"
+"html5lib" = "==0.9999999"
+imageio = "*"
+intervaltree = "*"
+ipykernel = "<5.0"
+joblib = "*"
+json-logging-py = "*"
+jupyter = "*"
+libarchive = "*"
+lru-dict = "*"
+lxml = "*"
+matplotlib = "==2.2.3"
+"mpld3" = "*"
+msgpack-python = "*"
+nbstripout = "*"
+nose-parameterized = "*"
+numpy = "==1.14.5"
+osmium = "==2.15.0"
+pbr = "==5.1.3"
+percache = "*"
+pprofile = "*"
+psutil = "*"
+pycurl = "*"
+git-pylint-commit-hook = "==2.5.1"
+pymongo = "*"
+"pynmea2" = "*"
+pypolyline = "==0.1.17"
+pysendfile = "*"
+python-logstash = "*"
+pyvcd = "*"
+redis = "*"
+redlock = "*"
+"s2sphere" = "*"
+scikit-image = "*"
+"subprocess32" = "*"
+supervisor = "*"
+tenacity = "*"
+tensorflow-gpu = "==1.13.0rc0"
+"transforms3d" = "*"
+utm = "*"
+"v4l2" = "*"
+visdom = "*"
+PyJWT = "==1.4.1"
+PyMySQL = "==0.9.2"
+Theano = "*"
+Werkzeug = "*"
+"backports.lzma" = "*"
+Flask-Cors = "*"
+Flask-SocketIO = "*"
+"GeoAlchemy2" = "*"
+Keras = ">=2.1.6"
+keras-maskrcnn = "*"
+keras-retinanet = "*"
+Pygments = "*"
+PyNaCl = "*"
+"PySDL2" = "*"
+reverse_geocoder = "*"
+Shapely = "*"
+SQLAlchemy = "==1.2.7"
+uWSGI = "*"
+scipy = "*"
+fastcluster = "==1.1.25"
+backports-abc = "*"
+pygame = "*"
+simplejson = "*"
+python-logstash-async = "*"
+pandas = "*"
+seaborn = "*"
+
+[packages]
+overpy = {git = "https://github.com/commaai/python-overpy.git",ref = "f86529af402d4642e1faeb146671c40284007323"}
+atomicwrites = "*"
+cffi = "*"
+crcmod = "*"
+hexdump = "*"
+libusb1 = "*"
+numpy = "*"
+psutil = "*"
+pycapnp = "*"
+cryptography = "*"
+pyserial = "*"
+python-dateutil = "*"
+pyzmq = "*"
+raven = "*"
+requests = "*"
+setproctitle = "*"
+six = "*"
+smbus2 = "*"
+sympy = "*"
+tqdm = "*"
+Cython = "*"
+PyYAML = "*"
+websocket_client = "*"
+Logentries = {git = "https://github.com/commaai/le_python.git",ref = "5eef8f5be5929d33973e1b10e686fa0cdcd6792f"}
+urllib3 = "*"
+chardet = "*"
+idna = "*"
+gunicorn = "*"
+utm = "*"
+json-rpc = "*"
+Flask = "*"
+PyJWT = "*"
+"Jinja2" = "*"
+nose = "*"
+pyflakes = "*"
+pylint = "*"
+pycryptodome = "*"
+
+[requires]
+python_version = "2.7"

README.md

@@ -1,4 +1,4 @@
-[![](https://i.imgur.com/xY2gdHv.png)](#)
+[![](https://i.imgur.com/UetIFyH.jpg)](#)
 
 Welcome to openpilot
 ======
@@ -60,13 +60,13 @@ Supported Cars
 
 | Make                 | Model                    | Supported Package    | Lateral | Longitudinal   | No Accel Below   | No Steer Below | Giraffe           |
 | ---------------------| -------------------------| ---------------------| --------| ---------------| -----------------| ---------------|-------------------|
-| Acura                | ILX 2016-17              | AcuraWatch Plus      | Yes     | Yes            | 25mph<sup>1</sup>| 25mph          | Nidec             |
-| Acura                | RDX 2018                 | AcuraWatch Plus      | Yes     | Yes            | 25mph<sup>1</sup>| 12mph          | Nidec             |
+| Acura                | ILX 2016-18              | AcuraWatch Plus      | Yes     | Yes            | 25mph<sup>1</sup>| 25mph          | Nidec             |
+| Acura                | RDX 2016-18              | AcuraWatch Plus      | Yes     | Yes            | 25mph<sup>1</sup>| 12mph          | Nidec             |
 | Buick<sup>3</sup>    | Regal 2018               | Adaptive Cruise      | Yes     | Yes            | 0mph             | 7mph           | Custom<sup>7</sup>|
 | Chevrolet<sup>3</sup>| Malibu 2017              | Adaptive Cruise      | Yes     | Yes            | 0mph             | 7mph           | Custom<sup>7</sup>|
 | Chevrolet<sup>3</sup>| Volt 2017-18             | Adaptive Cruise      | Yes     | Yes            | 0mph             | 7mph           | Custom<sup>7</sup>|
 | Cadillac<sup>3</sup> | ATS 2018                 | Adaptive Cruise      | Yes     | Yes            | 0mph             | 7mph           | Custom<sup>7</sup>|
-| Chrysler             | Pacifica 2018            | Adaptive Cruise      | Yes     | Stock          | 0mph             | 9mph           | FCA               |
+| Chrysler             | Pacifica 2017-18         | Adaptive Cruise      | Yes     | Stock          | 0mph             | 9mph           | FCA               |
 | Chrysler             | Pacifica Hybrid 2017-18  | Adaptive Cruise      | Yes     | Stock          | 0mph             | 9mph           | FCA               |
 | Chrysler             | Pacifica Hybrid 2019     | Adaptive Cruise      | Yes     | Stock          | 0mph             | 39mph          | FCA               |
 | GMC<sup>3</sup>      | Acadia Denali 2018       | Adaptive Cruise      | Yes     | Yes            | 0mph             | 7mph           | Custom<sup>7</sup>|
@@ -77,29 +77,32 @@ Supported Cars
 | Honda                | Civic Hatchback 2017-19  | Honda Sensing        | Yes     | Stock          | 0mph             | 12mph          | Bosch             |
 | Honda                | CR-V 2015-16             | Touring              | Yes     | Yes            | 25mph<sup>1</sup>| 12mph          | Nidec             |
 | Honda                | CR-V 2017-19             | Honda Sensing        | Yes     | Stock          | 0mph             | 12mph          | Bosch             |
-| Honda                | CR-V Hybrid 2019         | All                  | Yes     | Stock          | 0mph             | 12mph          | Bosch             |
-| Honda                | Odyssey 2017-19          | Honda Sensing        | Yes     | Yes            | 25mph<sup>1</sup>| 0mph           | Inverted Nidec    |
+| Honda                | CR-V Hybrid 2017-2019    | Honda Sensing        | Yes     | Stock          | 0mph             | 12mph          | Bosch             |
+| Honda                | Odyssey 2018-19          | Honda Sensing        | Yes     | Yes            | 25mph<sup>1</sup>| 0mph           | Inverted Nidec    |
 | Honda                | Passport 2019            | All                  | Yes     | Yes            | 25mph<sup>1</sup>| 12mph          | Inverted Nidec    |
 | Honda                | Pilot 2016-18            | Honda Sensing        | Yes     | Yes            | 25mph<sup>1</sup>| 12mph          | Nidec             |
 | Honda                | Pilot 2019               | All                  | Yes     | Yes            | 25mph<sup>1</sup>| 12mph          | Inverted Nidec    |
 | Honda                | Ridgeline 2017-19        | Honda Sensing        | Yes     | Yes            | 25mph<sup>1</sup>| 12mph          | Nidec             |
 | Hyundai              | Santa Fe 2019            | All                  | Yes     | Stock          | 0mph             | 0mph           | Custom<sup>6</sup>|
-| Hyundai              | Elantra 2017             | SCC + LKAS           | Yes     | Stock          | 19mph            | 34mph          | Custom<sup>6</sup>|
+| Hyundai              | Elantra 2017-19          | SCC + LKAS           | Yes     | Stock          | 19mph            | 34mph          | Custom<sup>6</sup>|
 | Hyundai              | Genesis 2018             | All                  | Yes     | Stock          | 19mph            | 34mph          | Custom<sup>6</sup>|
-| Jeep                 | Grand Cherokee 2017-18   | Adaptive Cruise      | Yes     | Stock          | 0mph             | 9mph           | FCA               |
+| Jeep                 | Grand Cherokee 2016-18   | Adaptive Cruise      | Yes     | Stock          | 0mph             | 9mph           | FCA               |
 | Jeep                 | Grand Cherokee 2019      | Adaptive Cruise      | Yes     | Stock          | 0mph             | 39mph          | FCA               |
 | Kia                  | Optima 2019              | SCC + LKAS           | Yes     | Stock          | 0mph             | 0mph           | Custom<sup>6</sup>|
 | Kia                  | Sorento 2018             | All                  | Yes     | Stock          | 0mph             | 0mph           | Custom<sup>6</sup>|
 | Kia                  | Stinger 2018             | SCC + LKAS           | Yes     | Stock          | 0mph             | 0mph           | Custom<sup>6</sup>|
+| Lexus                | ES Hybrid 2019           | All                  | Yes     | Yes            | 0mph             | 0mph           | Toyota            |
 | Lexus                | RX Hybrid 2016-19        | All                  | Yes     | Yes<sup>2</sup>| 0mph             | 0mph           | Toyota            |
-| Subaru               | Crosstrek 2018           | EyeSight             | Yes     | Stock          | 0mph             | 0mph           | Subaru            |
-| Subaru               | Impreza 2019             | EyeSight             | Yes     | Stock          | 0mph             | 0mph           | Subaru            |
+| Subaru               | Crosstrek 2018           | EyeSight             | Yes     | Stock          | 0mph             | 0mph           | Custom<sup>4</sup>|
+| Subaru               | Impreza 2019             | EyeSight             | Yes     | Stock          | 0mph             | 0mph           | Custom<sup>4</sup>|
 | Toyota               | Avalon 2016              | TSS-P                | Yes     | Yes<sup>2</sup>| 20mph<sup>1</sup>| 0mph           | Toyota            |
-| Toyota               | Camry 2018<sup>4</sup>   | All                  | Yes     | Stock          | 0mph<sup>5</sup> | 0mph           | Toyota            |
-| Toyota               | C-HR 2017-18<sup>4</sup> | All                  | Yes     | Stock          | 0mph             | 0mph           | Toyota            |
-| Toyota               | Corolla 2017-18          | All                  | Yes     | Yes<sup>2</sup>| 20mph<sup>1</sup>| 0mph           | Toyota            |
+| Toyota               | Avalon 2017-18           | All                  | Yes     | Yes<sup>2</sup>| 20mph<sup>1</sup>| 0mph           | Toyota            |
+| Toyota               | Camry 2018-19            | All                  | Yes     | Stock          | 0mph<sup>5</sup> | 0mph           | Toyota            |
+| Toyota               | C-HR 2017-19             | All                  | Yes     | Stock          | 0mph             | 0mph           | Toyota            |
+| Toyota               | Corolla 2017-19          | All                  | Yes     | Yes<sup>2</sup>| 20mph<sup>1</sup>| 0mph           | Toyota            |
+| Toyota               | Corolla 2020             | All                  | Yes     | Yes            | 0mph             | 0mph           | Toyota            |
 | Toyota               | Corolla Hatchback 2019   | All                  | Yes     | Yes            | 0mph             | 0mph           | Toyota            |
-| Toyota               | Highlander 2017-18       | All                  | Yes     | Yes<sup>2</sup>| 0mph             | 0mph           | Toyota            |
+| Toyota               | Highlander 2017-19       | All                  | Yes     | Yes<sup>2</sup>| 0mph             | 0mph           | Toyota            |
 | Toyota               | Highlander Hybrid 2018   | All                  | Yes     | Yes<sup>2</sup>| 0mph             | 0mph           | Toyota            |
 | Toyota               | Prius 2016               | TSS-P                | Yes     | Yes<sup>2</sup>| 0mph             | 0mph           | Toyota            |
 | Toyota               | Prius 2017-19            | All                  | Yes     | Yes<sup>2</sup>| 0mph             | 0mph           | Toyota            |
@@ -108,14 +111,15 @@ Supported Cars
 | Toyota               | Rav4 2017-18             | All                  | Yes     | Yes<sup>2</sup>| 20mph<sup>1</sup>| 0mph           | Toyota            |
 | Toyota               | Rav4 2019                | All                  | Yes     | Yes            | 0mph             | 0mph           | Toyota            |
 | Toyota               | Rav4 Hybrid 2017-18      | All                  | Yes     | Yes<sup>2</sup>| 0mph             | 0mph           | Toyota            |
+| Toyota               | Sienna 2018              | All                  | Yes     | Yes<sup>2</sup>| 0mph             | 0mph           | Toyota            |
 
-<sup>1</sup>[Comma Pedal](https://community.comma.ai/wiki/index.php/Comma_Pedal) is used to provide stop-and-go capability to some of the openpilot-supported cars that don't currently support stop-and-go. Here is how to [build a Comma Pedal](https://medium.com/@jfrux/comma-pedal-building-with-macrofab-6328bea791e8). ***NOTE: The Comma Pedal is not officially supported by [comma.ai](https://comma.ai)***  
-<sup>2</sup>When disconnecting the Driver Support Unit (DSU), otherwise longitudinal control is stock ACC. For DSU locations, see [Toyota Wiki page](https://community.comma.ai/wiki/index.php/Toyota)  
-<sup>3</sup>[GM installation guide](https://zoneos.com/volt/).  
-<sup>4</sup>It needs an extra 120Ohm resistor ([pic1](https://i.imgur.com/CmdKtTP.jpg), [pic2](https://i.imgur.com/s2etUo6.jpg)) on bus 3 and giraffe switches set to 01X1 (11X1 for stock LKAS), where X depends on if you have the [comma power](https://comma.ai/shop/products/power/).  
-<sup>5</sup>28mph for Camry 4CYL L, 4CYL LE and 4CYL SE which don't have Full-Speed Range Dynamic Radar Cruise Control.  
-<sup>6</sup>Open sourced [Hyundai Giraffe](https://github.com/commaai/neo/tree/master/giraffe/hyundai) is designed for the 2019 Sante Fe; pinout may differ for other Hyundais.  
-<sup>7</sup>Community built Giraffe, find more information [here](https://zoneos.com/shop/).  
+<sup>1</sup>[Comma Pedal](https://community.comma.ai/wiki/index.php/Comma_Pedal) is used to provide stop-and-go capability to some of the openpilot-supported cars that don't currently support stop-and-go. Here is how to [build a Comma Pedal](https://medium.com/@jfrux/comma-pedal-building-with-macrofab-6328bea791e8). ***NOTE: The Comma Pedal is not officially supported by [comma.ai](https://comma.ai).*** <br />
+<sup>2</sup>When disconnecting the Driver Support Unit (DSU), otherwise longitudinal control is stock ACC. For DSU locations, see [Toyota Wiki page](https://community.comma.ai/wiki/index.php/Toyota). <br />
+<sup>3</sup>[GM installation guide](https://zoneos.com/volt/). <br />
+<sup>4</sup>Subaru Giraffe is DIY. <br />
+<sup>5</sup>28mph for Camry 4CYL L, 4CYL LE and 4CYL SE which don't have Full-Speed Range Dynamic Radar Cruise Control. <br />
+<sup>6</sup>Open sourced [Hyundai Giraffe](https://github.com/commaai/neo/tree/master/giraffe/hyundai) is designed for the 2019 Sante Fe; pinout may differ for other Hyundais. <br />
+<sup>7</sup>Community built Giraffe, find more information [here](https://zoneos.com/shop/). <br />
 
 Community Maintained Cars
 ------
@@ -173,7 +177,6 @@ Directory structure
         ├── locationd       # Soon to be home of precise location
         ├── logcatd         # Android logcat as a service
         ├── loggerd         # Logger and uploader of car data
-        ├── mapd            # Fetches map data and computes next global path
         ├── proclogd        # Logs information from proc
         ├── sensord         # IMU / GPS interface code
         ├── test            # Car simulator running code through virtual maneuvers

RELEASES.md

@@ -1,3 +1,33 @@
+Version 0.6.1 (2019-07-21)
+========================
+ * Remote SSH with comma prime and [ssh.comma.ai](https://ssh.comma.ai)
+ * Panda code Misra-c2012 compliance, tested against cppcheck coverage
+ * Lockout openpilot after 3 terminal alerts for driver distracted or unresponsive
+ * Toyota Sienna support thanks to wocsor!
+
+Version 0.6 (2019-07-01)
+========================
+ * New model, with double the pixels and ten times the temporal context!
+ * Car should not take exits when in the right lane
+ * openpilot uses only ~65% of the CPU (down from 75%)
+ * Routes visible in connect/explorer after only 0.2% is uploaded (qlogs)
+ * loggerd and sensord are open source, every line of openpilot is now open
+ * Panda safety code is MISRA compliant and ships with a signed version on release2
+ * New NEOS is 500MB smaller and has a reproducible usr/pipenv
+ * Lexus ES Hybrid support thanks to wocsor!
+ * Improve tuning for supported Toyota with TSS2
+ * Various other stability improvements
+
+Version 0.5.13 (2019-05-31)
+==========================
+ * Reduce panda power consumption by 70%, down to 80mW, when car is off (not for GM)
+ * Reduce EON power consumption by 40%, down to 1100mW, when car is off
+ * Reduce CPU utilization by 20% and improve stability
+ * Temporarily remove mapd functionalities to improve stability
+ * Add openpilot record-only mode for unsupported cars
+ * Synchronize controlsd to boardd to reduce latency
+ * Remove panda support for Subaru giraffe
+
 Version 0.5.12 (2019-05-16)
 ==========================
  * Improve lateral control for the Prius and Prius Prime
@@ -9,8 +39,8 @@ Version 0.5.12 (2019-05-16)
  * Add default speed limits for Estonia thanks to martinl!
  * Subaru Crosstrek support thanks to martinl!
  * Toyota Avalon support thanks to njbrown09!
- * Toyota Rav4 with TSS 2.0 support thansk to wocsor!
- * Toyota Corolla with TSS 2.0 support thansk to wocsor!
+ * Toyota Rav4 with TSS 2.0 support thanks to wocsor!
+ * Toyota Corolla with TSS 2.0 support thanks to wocsor!
 
 Version 0.5.11 (2019-04-17)
 ========================

cereal/.gitignore

@@ -1,3 +1,6 @@
 gen
 node_modules
 package-lock.json
+*.pyc
+__pycache__
+

cereal/car.capnp

@@ -22,7 +22,7 @@ struct CarEvent @0x9b1657f34caf3ad3 {
 
   enum EventName @0xbaa8c5d505f727de {
     # TODO: copy from error list
-    commIssue @0;
+    canError @0;
     steerUnavailable @1;
     brakeUnavailable @2;
     gasUnavailable @3;
@@ -37,7 +37,7 @@ struct CarEvent @0x9b1657f34caf3ad3 {
     buttonEnable @12;
     pedalPressed @13;
     cruiseDisabled @14;
-    radarCommIssue @15;
+    radarCanError @15;
     dataNeeded @16;
     speedTooLow @17;
     outOfSpace @18;
@@ -49,7 +49,7 @@ struct CarEvent @0x9b1657f34caf3ad3 {
     pcmDisable @24;
     noTarget @25;
     radarFault @26;
-    modelCommIssue @27;
+    modelCommIssueDEPRECATED @27;
     brakeHold @28;
     parkBrake @29;
     manualRestart @30;
@@ -74,6 +74,10 @@ struct CarEvent @0x9b1657f34caf3ad3 {
     invalidGiraffeHonda @49;
     vehicleModelInvalid @50;
     controlsFailed @51;
+    sensorDataInvalid @52;
+    commIssue @53;
+    tooDistracted @54;
+    posenetInvalid @55;
   }
 }
 
@@ -122,6 +126,7 @@ struct CarState {
   # lock info
   doorOpen @24 :Bool;
   seatbeltUnlatched @25 :Bool;
+  canValid @26 :Bool;
 
   # which packets this state came from
   canMonoTimes @12: List(UInt64);
@@ -175,7 +180,7 @@ struct CarState {
 
 # ******* radar state @ 20hz *******
 
-struct RadarState {
+struct RadarData @0x888ad6581cf0aacb {
   errors @0 :List(Error);
   points @1 :List(RadarPoint);
 
@@ -183,7 +188,7 @@ struct RadarState {
   canMonoTimes @2 :List(UInt64);
 
   enum Error {
-    commIssue @0;
+    canError @0;
     fault @1;
     wrongConfig @2;
   }
@@ -292,7 +297,7 @@ struct CarParams {
 
   minEnableSpeed @7 :Float32;
   minSteerSpeed @8 :Float32;
-  safetyModel @9 :Int16;
+  safetyModel @9 :SafetyModel;
   safetyParam @10 :Int16;
 
   steerMaxBP @11 :List(Float32);
@@ -333,6 +338,7 @@ struct CarParams {
 
   steerActuatorDelay @36 :Float32; # Steering wheel actuator delay in seconds
   openpilotLongitudinalControl @37 :Bool; # is openpilot doing the longitudinal control?
+  carVin @38 :Text; # VIN number queried during fingerprinting
 
   struct LateralPIDTuning {
     kpBP @0 :List(Float32);
@@ -360,7 +366,7 @@ struct CarParams {
   }
 
 
-  enum SafetyModels {
+  enum SafetyModel {
     # does NOT match board setting
     noOutput @0;
     honda @1;

cereal/generate_javascript.sh

@@ -0,0 +1,26 @@
+#!/bin/bash
+
+rm -r gen/ts
+rm -r gen/js
+
+mkdir gen/ts
+mkdir gen/js
+
+echo "Installing needed npm modules"
+npm i capnpc-ts capnp-ts
+
+capnpc -o node_modules/.bin/capnpc-ts:gen/ts log.capnp car.capnp
+capnpc -o node_modules/.bin/capnpc-ts:gen/ts car.capnp
+
+cat log.capnp | egrep '\([a-zA-Z]*\.[^\s]+\.[^s]+\)' | sed 's/^.*([a-zA-Z]*\.\([a-zA-Z.]*\)).*/\1/' | while read line
+do
+  TOKEN=`echo $line | sed 's/\./_/g'`
+  ROOT=`echo $line | sed 's/\..*$//g'`
+  cat gen/ts/log.capnp.ts | grep '^import.*'${TOKEN}
+  if [[ "$?" == "1" ]]
+  then
+    sed -i 's/^\(import {.*\)'${ROOT}'\(,*\) \(.*\)$/\1'${ROOT}', '${TOKEN}'\2 \3/' ./gen/ts/log.capnp.ts
+  fi
+done
+
+tsc ./gen/ts/* --lib es2015 --outDir ./gen/js

cereal/install_capnp.sh

@@ -0,0 +1,39 @@
+set -e
+echo "Installing capnp"
+
+cd /tmp
+VERSION=0.6.1
+wget https://capnproto.org/capnproto-c++-${VERSION}.tar.gz
+tar xvf capnproto-c++-${VERSION}.tar.gz
+cd capnproto-c++-${VERSION}
+CXXFLAGS="-fPIC" ./configure
+
+make -j4
+
+# manually build binaries statically
+g++ -std=gnu++11 -I./src -I./src -DKJ_HEADER_WARNINGS -DCAPNP_HEADER_WARNINGS -DCAPNP_INCLUDE_DIR=\"/usr/local/include\" -pthread -O2 -DNDEBUG -pthread -pthread -o .libs/capnp src/capnp/compiler/module-loader.o src/capnp/compiler/capnp.o  ./.libs/libcapnpc.a ./.libs/libcapnp.a ./.libs/libkj.a -lpthread -pthread
+
+g++ -std=gnu++11 -I./src -I./src -DKJ_HEADER_WARNINGS -DCAPNP_HEADER_WARNINGS -DCAPNP_INCLUDE_DIR=\"/usr/local/include\" -pthread -O2 -DNDEBUG -pthread -pthread -o .libs/capnpc-c++ src/capnp/compiler/capnpc-c++.o  ./.libs/libcapnp.a ./.libs/libkj.a -lpthread -pthread
+
+g++ -std=gnu++11 -I./src -I./src -DKJ_HEADER_WARNINGS -DCAPNP_HEADER_WARNINGS -DCAPNP_INCLUDE_DIR=\"/usr/local/include\" -pthread -O2 -DNDEBUG -pthread -pthread -o .libs/capnpc-capnp src/capnp/compiler/capnpc-capnp.o  ./.libs/libcapnp.a ./.libs/libkj.a -lpthread -pthread
+
+cp .libs/capnp /usr/local/bin/
+ln -s /usr/local/bin/capnp /usr/local/bin/capnpc
+cp .libs/capnpc-c++ /usr/local/bin/
+cp .libs/capnpc-capnp /usr/local/bin/
+cp .libs/*.a /usr/local/lib
+
+cd /tmp
+echo "Installing c-capnp"
+git clone https://github.com/commaai/c-capnproto.git
+cd c-capnproto
+git submodule update --init --recursive
+autoreconf -f -i -s
+CXXFLAGS="-fPIC" ./configure
+make -j4
+
+# manually build binaries statically
+gcc -fPIC -o .libs/capnpc-c compiler/capnpc-c.o compiler/schema.capnp.o compiler/str.o  ./.libs/libcapnp_c.a
+
+cp .libs/capnpc-c /usr/local/bin/
+cp .libs/*.a /usr/local/lib

cereal/log.capnp

@@ -150,6 +150,12 @@ struct FrameData {
   }
 }
 
+struct Thumbnail {
+  frameId @0 :UInt32;
+  timestampEof @1 :UInt64;
+  thumbnail @2 :Data;
+}
+
 struct GPSNMEAData {
   timestamp @0 :Int64;
   localWallTime @1 :UInt64;
@@ -294,8 +300,20 @@ struct HealthData {
   started @2 :Bool;
   controlsAllowed @3 :Bool;
   gasInterceptorDetected @4 :Bool;
-  startedSignalDetected @5 :Bool;
+  startedSignalDetectedDeprecated @5 :Bool;
   isGreyPanda @6 :Bool;
+  canSendErrs @7 :UInt32;
+  canFwdErrs @8 :UInt32;
+  gmlanSendErrs @9 :UInt32;
+  hwType @10: HwType;
+
+  enum HwType {
+    unknown @0;
+    whitePanda @1;
+    greyPanda @2;
+    blackPanda @3;
+    pedal @4;
+  }
 }
 
 struct LiveUI {
@@ -305,12 +323,12 @@ struct LiveUI {
   awarenessStatus @3 :Float32;
 }
 
-struct Live20Data {
+struct RadarState @0x9a185389d6fdd05f {
   canMonoTimes @10 :List(UInt64);
   mdMonoTime @6 :UInt64;
   ftMonoTimeDEPRECATED @7 :UInt64;
-  l100MonoTime @11 :UInt64;
-  radarErrors @12 :List(Car.RadarState.Error);
+  controlsStateMonoTime @11 :UInt64;
+  radarErrors @12 :List(Car.RadarData.Error);
 
   # all deprecated
   warpMatrixDEPRECATED @0 :List(Float32);
@@ -337,6 +355,8 @@ struct Live20Data {
     fcw @10 :Bool;
     status @11 :Bool;
     aLeadTau @12 :Float32;
+    modelProb @13 :Float32;
+    radar @14 :Bool;
   }
 }
 
@@ -368,15 +388,15 @@ struct LiveTracks {
   oncoming @9 :Bool;
 }
 
-struct Live100Data {
+struct ControlsState @0x97ff69c53601abf1 {
   canMonoTimeDEPRECATED @16 :UInt64;
   canMonoTimes @21 :List(UInt64);
-  l20MonoTimeDEPRECATED @17 :UInt64;
+  radarStateMonoTimeDEPRECATED @17 :UInt64;
   mdMonoTimeDEPRECATED @18 :UInt64;
   planMonoTime @28 :UInt64;
   pathPlanMonoTime @50 :UInt64;
 
-  state @31 :ControlState;
+  state @31 :OpenpilotState;
   vEgo @0 :Float32;
   vEgoRaw @32 :Float32;
   aEgoDEPRECATED @1 :Float32;
@@ -433,7 +453,7 @@ struct Live100Data {
     pidState @53 :LateralPIDState;
   }
 
-  enum ControlState {
+  enum OpenpilotState @0xdbe58b96d2d1ac61 {
     disabled @0;
     preEnabled @1;
     enabled @2;
@@ -502,17 +522,27 @@ struct ModelData {
   freePath @6 :List(Float32);
 
   settings @5 :ModelSettings;
+  leadFuture @7 :LeadData;
+  speed @8 :List(Float32);
 
   struct PathData {
     points @0 :List(Float32);
     prob @1 :Float32;
     std @2 :Float32;
+    stds @3 :List(Float32);
+    poly @4 :List(Float32);
   }
 
   struct LeadData {
     dist @0 :Float32;
     prob @1 :Float32;
     std @2 :Float32;
+    relVel @3 :Float32;
+    relVelStd @4 :Float32;
+    relY @5 :Float32;
+    relYStd @6 :Float32;
+    relA @7 :Float32;
+    relAStd @8 :Float32;
   }
 
   struct ModelSettings {
@@ -574,7 +604,9 @@ struct LogRotate {
 
 struct Plan {
   mdMonoTime @9 :UInt64;
-  l20MonoTime @10 :UInt64;
+  radarStateMonoTime @10 :UInt64;
+  commIssue @31 :Bool;
+
   eventsDEPRECATED @13 :List(Car.CarEvent);
 
   # lateral, 3rd order polynomial
@@ -613,7 +645,7 @@ struct Plan {
   decelForTurn @22 :Bool;
   mapValid @25 :Bool;
   radarValid @28 :Bool;
-  radarCommIssue @30 :Bool;
+  radarCanError @30 :Bool;
 
   processingDelay @29 :Float32;
 
@@ -644,10 +676,13 @@ struct PathPlan {
 
   angleSteers @8 :Float32; # deg
   rateSteers @13 :Float32; # deg/s
-  valid @9 :Bool;
+  mpcSolutionValid @9 :Bool;
   paramsValid @10 :Bool;
-  modelValid @12 :Bool;
+  modelValidDEPRECATED @12 :Bool;
   angleOffset @11 :Float32;
+  sensorValid @14 :Bool;
+  commIssue @15 :Bool;
+  posenetValid @16 :Bool;
 }
 
 struct LiveLocationData {
@@ -1643,6 +1678,10 @@ struct LiveParametersData {
   angleOffsetAverage @3 :Float32;
   stiffnessFactor @4 :Float32;
   steerRatio @5 :Float32;
+  sensorValid @6 :Bool;
+  yawRate @7 :Float32;
+  posenetSpeed @8 :Float32;
+  posenetValid @9 :Bool;
 }
 
 struct LiveMapData {
@@ -1682,6 +1721,7 @@ struct KalmanOdometry {
 struct Event {
   # in nanoseconds?
   logMonoTime @0 :UInt64;
+  valid @67 :Bool = true;
 
   union {
     initData @1 :InitData;
@@ -1690,13 +1730,13 @@ struct Event {
     sensorEventDEPRECATED @4 :SensorEventData;
     can @5 :List(CanData);
     thermal @6 :ThermalData;
-    live100 @7 :Live100Data;
+    controlsState @7 :ControlsState;
     liveEventDEPRECATED @8 :List(LiveEventData);
     model @9 :ModelData;
     features @10 :CalibrationFeatures;
     sensorEvents @11 :List(SensorEventData);
     health @12 :HealthData;
-    live20 @13 :Live20Data;
+    radarState @13 :RadarState;
     liveUIDEPRECATED @14 :LiveUI;
     encodeIdx @15 :EncodeIndex;
     liveTracks @16 :List(LiveTracks);
@@ -1749,5 +1789,8 @@ struct Event {
     cameraOdometry @63 :CameraOdometry;
     pathPlan @64 :PathPlan;
     kalmanOdometry @65 :KalmanOdometry;
+    thumbnail @66: Thumbnail;
+    carEvents @68: List(Car.CarEvent);
+    carParams @69: Car.CarParams;
   }
 }

cereal/maptile.capnp

@@ -0,0 +1,53 @@
+using Cxx = import "./include/c++.capnp";
+$Cxx.namespace("cereal");
+
+using Java = import "./include/java.capnp";
+$Java.package("ai.comma.openpilot.cereal");
+$Java.outerClassname("Map");
+
+@0xa086df597ef5d7a0;
+
+# Geometry
+struct Point {
+  x @0: Float64;
+  y @1: Float64;
+  z @2: Float64;
+}
+
+struct PolyLine {
+  points @0: List(Point);
+}
+
+# Map features
+struct Lane {
+  id @0 :Text;
+
+  leftBoundary @1 :LaneBoundary;
+  rightBoundary @2 :LaneBoundary;
+
+  leftAdjacentId @3 :Text;
+  rightAdjacentId @4 :Text;
+
+  inboundIds @5 :List(Text);
+  outboundIds @6 :List(Text);
+
+  struct LaneBoundary {
+    polyLine @0 :PolyLine;
+    startHeading @1 :Float32; # WRT north
+  }
+}
+
+# Map tiles
+struct TileSummary {
+  version @0 :Text;
+  updatedAt @1 :UInt64; # Millis since epoch
+
+  level @2 :UInt8;
+  x @3 :UInt16;
+  y @4 :UInt16;
+}
+
+struct MapTile {
+  summary @0 :TileSummary;
+  lanes @1 :List(Lane);
+}

common/clock.pyx

@@ -0,0 +1,16 @@
+from posix.time cimport clock_gettime, timespec, CLOCK_BOOTTIME, CLOCK_MONOTONIC_RAW
+
+cdef double readclock(int clock_id):
+    cdef timespec ts
+    cdef double current
+
+    clock_gettime(clock_id, &ts)
+    current = ts.tv_sec + (ts.tv_nsec / 1000000000.)
+    return current
+
+
+def monotonic_time():
+    return readclock(CLOCK_MONOTONIC_RAW)
+
+def sec_since_boot():
+    return readclock(CLOCK_BOOTTIME)

common/file_helpers.py

@@ -0,0 +1,118 @@
+import os
+import shutil
+import tempfile
+from atomicwrites import AtomicWriter
+
+def mkdirs_exists_ok(path):
+  try:
+    os.makedirs(path)
+  except OSError:
+    if not os.path.isdir(path):
+      raise
+
+def rm_not_exists_ok(path):
+  try:
+    os.remove(path)
+  except OSError:
+    if os.path.exists(path):
+      raise
+
+def rm_tree_or_link(path):
+  if os.path.islink(path):
+    os.unlink(path)
+  elif os.path.isdir(path):
+    shutil.rmtree(path)
+
+def get_tmpdir_on_same_filesystem(path):
+  # TODO(mgraczyk): HACK, we should actually check for which filesystem.
+  normpath = os.path.normpath(path)
+  parts = normpath.split("/")
+  if len(parts) > 1:
+    if parts[1].startswith("raid") or parts[1].startswith("datasets"):
+      if len(parts) > 2 and parts[2] == "runner":
+        return "/{}/runner/tmp".format(parts[1])
+      elif len(parts) > 2 and parts[2] == "aws":
+        return "/{}/aws/tmp".format(parts[1])
+      else:
+        return "/{}/tmp".format(parts[1])
+    elif parts[1] == "aws":
+      return "/aws/tmp"
+    elif parts[1] == "scratch":
+      return "/scratch/tmp"
+  return "/tmp"
+
+class AutoMoveTempdir(object):
+  def __init__(self, target_path, temp_dir=None):
+    self._target_path = target_path
+    self._path = tempfile.mkdtemp(dir=temp_dir)
+
+  @property
+  def name(self):
+    return self._path
+
+  def close(self):
+    os.rename(self._path, self._target_path)
+
+  def __enter__(self): return self
+
+  def __exit__(self, type, value, traceback):
+    if type is None:
+      self.close()
+    else:
+      shutil.rmtree(self._path)
+
+class NamedTemporaryDir(object):
+  def __init__(self, temp_dir=None):
+    self._path = tempfile.mkdtemp(dir=temp_dir)
+
+  @property
+  def name(self):
+    return self._path
+
+  def close(self):
+    shutil.rmtree(self._path)
+
+  def __enter__(self): return self
+
+  def __exit__(self, type, value, traceback):
+    self.close()
+
+def _get_fileobject_func(writer, temp_dir):
+  def _get_fileobject():
+    file_obj = writer.get_fileobject(dir=temp_dir)
+    os.chmod(file_obj.name, 0o644)
+    return file_obj
+  return _get_fileobject
+
+def atomic_write_on_fs_tmp(path, **kwargs):
+  """Creates an atomic writer using a temporary file in a temporary directory
+     on the same filesystem as path.
+  """
+  # TODO(mgraczyk): This use of AtomicWriter relies on implementation details to set the temp
+  #                 directory.
+  writer = AtomicWriter(path, **kwargs)
+  return writer._open(_get_fileobject_func(writer, get_tmpdir_on_same_filesystem(path)))
+
+
+def atomic_write_in_dir(path, **kwargs):
+  """Creates an atomic writer using a temporary file in the same directory
+     as the destination file.
+  """
+  writer = AtomicWriter(path, **kwargs)
+  return writer._open(_get_fileobject_func(writer, os.path.dirname(path)))
+
+def atomic_write_in_dir_neos(path, contents, mode=None):
+  """
+  Atomically writes contents to path using a temporary file in the same directory
+  as path. Useful on NEOS, where `os.link` (required by atomic_write_in_dir) is missing.
+  """
+
+  f = tempfile.NamedTemporaryFile(delete=False, prefix=".tmp", dir=os.path.dirname(path))
+  f.write(contents)
+  f.flush()
+  if mode is not None:
+    os.fchmod(f.fileno(), mode)
+  os.fsync(f.fileno())
+  f.close()
+
+  os.rename(f.name, path)

common/fingerprints.py

@@ -4,7 +4,7 @@ from common.basedir import BASEDIR
 def get_fingerprint_list():
   # read all the folders in selfdrive/car and return a dict where:
   # - keys are all the car models for which we have a fingerprint
-  # - values are lists dicts of messages that constitute the unique 
+  # - values are lists dicts of messages that constitute the unique
   #   CAN fingerprint of each car model and all its variants
   fingerprints = {}
   for car_folder in [x[0] for x in os.walk(BASEDIR + '/selfdrive/car')]:
@@ -28,10 +28,8 @@ _DEBUG_ADDRESS = {1880: 8}   # reserved for debug purposes
 
 def is_valid_for_fingerprint(msg, car_fingerprint):
   adr = msg.address
-  bus = msg.src
   # ignore addresses that are more than 11 bits
-  return (adr in car_fingerprint and car_fingerprint[adr] == len(msg.dat)) or \
-         bus != 0 or adr >= 0x800
+  return (adr in car_fingerprint and car_fingerprint[adr] == len(msg.dat)) or adr >= 0x800
 
 
 def eliminate_incompatible_cars(msg, candidate_cars):

common/kalman/Makefile

@@ -1,7 +1,7 @@
 all: simple_kalman_impl.so
 
 simple_kalman_impl.so: simple_kalman_impl.pyx simple_kalman_impl.pxd simple_kalman_setup.py
-	python simple_kalman_setup.py build_ext --inplace
+	python2 simple_kalman_setup.py build_ext --inplace
 	rm -rf build
 	rm simple_kalman_impl.c
 

common/params.py

@@ -41,7 +41,7 @@ def mkdirs_exists_ok(path):
 class TxType(Enum):
   PERSISTENT = 1
   CLEAR_ON_MANAGER_START = 2
-  CLEAR_ON_CAR_START = 3
+  CLEAR_ON_PANDA_DISCONNECT = 3
 
 
 class UnknownKeyName(Exception):
@@ -49,32 +49,37 @@ class UnknownKeyName(Exception):
 
 
 keys = {
-  "AccessToken": TxType.PERSISTENT,
-  "CalibrationParams": TxType.PERSISTENT,
-  "CarParams": TxType.CLEAR_ON_CAR_START,
-  "CompletedTrainingVersion": TxType.PERSISTENT,
-  "ControlsParams": TxType.PERSISTENT,
-  "DoUninstall": TxType.CLEAR_ON_MANAGER_START,
-  "DongleId": TxType.PERSISTENT,
-  "GitBranch": TxType.PERSISTENT,
-  "GitCommit": TxType.PERSISTENT,
-  "GitRemote": TxType.PERSISTENT,
-  "HasAcceptedTerms": TxType.PERSISTENT,
-  "IsDriverMonitoringEnabled": TxType.PERSISTENT,
-  "IsFcwEnabled": TxType.PERSISTENT,
-  "IsGeofenceEnabled": TxType.PERSISTENT,
-  "IsMetric": TxType.PERSISTENT,
-  "IsUpdateAvailable": TxType.PERSISTENT,
-  "IsUploadVideoOverCellularEnabled": TxType.PERSISTENT,
-  "LimitSetSpeed": TxType.PERSISTENT,
-  "LiveParameters": TxType.PERSISTENT,
-  "LongitudinalControl": TxType.PERSISTENT,
-  "Passive": TxType.PERSISTENT,
-  "RecordFront": TxType.PERSISTENT,
-  "ShouldDoUpdate": TxType.CLEAR_ON_MANAGER_START,
-  "SpeedLimitOffset": TxType.PERSISTENT,
-  "TrainingVersion": TxType.PERSISTENT,
-  "Version": TxType.PERSISTENT,
+  "AccessToken": [TxType.PERSISTENT],
+  "AthenadPid": [TxType.PERSISTENT],
+  "CalibrationParams": [TxType.PERSISTENT],
+  "CarParams": [TxType.CLEAR_ON_MANAGER_START, TxType.CLEAR_ON_PANDA_DISCONNECT],
+  "CompletedTrainingVersion": [TxType.PERSISTENT],
+  "ControlsParams": [TxType.PERSISTENT],
+  "DoUninstall": [TxType.CLEAR_ON_MANAGER_START],
+  "DongleId": [TxType.PERSISTENT],
+  "GithubSshKeys": [TxType.PERSISTENT],
+  "GitBranch": [TxType.PERSISTENT],
+  "GitCommit": [TxType.PERSISTENT],
+  "GitRemote": [TxType.PERSISTENT],
+  "HasAcceptedTerms": [TxType.PERSISTENT],
+  "IsDriverMonitoringEnabled": [TxType.PERSISTENT],
+  "IsFcwEnabled": [TxType.PERSISTENT],
+  "IsGeofenceEnabled": [TxType.PERSISTENT],
+  "IsMetric": [TxType.PERSISTENT],
+  "IsUpdateAvailable": [TxType.PERSISTENT],
+  "IsUploadRawEnabled": [TxType.PERSISTENT],
+  "IsUploadVideoOverCellularEnabled": [TxType.PERSISTENT],
+  "LimitSetSpeed": [TxType.PERSISTENT],
+  "LiveParameters": [TxType.PERSISTENT],
+  "LongitudinalControl": [TxType.PERSISTENT],
+  "Passive": [TxType.PERSISTENT],
+  "RecordFront": [TxType.PERSISTENT],
+  "ShouldDoUpdate": [TxType.CLEAR_ON_MANAGER_START],
+  "SpeedLimitOffset": [TxType.PERSISTENT],
+  "SubscriberInfo": [TxType.PERSISTENT],
+  "TermsVersion": [TxType.PERSISTENT],
+  "TrainingVersion": [TxType.PERSISTENT],
+  "Version": [TxType.PERSISTENT],
 }
 
 
@@ -308,14 +313,14 @@ class Params(object):
   def _clear_keys_with_type(self, tx_type):
     with self.transaction(write=True) as txn:
       for key in keys:
-        if keys[key] == tx_type:
+        if tx_type in keys[key]:
           txn.delete(key)
 
   def manager_start(self):
     self._clear_keys_with_type(TxType.CLEAR_ON_MANAGER_START)
 
-  def car_start(self):
-    self._clear_keys_with_type(TxType.CLEAR_ON_CAR_START)
+  def panda_disconnect(self):
+    self._clear_keys_with_type(TxType.CLEAR_ON_PANDA_DISCONNECT)
 
   def delete(self, key):
     with self.transaction(write=True) as txn:

common/realtime.py

@@ -2,58 +2,31 @@
 import os
 import time
 import platform
-import threading
 import subprocess
 import multiprocessing
-
 from cffi import FFI
+
+# Build and load cython module
+import pyximport
+installer = pyximport.install(inplace=True, build_dir='/tmp')
+from common.clock import monotonic_time, sec_since_boot  # pylint: disable=no-name-in-module, import-error
+pyximport.uninstall(*installer)
+assert monotonic_time
+assert sec_since_boot
+
+
+# time step for each process
+DT_CTRL = 0.01  # controlsd
+DT_PLAN = 0.05  # mpc
+DT_MDL = 0.05  # model
+DT_DMON = 0.1  # driver monitoring
+
+
 ffi = FFI()
-ffi.cdef("""
-
-typedef int clockid_t;
-struct timespec {
-    long tv_sec;   /* Seconds.  */
-    long tv_nsec;  /* Nanoseconds.  */
-};
-int clock_gettime (clockid_t clk_id, struct timespec *tp);
-
-long syscall(long number, ...);
-
-"""
-)
+ffi.cdef("long syscall(long number, ...);")
 libc = ffi.dlopen(None)
 
 
-# see <linux/time.h>
-CLOCK_MONOTONIC_RAW = 4
-CLOCK_BOOTTIME = 7
-
-if platform.system() != 'Darwin' and hasattr(libc, 'clock_gettime'):
-  c_clock_gettime = libc.clock_gettime
-
-  tlocal = threading.local()
-  def clock_gettime(clk_id):
-    if not hasattr(tlocal, 'ts'):
-      tlocal.ts = ffi.new('struct timespec *')
-
-    ts = tlocal.ts
-
-    r = c_clock_gettime(clk_id, ts)
-    if r != 0:
-      raise OSError("clock_gettime")
-    return ts.tv_sec + ts.tv_nsec * 1e-9
-else:
-  # hack. only for OS X < 10.12
-  def clock_gettime(clk_id):
-    return time.time()
-
-def monotonic_time():
-  return clock_gettime(CLOCK_MONOTONIC_RAW)
-
-def sec_since_boot():
-  return clock_gettime(CLOCK_BOOTTIME)
-
-
 def set_realtime_priority(level):
   if os.getuid() != 0:
     print("not setting priority, not root")
@@ -99,10 +72,9 @@ class Ratekeeper(object):
     lagged = False
     remaining = self._next_frame_time - sec_since_boot()
     self._next_frame_time += self._interval
-    if remaining < -self._print_delay_threshold:
+    if self._print_delay_threshold is not None and remaining < -self._print_delay_threshold:
       print("%s lagging by %.2f ms" % (self._process_name, -remaining * 1000))
       lagged = True
     self._frame += 1
     self._remaining = remaining
     return lagged
-

common/transformations/camera.py

@@ -1,6 +1,5 @@
 import numpy as np
 import common.transformations.orientation as orient
-import cv2
 import math
 
 FULL_FRAME_SIZE = (1164, 874)
@@ -126,6 +125,8 @@ def img_from_device(pt_device):
 
 #TODO please use generic img transform below
 def rotate_img(img, eulers, crop=None, intrinsics=eon_intrinsics):
+  import cv2
+
   size = img.shape[:2]
   rot = orient.rot_from_euler(eulers)
   quadrangle = np.array([[0, 0],
@@ -162,6 +163,8 @@ def transform_img(base_img,
                  output_size=None,
                  pretransform=None,
                  top_hacks=True):
+  import cv2
+
   size = base_img.shape[:2]
   if not output_size:
     output_size = size[::-1]
@@ -204,10 +207,10 @@ def transform_img(base_img,
 def yuv_crop(frame, output_size, center=None):
   # output_size in camera coordinates so u,v
   # center in array coordinates so row, column
+  import cv2
   rgb = cv2.cvtColor(frame, cv2.COLOR_YUV2RGB_I420)
   if not center:
     center = (rgb.shape[0]/2, rgb.shape[1]/2)
   rgb_crop = rgb[center[0] - output_size[1]/2: center[0] + output_size[1]/2,
                  center[1] - output_size[0]/2: center[1] + output_size[0]/2]
   return cv2.cvtColor(rgb_crop, cv2.COLOR_RGB2YUV_I420)
-

common/vin.py

@@ -0,0 +1,95 @@
+#!/usr/bin/env python
+import time
+from common.realtime import sec_since_boot
+import selfdrive.messaging as messaging
+from selfdrive.boardd.boardd import can_list_to_can_capnp
+
+def get_vin(logcan, sendcan):
+
+  # works on standard 11-bit addresses for diagnostic. Tested on Toyota and Subaru;
+  # Honda uses the extended 29-bit addresses, and unfortunately only works from OBDII
+  query_msg = [[0x7df, 0, '\x02\x09\x02'.ljust(8, "\x00"), 0],
+               [0x7e0, 0, '\x30'.ljust(8, "\x00"), 0]]
+
+  cnts = [1, 2]  # Number of messages to wait for at each iteration
+  vin_valid = True
+
+  dat = []
+  for i in range(len(query_msg)):
+    cnt = 0
+    sendcan.send(can_list_to_can_capnp([query_msg[i]], msgtype='sendcan'))
+    got_response = False
+    t_start = sec_since_boot()
+    while sec_since_boot() - t_start < 0.05 and not got_response:
+      for a in messaging.drain_sock(logcan):
+        for can in a.can:
+          if can.src == 0 and can.address == 0x7e8:
+            vin_valid = vin_valid and is_vin_response_valid(can.dat, i, cnt)
+            dat += can.dat[2:] if i == 0 else can.dat[1:]
+            cnt += 1
+            if cnt == cnts[i]:
+              got_response = True
+      time.sleep(0.01)
+
+  return "".join(dat[3:]) if vin_valid else ""
+
+"""
+if 'vin' not in gctx:
+  print "getting vin"
+  gctx['vin'] = query_vin()[3:]
+  print "got VIN %s" % (gctx['vin'],)
+  cloudlog.info("got VIN %s" % (gctx['vin'],))
+
+# *** determine platform based on VIN ****
+if vin.startswith("19UDE2F36G"):
+  print "ACURA ILX 2016"
+  self.civic = False
+else:
+  # TODO: add Honda check explicitly
+  print "HONDA CIVIC 2016"
+  self.civic = True
+
+# *** special case VIN of Acura test platform
+if vin == "19UDE2F36GA001322":
+  print "comma.ai test platform detected"
+  # it has a gas interceptor and a torque mod
+  self.torque_mod = True
+"""
+
+
+# sanity checks on response messages from vin query
+def is_vin_response_valid(can_dat, step, cnt):
+
+  can_dat = [ord(i) for i in can_dat]
+
+  if len(can_dat) != 8:
+    # ISO-TP meesages are all 8 bytes
+    return False
+
+  if step == 0:
+    # VIN does not fit in a single message and it's 20 bytes of data
+    if can_dat[0] != 0x10 or can_dat[1] != 0x14:
+       return False
+
+  if step == 1 and cnt == 0:
+    # first response after a CONTINUE query is sent
+    if can_dat[0] != 0x21:
+       return False
+
+  if step == 1 and cnt == 1:
+    # second response after a CONTINUE query is sent
+    if can_dat[0] != 0x22:
+       return False
+
+  return True
+
+
+if __name__ == "__main__":
+  import zmq
+  from selfdrive.services import service_list
+  context = zmq.Context()
+  logcan = messaging.sub_sock(context, service_list['can'].port)
+  sendcan = messaging.pub_sock(context, service_list['sendcan'].port)
+  time.sleep(1.)   # give time to sendcan socket to start
+
+  print get_vin(logcan, sendcan)

installer/updater/Makefile

@@ -0,0 +1,88 @@
+CC = clang
+CXX = clang++
+
+PHONELIBS = ../../phonelibs
+
+WARN_FLAGS = -Werror=implicit-function-declaration \
+             -Werror=incompatible-pointer-types \
+             -Werror=int-conversion \
+             -Werror=return-type \
+             -Werror=format-extra-args
+
+CFLAGS = -std=gnu11 -g -fPIC -O2 $(WARN_FLAGS)
+CXXFLAGS = -std=c++11 -g -fPIC -O2 $(WARN_FLAGS)
+
+CURL_FLAGS = -I$(PHONELIBS)/curl/include
+CURL_LIBS = $(PHONELIBS)/curl/lib/libcurl.a \
+            $(PHONELIBS)/zlib/lib/libz.a
+
+BORINGSSL_FLAGS = -I$(PHONELIBS)/boringssl/include
+BORINGSSL_LIBS = $(PHONELIBS)/boringssl/lib/libssl_static.a \
+                 $(PHONELIBS)/boringssl/lib/libcrypto_static.a \
+
+NANOVG_FLAGS = -I$(PHONELIBS)/nanovg
+
+JSON11_FLAGS = -I$(PHONELIBS)/json11
+
+OPENGL_LIBS = -lGLESv3
+
+FRAMEBUFFER_LIBS = -lutils -lgui -lEGL
+
+.PHONY: all
+all: updater
+
+OBJS = courbd.ttf.o \
+       ../../selfdrive/common/touch.o \
+       ../../selfdrive/common/framebuffer.o \
+       $(PHONELIBS)/json11/json11.o \
+       $(PHONELIBS)/nanovg/nanovg.o
+
+DEPS := $(OBJS:.o=.d)
+
+updater: updater.o $(OBJS)
+	@echo "[ LINK ] $@"
+	$(CXX) $(CPPFLAGS) -fPIC -o 'updater' $^ \
+    $(FRAMEBUFFER_LIBS) \
+    $(CURL_LIBS) \
+    $(BORINGSSL_LIBS) \
+    -L/system/vendor/lib64 \
+    $(OPENGL_LIBS) \
+    -lcutils -lm -llog
+	strip updater
+
+courbd.ttf.o: ../../selfdrive/assets/courbd.ttf
+	@echo "[ bin2o ] $@"
+	cd '$(dir $<)' && ld -r -b binary '$(notdir $<)' -o '$(abspath $@)'
+
+%.o: %.c
+	mkdir -p $(@D)
+	@echo "[ CC ] $@"
+	$(CC) $(CPPFLAGS) $(CFLAGS) \
+          -I../.. \
+          -I$(PHONELIBS)/android_frameworks_native/include \
+          -I$(PHONELIBS)/android_system_core/include \
+          -I$(PHONELIBS)/android_hardware_libhardware/include \
+          $(NANOVG_FLAGS) \
+          -c -o '$@' '$<'
+
+%.o: %.cc
+	mkdir -p $(@D)
+	@echo "[ CXX ] $@"
+	$(CXX) $(CPPFLAGS) $(CXXFLAGS) \
+           -I../../selfdrive \
+           -I../../ \
+           -I$(PHONELIBS)/android_frameworks_native/include \
+           -I$(PHONELIBS)/android_system_core/include \
+           -I$(PHONELIBS)/android_hardware_libhardware/include \
+           $(NANOVG_FLAGS) \
+           $(JSON11_FLAGS) \
+           $(CURL_FLAGS) \
+           $(BORINGSSL_FLAGS) \
+           -c -o '$@' '$<'
+
+
+.PHONY: clean
+clean:
+	rm -f $(OBJS) $(DEPS)
+
+-include $(DEPS)

installer/updater/update.json

@@ -0,0 +1,7 @@
+{
+  "ota_url": "https://commadist.azureedge.net/neosupdate/ota-signed-c992abb59cbaf6588f51055db52db619061107851773fc8480acb8bb5d77a28f.zip",
+  "ota_hash": "c992abb59cbaf6588f51055db52db619061107851773fc8480acb8bb5d77a28f",
+  "recovery_url": "https://commadist.azureedge.net/neosupdate/recovery-af099a84cfd7b91266090779238ac358278948dcde2dcfa0fbca6e8397366f0a.img",
+  "recovery_len": 15136044,
+  "recovery_hash": "af099a84cfd7b91266090779238ac358278948dcde2dcfa0fbca6e8397366f0a"
+}

installer/updater/updater.cc

@@ -0,0 +1,675 @@
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <cassert>
+
+#include <unistd.h>
+#include <sys/stat.h>
+#include <sys/statvfs.h>
+
+#include <string>
+#include <sstream>
+#include <fstream>
+#include <mutex>
+#include <thread>
+
+#include <curl/curl.h>
+#include <openssl/sha.h>
+
+#include <GLES3/gl3.h>
+#include <EGL/egl.h>
+#include <EGL/eglext.h>
+
+#include "nanovg.h"
+#define NANOVG_GLES3_IMPLEMENTATION
+#include "nanovg_gl.h"
+#include "nanovg_gl_utils.h"
+
+#include "json11.hpp"
+
+#include "common/framebuffer.h"
+#include "common/touch.h"
+#include "common/utilpp.h"
+
+#define USER_AGENT "NEOSUpdater-0.2"
+
+#define MANIFEST_URL_EON_STAGING "https://github.com/commaai/eon-neos/raw/master/update.staging.json"
+#define MANIFEST_URL_EON_LOCAL "http://192.168.5.1:8000/neosupdate/update.local.json"
+#define MANIFEST_URL_EON "https://github.com/commaai/eon-neos/raw/master/update.json"
+const char *manifest_url = MANIFEST_URL_EON;
+
+#define RECOVERY_DEV "/dev/block/bootdevice/by-name/recovery"
+#define RECOVERY_COMMAND "/cache/recovery/command"
+
+#define UPDATE_DIR "/data/neoupdate"
+
+extern const uint8_t bin_courbd[] asm("_binary_courbd_ttf_start");
+extern const uint8_t bin_courbd_end[] asm("_binary_courbd_ttf_end");
+
+namespace {
+
+std::string sha256_file(std::string fn, size_t limit=0) {
+  SHA256_CTX ctx;
+  SHA256_Init(&ctx);
+
+  FILE *file = fopen(fn.c_str(), "rb");
+  if (!file) return "";
+
+  const size_t buf_size = 8192;
+  std::unique_ptr<char[]> buffer( new char[ buf_size ] );
+
+  bool read_limit = (limit != 0);
+  while (true) {
+    size_t read_size = buf_size;
+    if (read_limit) read_size = std::min(read_size, limit);
+    size_t bytes_read = fread(buffer.get(), 1, read_size, file);
+    if (!bytes_read) break;
+
+    SHA256_Update(&ctx, buffer.get(), bytes_read);
+
+    if (read_limit) {
+      limit -= bytes_read;
+      if (limit == 0) break;
+    }
+  }
+
+  uint8_t hash[SHA256_DIGEST_LENGTH];
+  SHA256_Final(hash, &ctx);
+
+  fclose(file);
+
+  return util::tohex(hash, sizeof(hash));
+}
+
+size_t download_string_write(void *ptr, size_t size, size_t nmeb, void *up) {
+  size_t sz = size * nmeb;
+  ((std::string*)up)->append((char*)ptr, sz);
+  return sz;
+}
+
+std::string download_string(CURL *curl, std::string url) {
+  std::string os;
+
+  curl_easy_setopt(curl, CURLOPT_URL, url.c_str());
+  curl_easy_setopt(curl, CURLOPT_FOLLOWLOCATION, 1);
+  curl_easy_setopt(curl, CURLOPT_NOSIGNAL, 1);
+  curl_easy_setopt(curl, CURLOPT_USERAGENT, USER_AGENT);
+  curl_easy_setopt(curl, CURLOPT_FAILONERROR, 1);
+  curl_easy_setopt(curl, CURLOPT_RESUME_FROM, 0);
+
+  curl_easy_setopt(curl, CURLOPT_NOPROGRESS, 1);
+
+  curl_easy_setopt(curl, CURLOPT_WRITEFUNCTION, download_string_write);
+  curl_easy_setopt(curl, CURLOPT_WRITEDATA, &os);
+  CURLcode res = curl_easy_perform(curl);
+  if (res != CURLE_OK) {
+    return "";
+  }
+
+  return os;
+}
+
+size_t download_file_write(void *ptr, size_t size, size_t nmeb, void *up) {
+  return fwrite(ptr, size, nmeb, (FILE*)up);
+}
+
+bool check_battery() {
+  std::string bat_cap_s = util::read_file("/sys/class/power_supply/battery/capacity");
+  int bat_cap = atoi(bat_cap_s.c_str());
+  std::string current_now_s = util::read_file("/sys/class/power_supply/battery/current_now");
+  int current_now = atoi(current_now_s.c_str());
+  return bat_cap > 35 || (current_now < 0 && bat_cap > 10);
+}
+
+bool check_space() {
+  struct statvfs stat;
+  if (statvfs("/data/", &stat) != 0) {
+    return false;
+  }
+  size_t space = stat.f_bsize * stat.f_bavail;
+  return space > 2000000000ULL; // 2GB
+}
+
+static void start_settings_activity(const char* name) {
+  char launch_cmd[1024];
+  snprintf(launch_cmd, sizeof(launch_cmd),
+           "am start -W --ez :settings:show_fragment_as_subsetting true -n 'com.android.settings/.%s'", name);
+  system(launch_cmd);
+}
+
+struct Updater {
+  bool do_exit = false;
+
+  TouchState touch;
+
+  int fb_w, fb_h;
+  EGLDisplay display;
+  EGLSurface surface;
+
+  FramebufferState *fb = NULL;
+  NVGcontext *vg = NULL;
+  int font;
+
+  std::thread update_thread_handle;
+
+  std::mutex lock;
+
+  // i hate state machines give me coroutines already
+  enum UpdateState {
+    CONFIRMATION,
+    RUNNING,
+    ERROR,
+  };
+  UpdateState state;
+
+  std::string progress_text;
+  float progress_frac;
+
+  std::string error_text;
+
+  // button
+  int b_x, b_w, b_y, b_h;
+  int balt_x;
+
+  CURL *curl = NULL;
+
+  Updater() {
+    touch_init(&touch);
+
+    fb = framebuffer_init("updater", 0x00001000, false,
+                          &display, &surface, &fb_w, &fb_h);
+    assert(fb);
+
+    vg = nvgCreateGLES3(NVG_ANTIALIAS | NVG_STENCIL_STROKES | NVG_DEBUG);
+    assert(vg);
+    font = nvgCreateFontMem(vg, "courbd", (unsigned char*)bin_courbd, (bin_courbd_end - bin_courbd), 0);
+    assert(font >= 0);
+
+    b_w = 600;
+    balt_x = 200;
+    b_x = fb_w-b_w-200;
+    b_y = 700;
+    b_h = 250;
+
+    state = CONFIRMATION;
+
+  }
+
+  int download_file_xferinfo(curl_off_t dltotal, curl_off_t dlno,
+                             curl_off_t ultotal, curl_off_t ulnow) {
+    {
+      std::lock_guard<std::mutex> guard(lock);
+      if (dltotal != 0) {
+        progress_frac = (float) dlno / dltotal;
+      }
+    }
+    // printf("info: %ld %ld %f\n", dltotal, dlno, progress_frac);
+    return 0;
+  }
+
+  bool download_file(std::string url, std::string out_fn) {
+    FILE *of = fopen(out_fn.c_str(), "ab");
+    assert(of);
+
+    CURLcode res;
+    long last_resume_from = 0;
+
+    fseek(of, 0, SEEK_END);
+
+    int tries = 4;
+
+    bool ret = false;
+
+    while (true) {
+      long resume_from = ftell(of);
+
+      curl_easy_setopt(curl, CURLOPT_URL, url.c_str());
+      curl_easy_setopt(curl, CURLOPT_FOLLOWLOCATION, 1);
+      curl_easy_setopt(curl, CURLOPT_NOSIGNAL, 1);
+      curl_easy_setopt(curl, CURLOPT_USERAGENT, USER_AGENT);
+      curl_easy_setopt(curl, CURLOPT_FAILONERROR, 1);
+      curl_easy_setopt(curl, CURLOPT_RESUME_FROM, resume_from);
+
+      curl_easy_setopt(curl, CURLOPT_WRITEFUNCTION, download_file_write);
+      curl_easy_setopt(curl, CURLOPT_WRITEDATA, of);
+
+      curl_easy_setopt(curl, CURLOPT_NOPROGRESS, 0);
+
+      curl_easy_setopt(curl, CURLOPT_XFERINFODATA, this);
+      curl_easy_setopt(curl, CURLOPT_XFERINFOFUNCTION, &Updater::download_file_xferinfo);
+
+      CURLcode res = curl_easy_perform(curl);
+
+      long response_code = 0;
+      curl_easy_getinfo(curl, CURLINFO_RESPONSE_CODE, &response_code);
+
+      // double content_length = 0.0;
+      // curl_easy_getinfo(curl, CURLINFO_CONTENT_LENGTH_DOWNLOAD, &content_length);
+
+      printf("download %s res %d, code %ld, resume from %ld\n", url.c_str(), res, response_code, resume_from);
+      if (res == CURLE_OK) {
+        ret = true;
+        break;
+      } else if (res == CURLE_HTTP_RETURNED_ERROR && response_code == 416) {
+        // failed because the file is already complete?
+        ret = true;
+        break;
+      } else if (resume_from == last_resume_from) {
+        // failed and dind't make make forward progress. only retry a couple times
+        tries--;
+        if (tries <= 0) {
+          break;
+        }
+      }
+      last_resume_from = resume_from;
+    }
+    // printf("res %d\n", res);
+
+    // printf("- %ld %f\n", response_code, content_length);
+
+    fclose(of);
+
+    return ret;
+  }
+
+  void set_progress(std::string text) {
+    std::lock_guard<std::mutex> guard(lock);
+    progress_text = text;
+  }
+
+  void set_error(std::string text) {
+    std::lock_guard<std::mutex> guard(lock);
+    error_text = text;
+    state = ERROR;
+  }
+
+  std::string stage_download(std::string url, std::string hash, std::string name) {
+    std::string out_fn = UPDATE_DIR "/" + util::base_name(url);
+
+    set_progress("downloading " + name + "...");
+    bool r = download_file(url, out_fn);
+    if (!r) {
+      set_error("failed to download " + name);
+      return "";
+    }
+
+    set_progress("verifying " + name + "...");
+    std::string fn_hash = sha256_file(out_fn);
+    printf("got %s hash: %s\n", name.c_str(), hash.c_str());
+    if (fn_hash != hash) {
+      set_error(name + " was corrupt");
+      unlink(out_fn.c_str());
+      return "";
+    }
+
+    return out_fn;
+  }
+
+  void run_stages() {
+    curl = curl_easy_init();
+    assert(curl);
+
+    if (!check_battery()) {
+      set_error("Please plug power in to your EON and wait for charge");
+      return;
+    }
+
+    if (!check_space()) {
+      set_error("2GB of free space required to update");
+      return;
+    }
+
+    mkdir(UPDATE_DIR, 0777);
+
+    const int EON = (access("/EON", F_OK) != -1);
+
+    set_progress("finding latest version...");
+    std::string manifest_s;
+    if (EON) {
+      manifest_s = download_string(curl, manifest_url);
+    } else {
+      // don't update NEO
+      exit(0);
+    }
+
+    printf("manifest: %s\n", manifest_s.c_str());
+
+    std::string err;
+    auto manifest = json11::Json::parse(manifest_s, err);
+    if (manifest.is_null() || !err.empty()) {
+      set_error("failed to load update manifest");
+      return;
+    }
+
+    std::string ota_url = manifest["ota_url"].string_value();
+    std::string ota_hash = manifest["ota_hash"].string_value();
+
+    std::string recovery_url = manifest["recovery_url"].string_value();
+    std::string recovery_hash = manifest["recovery_hash"].string_value();
+    int recovery_len = manifest["recovery_len"].int_value();
+
+    // std::string installer_url = manifest["installer_url"].string_value();
+    // std::string installer_hash = manifest["installer_hash"].string_value();
+
+    if (ota_url.empty() || ota_hash.empty()) {
+      set_error("invalid update manifest");
+      return;
+    }
+
+    // std::string installer_fn = stage_download(installer_url, installer_hash, "installer");
+    // if (installer_fn.empty()) {
+    //   //error'd
+    //   return;
+    // }
+
+    std::string recovery_fn;
+    if (recovery_url.empty() || recovery_hash.empty() || recovery_len == 0) {
+      set_progress("skipping recovery flash...");
+    } else {
+      // only download the recovery if it differs from what's flashed
+      set_progress("checking recovery...");
+      std::string existing_recovery_hash = sha256_file(RECOVERY_DEV, recovery_len);
+      printf("existing recovery hash: %s\n", existing_recovery_hash.c_str());
+
+      if (existing_recovery_hash != recovery_hash) {
+        recovery_fn = stage_download(recovery_url, recovery_hash, "recovery");
+        if (recovery_fn.empty()) {
+          // error'd
+          return;
+        }
+      }
+    }
+
+    std::string ota_fn = stage_download(ota_url, ota_hash, "update");
+    if (ota_fn.empty()) {
+      //error'd
+      return;
+    }
+
+    if (!check_battery()) {
+      set_error("must have at least 35% battery to update");
+      return;
+    }
+
+    if (!recovery_fn.empty()) {
+      // flash recovery
+      set_progress("flashing recovery...");
+
+      FILE *flash_file = fopen(recovery_fn.c_str(), "rb");
+      if (!flash_file) {
+        set_error("failed to flash recovery");
+        return;
+      }
+
+      FILE *recovery_dev = fopen(RECOVERY_DEV, "w+b");
+      if (!recovery_dev) {
+        fclose(flash_file);
+        set_error("failed to flash recovery");
+        return;
+      }
+
+      const size_t buf_size = 4096;
+      std::unique_ptr<char[]> buffer( new char[ buf_size ] );
+
+      while (true) {
+        size_t bytes_read = fread(buffer.get(), 1, buf_size, flash_file);
+        if (!bytes_read) break;
+
+        size_t bytes_written = fwrite(buffer.get(), 1, bytes_read, recovery_dev);
+        if (bytes_read != bytes_written) {
+          fclose(recovery_dev);
+          fclose(flash_file);
+          set_error("failed to flash recovery: write failed");
+          return;
+        }
+      }
+
+      fclose(recovery_dev);
+      fclose(flash_file);
+
+      set_progress("verifying flash...");
+      std::string new_recovery_hash = sha256_file(RECOVERY_DEV, recovery_len);
+      printf("new recovery hash: %s\n", new_recovery_hash.c_str());
+
+      if (new_recovery_hash != recovery_hash) {
+        set_error("recovery flash corrupted");
+        return;
+      }
+
+    }
+
+    // write arguments to recovery
+    FILE *cmd_file = fopen(RECOVERY_COMMAND, "wb");
+    if (!cmd_file) {
+      set_error("failed to reboot into recovery");
+      return;
+    }
+    fprintf(cmd_file, "--update_package=%s\n", ota_fn.c_str());
+    fclose(cmd_file);
+
+    set_progress("rebooting");
+
+    // remove the continue.sh so we come back into the setup.
+    // maybe we should go directly into the installer, but what if we don't come back with internet? :/
+    //unlink("/data/data/com.termux/files/continue.sh");
+
+    // TODO: this should be generic between android versions
+    // IPowerManager.reboot(confirm=false, reason="recovery", wait=true)
+    system("service call power 16 i32 0 s16 recovery i32 1");
+    while(1) pause();
+
+    // execl("/system/bin/reboot", "recovery");
+    // set_error("failed to reboot into recovery");
+  }
+
+  void draw_ack_screen(const char *message, const char *button, const char *altbutton) {
+    nvgFontSize(vg, 96.0f);
+    nvgFillColor(vg, nvgRGBA(255,255,255,255));
+    nvgTextAlign(vg, NVG_ALIGN_LEFT | NVG_ALIGN_BASELINE);
+    nvgTextBox(vg, 50, 100, fb_w-100, message, NULL);
+
+    // draw button
+    if (button) {
+      nvgBeginPath(vg);
+      nvgFillColor(vg, nvgRGBA(0, 0, 0, 255));
+      nvgRoundedRect(vg, b_x, b_y, b_w, b_h, 20);
+      nvgFill(vg);
+
+      nvgFillColor(vg, nvgRGBA(255, 255, 255, 255));
+      nvgTextAlign(vg, NVG_ALIGN_CENTER | NVG_ALIGN_MIDDLE);
+      nvgText(vg, b_x+b_w/2, b_y+b_h/2, button, NULL);
+
+      nvgBeginPath(vg);
+      nvgStrokeColor(vg, nvgRGBA(255, 255, 255, 255));
+      nvgStrokeWidth(vg, 5);
+      nvgRoundedRect(vg, b_x, b_y, b_w, b_h, 20);
+      nvgStroke(vg);
+    }
+
+    // draw button
+    if (altbutton) {
+      nvgBeginPath(vg);
+      nvgFillColor(vg, nvgRGBA(0, 0, 0, 255));
+      nvgRoundedRect(vg, balt_x, b_y, b_w, b_h, 20);
+      nvgFill(vg);
+
+      nvgFillColor(vg, nvgRGBA(255, 255, 255, 255));
+      nvgTextAlign(vg, NVG_ALIGN_CENTER | NVG_ALIGN_MIDDLE);
+      nvgText(vg, balt_x+b_w/2, b_y+b_h/2, altbutton, NULL);
+
+      nvgBeginPath(vg);
+      nvgStrokeColor(vg, nvgRGBA(255, 255, 255, 255));
+      nvgStrokeWidth(vg, 5);
+      nvgRoundedRect(vg, balt_x, b_y, b_w, b_h, 20);
+      nvgStroke(vg);
+    }
+  }
+
+  void draw_progress_screen() {
+    // draw progress message
+    nvgFontSize(vg, 64.0f);
+    nvgFillColor(vg, nvgRGBA(255,255,255,255));
+    nvgTextAlign(vg, NVG_ALIGN_CENTER | NVG_ALIGN_BASELINE);
+    nvgTextBox(vg, 0, 700, fb_w, progress_text.c_str(), NULL);
+
+    // draw progress bar
+    {
+      int progress_width = 800;
+      int progress_x = fb_w/2-progress_width/2;
+      int progress_y = 768;
+      int progress_height = 15;
+
+      int powerprompt_y = 512;
+      nvgText(vg, fb_w/2, powerprompt_y, "Ensure EON is connected to power", NULL);
+
+      NVGpaint paint = nvgBoxGradient(
+          vg, progress_x + 1, progress_y + 1,
+          progress_width - 2, progress_height, 3, 4, nvgRGB(0, 32, 0), nvgRGB(0, 92, 0));
+      nvgBeginPath(vg);
+      nvgRoundedRect(vg, progress_x, progress_y, progress_width, progress_height, 3);
+      nvgFillPaint(vg, paint);
+      nvgFill(vg);
+
+      float value = std::min(std::max(0.0f, progress_frac), 1.0f);
+      int bar_pos = ((progress_width - 2) * value);
+
+      paint = nvgBoxGradient(
+          vg, progress_x, progress_y,
+          bar_pos+1.5f, progress_height-1, 3, 4,
+          nvgRGB(220, 100, 0), nvgRGB(128, 100, 0));
+
+      nvgBeginPath(vg);
+      nvgRoundedRect(
+          vg, progress_x+1, progress_y+1,
+          bar_pos, progress_height-2, 3);
+      nvgFillPaint(vg, paint);
+      nvgFill(vg);
+    }
+  }
+
+  void ui_draw() {
+    std::lock_guard<std::mutex> guard(lock);
+
+    nvgBeginFrame(vg, fb_w, fb_h, 1.0f);
+
+    switch (state) {
+    case CONFIRMATION:
+      draw_ack_screen("An upgrade to NEOS is required.\n\n"
+                      "Your device will now be reset and upgraded. You may want to connect to wifi as download is around 1 GB\nData on device shouldn't be lost.",
+                      "continue",
+                      "wifi");
+      break;
+    case RUNNING:
+      draw_progress_screen();
+      break;
+    case ERROR:
+      draw_ack_screen(("ERROR: " + error_text + "\n\nYou will need to retry").c_str(), NULL, "exit");
+      break;
+    }
+
+    nvgEndFrame(vg);
+  }
+
+  void ui_update() {
+    std::lock_guard<std::mutex> guard(lock);
+
+    switch (state) {
+    case ERROR:
+    case CONFIRMATION: {
+      int touch_x = -1, touch_y = -1;
+      int res = touch_poll(&touch, &touch_x, &touch_y, 0);
+      if (res == 1 && !is_settings_active()) {
+        if (touch_x >= b_x && touch_x < b_x+b_w && touch_y >= b_y && touch_y < b_y+b_h) {
+          if (state == CONFIRMATION) {
+            state = RUNNING;
+            update_thread_handle = std::thread(&Updater::run_stages, this);
+          }
+        }
+        if (touch_x >= balt_x && touch_x < balt_x+b_w && touch_y >= b_y && touch_y < b_y+b_h) {
+          if (state == CONFIRMATION) {
+            start_settings_activity("Settings$WifiSettingsActivity");
+          } else if (state == ERROR) {
+            do_exit = 1;
+          }
+        }
+      }
+    }
+    default:
+      break;
+    }
+  }
+
+
+  void go() {
+    while (!do_exit) {
+      ui_update();
+
+      glClearColor(0.19, 0.09, 0.2, 1.0);
+      glClear(GL_STENCIL_BUFFER_BIT | GL_COLOR_BUFFER_BIT);
+
+      glEnable(GL_BLEND);
+      glBlendFunc(GL_SRC_ALPHA, GL_ONE_MINUS_SRC_ALPHA);
+
+      ui_draw();
+
+      glDisable(GL_BLEND);
+
+      eglSwapBuffers(display, surface);
+      assert(glGetError() == GL_NO_ERROR);
+
+      // no simple way to do 30fps vsync with surfaceflinger...
+      usleep(30000);
+    }
+
+    if (update_thread_handle.joinable()) {
+      update_thread_handle.join();
+    }
+
+    system("service call power 16 i32 0 i32 0 i32 1");
+  }
+
+  bool is_settings_active() {
+    FILE *fp;
+    char sys_output[4096];
+
+    fp = popen("/bin/dumpsys window windows", "r");
+    if (fp == NULL) {
+      return false;
+    }
+
+    bool active = false;
+    while (fgets(sys_output, sizeof(sys_output), fp) != NULL) {
+      if (strstr(sys_output, "mCurrentFocus=null")  != NULL) {
+        break;
+      }
+
+      if (strstr(sys_output, "mCurrentFocus=Window") != NULL) {
+        active = true;
+        break;
+      }
+    }
+
+    pclose(fp);
+
+    return active;
+  }
+
+};
+
+}
+int main(int argc, char *argv[]) {
+  if (argc > 1) {
+    if (strcmp(argv[1], "local") == 0) {
+      manifest_url = MANIFEST_URL_EON_LOCAL;
+    } else if (strcmp(argv[1], "staging") == 0) {
+      manifest_url = MANIFEST_URL_EON_STAGING;
+    } else {
+      manifest_url = argv[1];
+    }
+  }
+  printf("updating from %s\n", manifest_url);
+  Updater updater;
+  updater.go();
+
+  return 0;
+}

launch_chffrplus.sh

@@ -1,5 +1,11 @@
 #!/usr/bin/bash
 
+export OMP_NUM_THREADS=1
+export MKL_NUM_THREADS=1
+export NUMEXPR_NUM_THREADS=1
+export OPENBLAS_NUM_THREADS=1
+export VECLIB_MAXIMUM_THREADS=1
+
 if [ -z "$PASSIVE" ]; then
   export PASSIVE="1"
 fi
@@ -7,9 +13,16 @@ fi
 function launch {
   # apply update
   if [ "$(git rev-parse HEAD)" != "$(git rev-parse @{u})" ]; then
-     git reset --hard @{u} &&
-     git clean -xdf &&
-     exec "${BASH_SOURCE[0]}"
+    git reset --hard @{u} &&
+    git clean -xdf &&
+
+    # Touch all files on release2 after checkout to prevent rebuild
+    BRANCH=$(git rev-parse --abbrev-ref HEAD)
+    if [[ "$BRANCH" == "release2" ]]; then
+        touch **
+    fi
+
+    exec "${BASH_SOURCE[0]}"
   fi
 
   # no cpu rationing for now

opendbc/acura_ilx_2016_can_generated.dbc

@@ -164,14 +164,15 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ FCM_PROBLEM : 34|1@0+ (1,0) [0|1] "" BDY
  SG_ RADAR_OBSTRUCTED : 33|1@0+ (1,0) [0|1] "" BDY
  SG_ ENABLE_MINI_CAR : 32|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03 : 47|2@0+ (1,0) [0|3] "" BDY
+ SG_ HUD_DISTANCE : 47|2@0+ (1,0) [0|3] "" BDY
  SG_ HUD_LEAD : 45|2@0+ (1,0) [0|3] "" BDY
  SG_ BOH_3 : 43|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_4 : 42|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_5 : 41|1@0+ (1,0) [0|3] "" BDY
  SG_ CRUISE_CONTROL_LABEL : 40|1@0+ (1,0) [0|3] "" BDY
  SG_ HUD_DISTANCE_3 : 52|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03_2 : 55|2@0+ (1,0) [0|3] "" BDY
+ SG_ IMPERIAL_UNIT : 54|1@0+ (1,0) [0|1] "" BDY
+ SG_ SET_ME_X01_2 : 55|1@0+ (1,0) [0|1] "" BDY
  SG_ SET_ME_X01 : 48|1@0+ (1,0) [0|1] "" BDY
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" BDY
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" BDY

opendbc/acura_rdx_2018_can_generated.dbc

@@ -164,14 +164,15 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ FCM_PROBLEM : 34|1@0+ (1,0) [0|1] "" BDY
  SG_ RADAR_OBSTRUCTED : 33|1@0+ (1,0) [0|1] "" BDY
  SG_ ENABLE_MINI_CAR : 32|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03 : 47|2@0+ (1,0) [0|3] "" BDY
+ SG_ HUD_DISTANCE : 47|2@0+ (1,0) [0|3] "" BDY
  SG_ HUD_LEAD : 45|2@0+ (1,0) [0|3] "" BDY
  SG_ BOH_3 : 43|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_4 : 42|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_5 : 41|1@0+ (1,0) [0|3] "" BDY
  SG_ CRUISE_CONTROL_LABEL : 40|1@0+ (1,0) [0|3] "" BDY
  SG_ HUD_DISTANCE_3 : 52|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03_2 : 55|2@0+ (1,0) [0|3] "" BDY
+ SG_ IMPERIAL_UNIT : 54|1@0+ (1,0) [0|1] "" BDY
+ SG_ SET_ME_X01_2 : 55|1@0+ (1,0) [0|1] "" BDY
  SG_ SET_ME_X01 : 48|1@0+ (1,0) [0|1] "" BDY
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" BDY
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" BDY

opendbc/generator/honda/_bosch_2018.dbc

@@ -196,7 +196,8 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ ACC_PROBLEM : 37|1@0+ (1,0) [0|1] "" BDY
  SG_ ACC_ON : 52|1@0+ (1,0) [0|1] "" XXX
  SG_ BOH_6 : 51|4@0+ (1,0) [0|15] "" XXX
- SG_ SET_TO_X3 : 55|2@0+ (1,0) [0|3] "" XXX
+ SG_ IMPERIAL_UNIT : 55|1@0+ (1,0) [0|1] "" XXX
+ SG_ SET_TO_X1 : 56|1@0+ (1,0) [0|1] "" XXX
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" XXX
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|15] "" XXX
 
@@ -260,4 +261,4 @@ BO_ 891 STALK_STATUS_2: 8 XXX
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" EON
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" EON
 
-VAL_ 399 STEER_STATUS 6 "tmp_fault" 5 "fault_1" 4 "no_torque_alert_2" 3 "low_speed_lockout" 2 "no_torque_alert_1" 0 "normal" ;
+VAL_ 399 STEER_STATUS 6 "tmp_fault" 5 "fault_1" 4 "no_torque_alert_2" 3 "low_speed_lockout" 2 "no_torque_alert_1" 0 "normal" ;

opendbc/generator/honda/_honda_2017.dbc

@@ -142,14 +142,15 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ FCM_PROBLEM : 34|1@0+ (1,0) [0|1] "" BDY
  SG_ RADAR_OBSTRUCTED : 33|1@0+ (1,0) [0|1] "" BDY
  SG_ ENABLE_MINI_CAR : 32|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03 : 47|2@0+ (1,0) [0|3] "" BDY
+ SG_ HUD_DISTANCE : 47|2@0+ (1,0) [0|3] "" BDY
  SG_ HUD_LEAD : 45|2@0+ (1,0) [0|3] "" BDY
  SG_ BOH_3 : 43|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_4 : 42|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_5 : 41|1@0+ (1,0) [0|3] "" BDY
  SG_ CRUISE_CONTROL_LABEL : 40|1@0+ (1,0) [0|3] "" BDY
  SG_ HUD_DISTANCE_3 : 52|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03_2 : 55|2@0+ (1,0) [0|3] "" BDY
+ SG_ IMPERIAL_UNIT : 54|1@0+ (1,0) [0|1] "" BDY
+ SG_ SET_ME_X01_2 : 55|1@0+ (1,0) [0|1] "" BDY
  SG_ SET_ME_X01 : 48|1@0+ (1,0) [0|1] "" BDY
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" BDY
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" BDY

opendbc/generator/honda/honda_civic_touring_2016_can.dbc

@@ -50,8 +50,8 @@ BO_ 450 EPB_STATUS: 8 EPB
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" EON
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" EON
 
-BO_ 493 HUD_SETTING: 8 XXX
- SG_ SPEED_UNIT : 5|1@0+ (1,0) [0|1] "" EON
+BO_ 493 HUD_SETTING: 5 XXX
+ SG_ IMPERIAL_UNIT : 5|1@0+ (1,0) [0|1] "" EON
 
 BO_ 487 BRAKE_PRESSURE: 4 VSA
  SG_ BRAKE_PRESSURE1 : 7|10@0+ (0.015625,-103) [0|1000] "" EON
@@ -128,7 +128,6 @@ VAL_ 399 STEER_STATUS 6 "tmp_fault" 5 "fault_1" 4 "no_torque_alert_2" 3 "low_spe
 VAL_ 401 GEAR_SHIFTER 32 "L" 16 "S" 8 "D" 4 "N" 2 "R" 1 "P" ;
 VAL_ 401 GEAR 7 "L" 10 "S" 4 "D" 3 "N" 2 "R" 1 "P" ;
 VAL_ 450 EPB_STATE 3 "engaged" 2 "disengaging" 1 "engaging" 0 "disengaged" ;
-VAL_ 493 SPEED_UNIT 1 "mph" 0 "kph" ;
 VAL_ 545 ECON_ON_2 0 "off" 3 "on" ;
 VAL_ 662 CRUISE_BUTTONS 7 "tbd" 6 "tbd" 5 "tbd" 4 "accel_res" 3 "decel_set" 2 "cancel" 1 "main" 0 "none" ;
 VAL_ 662 CRUISE_SETTING 3 "distance_adj" 2 "tbd" 1 "lkas_button" 0 "none" ;

opendbc/generator/toyota/_toyota_2017.dbc

@@ -91,7 +91,7 @@ BO_ 614 STEERING_IPAS: 8 IPAS
  SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
  SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
  SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
 
 BO_ 643 PRE_COLLISION: 8 XXX

opendbc/generator/toyota/lexus_rx_350_2016_pt.dbc

@@ -0,0 +1,37 @@
+CM_ "IMPORT _toyota_2017.dbc"
+CM_ "IMPORT _comma.dbc"
+
+BO_ 550 BRAKE_MODULE: 8 XXX
+ SG_ BRAKE_PRESSURE : 0|9@0+ (1,0) [0|511] "" XXX
+ SG_ BRAKE_POSITION : 16|9@0+ (1,0) [0|511] "" XXX
+ SG_ BRAKE_PRESSED : 37|1@0+ (1,0) [0|1] "" XXX
+
+BO_ 608 STEER_TORQUE_SENSOR: 8 XXX
+ SG_ STEER_TORQUE_EPS : 47|16@0- (0.73,0) [-20000|20000] "" XXX
+ SG_ STEER_TORQUE_DRIVER : 15|16@0- (1,0) [-32768|32767] "" XXX
+ SG_ STEER_OVERRIDE : 0|1@0+ (1,0) [0|1] "" XXX
+ SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 610 EPS_STATUS: 5 EPS
+ SG_ IPAS_STATE : 3|4@0+ (1,0) [0|15] "" XXX
+ SG_ LKA_STATE : 31|7@0+ (1,0) [0|127] "" XXX
+ SG_ TYPE : 24|1@0+ (1,0) [0|1] "" XXX
+ SG_ CHECKSUM : 39|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 956 GEAR_PACKET: 8 XXX
+ SG_ SPORT_ON : 2|1@0+ (1,0) [0|1] "" XXX
+ SG_ GEAR : 13|6@0+ (1,0) [0|63] "" XXX
+ SG_ ECON_ON : 40|1@0+ (1,0) [0|1] "" XXX
+
+BO_ 705 GAS_PEDAL: 8 XXX
+ SG_ GAS_PEDAL : 55|8@0+ (1,0) [0|255] "" XXX
+
+
+CM_ SG_ 550 BRAKE_PRESSURE "seems prop to pedal force";
+CM_ SG_ 550 BRAKE_POSITION "seems proportional to pedal displacement, unclear the max value of 0x1c8";
+CM_ SG_ 610 TYPE "seems 1 on Corolla, 0 on all others";
+VAL_ 610 IPAS_STATE 5 "override" 3 "enabled" 1 "disabled" ;
+VAL_ 610 LKA_STATE 25 "temporary_fault" 9 "temporary_fault2" 5 "active" 1 "standby" ;
+VAL_ 956 SPORT_ON 0 "off" 1 "on" ;
+VAL_ 956 GEAR 0 "D" 1 "S" 8 "N" 16 "R" 32 "P" ;
+VAL_ 956 ECON_ON 0 "off" 1 "on" ;

opendbc/generator/toyota/toyota_camry_hybrid_2018_pt.dbc

@@ -16,7 +16,7 @@ BO_ 581 GAS_PEDAL: 8 XXX
  SG_ GAS_PEDAL : 23|8@0+ (0.005,0) [0|1] "" XXX
 
 BO_ 608 STEER_TORQUE_SENSOR: 8 XXX
- SG_ STEER_TORQUE_EPS : 47|16@0- (0.66,0) [-20000|20000] "" XXX
+ SG_ STEER_TORQUE_EPS : 47|16@0- (0.73,0) [-20000|20000] "" XXX
  SG_ STEER_TORQUE_DRIVER : 15|16@0- (1,0) [-32768|32767] "" XXX
  SG_ STEER_OVERRIDE : 0|1@0+ (1,0) [0|1] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX

opendbc/generator/toyota/toyota_nodsu_hybrid_pt.dbc

@@ -20,6 +20,7 @@ BO_ 608 STEER_TORQUE_SENSOR: 8 XXX
  SG_ STEER_TORQUE_DRIVER : 15|16@0- (1,0) [-32768|32767] "" XXX
  SG_ STEER_OVERRIDE : 0|1@0+ (1,0) [0|1] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
+ SG_ STEER_ANGLE : 31|16@0- (0.056,0) [-500|500] "" XXX
 
 BO_ 610 EPS_STATUS: 8 EPS
  SG_ IPAS_STATE : 3|4@0+ (1,0) [0|15] "" XXX

opendbc/generator/toyota/toyota_nodsu_pt.dbc

@@ -1,6 +1,17 @@
 CM_ "IMPORT _toyota_2017.dbc"
 CM_ "IMPORT _comma.dbc"
 
+BO_ 401 STEERING_LTA: 8 XXX
+ SG_ COUNTER : 7|8@0+ (1,0) [0|255] "" XXX
+ SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
+ SG_ SETME_X3 : 29|2@0+ (1,0) [0|3] "" XXX
+ SG_ PERCENTAGE : 39|8@0+ (1,0) [0|255] "" XXX
+ SG_ SETME_X64 : 47|8@0+ (1,0) [0|255] "" XXX
+ SG_ ANGLE : 55|8@0- (0.5,0) [0|255] "" XXX
+ SG_ STEER_ANGLE_CMD : 15|16@0- (0.056,0) [-540|540] "" XXX
+ SG_ STEER_REQUEST : 25|1@0+ (1,0) [0|1] "" XXX
+ SG_ BIT : 30|1@0+ (1,0) [0|1] "" XXX
+
 BO_ 550 BRAKE_MODULE: 8 XXX
  SG_ BRAKE_PRESSURE : 0|9@0+ (1,0) [0|511] "" XXX
  SG_ BRAKE_POSITION : 16|9@0+ (1,0) [0|511] "" XXX
@@ -15,6 +26,7 @@ BO_ 608 STEER_TORQUE_SENSOR: 8 XXX
  SG_ STEER_TORQUE_DRIVER : 15|16@0- (1,0) [-32768|32767] "" XXX
  SG_ STEER_OVERRIDE : 0|1@0+ (1,0) [0|1] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
+ SG_ STEER_ANGLE : 31|16@0- (0.056,0) [-500|500] "" XXX
 
 BO_ 610 EPS_STATUS: 8 EPS
  SG_ IPAS_STATE : 3|4@0+ (1,0) [0|15] "" XXX

opendbc/honda_accord_lx15t_2018_can_generated.dbc

@@ -200,7 +200,8 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ ACC_PROBLEM : 37|1@0+ (1,0) [0|1] "" BDY
  SG_ ACC_ON : 52|1@0+ (1,0) [0|1] "" XXX
  SG_ BOH_6 : 51|4@0+ (1,0) [0|15] "" XXX
- SG_ SET_TO_X3 : 55|2@0+ (1,0) [0|3] "" XXX
+ SG_ IMPERIAL_UNIT : 55|1@0+ (1,0) [0|1] "" XXX
+ SG_ SET_TO_X1 : 56|1@0+ (1,0) [0|1] "" XXX
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" XXX
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|15] "" XXX
 
@@ -265,6 +266,7 @@ BO_ 891 STALK_STATUS_2: 8 XXX
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" EON
 
 VAL_ 399 STEER_STATUS 6 "tmp_fault" 5 "fault_1" 4 "no_torque_alert_2" 3 "low_speed_lockout" 2 "no_torque_alert_1" 0 "normal" ;
+
 CM_ "honda_accord_lx15t_2018_can.dbc starts here"
 
 

opendbc/honda_accord_s2t_2018_can_generated.dbc

@@ -200,7 +200,8 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ ACC_PROBLEM : 37|1@0+ (1,0) [0|1] "" BDY
  SG_ ACC_ON : 52|1@0+ (1,0) [0|1] "" XXX
  SG_ BOH_6 : 51|4@0+ (1,0) [0|15] "" XXX
- SG_ SET_TO_X3 : 55|2@0+ (1,0) [0|3] "" XXX
+ SG_ IMPERIAL_UNIT : 55|1@0+ (1,0) [0|1] "" XXX
+ SG_ SET_TO_X1 : 56|1@0+ (1,0) [0|1] "" XXX
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" XXX
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|15] "" XXX
 
@@ -265,6 +266,7 @@ BO_ 891 STALK_STATUS_2: 8 XXX
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" EON
 
 VAL_ 399 STEER_STATUS 6 "tmp_fault" 5 "fault_1" 4 "no_torque_alert_2" 3 "low_speed_lockout" 2 "no_torque_alert_1" 0 "normal" ;
+
 CM_ "honda_accord_s2t_2018_can.dbc starts here"
 
 

opendbc/honda_civic_hatchback_ex_2017_can_generated.dbc

@@ -200,7 +200,8 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ ACC_PROBLEM : 37|1@0+ (1,0) [0|1] "" BDY
  SG_ ACC_ON : 52|1@0+ (1,0) [0|1] "" XXX
  SG_ BOH_6 : 51|4@0+ (1,0) [0|15] "" XXX
- SG_ SET_TO_X3 : 55|2@0+ (1,0) [0|3] "" XXX
+ SG_ IMPERIAL_UNIT : 55|1@0+ (1,0) [0|1] "" XXX
+ SG_ SET_TO_X1 : 56|1@0+ (1,0) [0|1] "" XXX
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" XXX
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|15] "" XXX
 
@@ -265,6 +266,7 @@ BO_ 891 STALK_STATUS_2: 8 XXX
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" EON
 
 VAL_ 399 STEER_STATUS 6 "tmp_fault" 5 "fault_1" 4 "no_torque_alert_2" 3 "low_speed_lockout" 2 "no_torque_alert_1" 0 "normal" ;
+
 CM_ "honda_civic_hatchback_ex_2017_can.dbc starts here"
 
 

opendbc/honda_civic_touring_2016_can_generated.dbc

@@ -164,14 +164,15 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ FCM_PROBLEM : 34|1@0+ (1,0) [0|1] "" BDY
  SG_ RADAR_OBSTRUCTED : 33|1@0+ (1,0) [0|1] "" BDY
  SG_ ENABLE_MINI_CAR : 32|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03 : 47|2@0+ (1,0) [0|3] "" BDY
+ SG_ HUD_DISTANCE : 47|2@0+ (1,0) [0|3] "" BDY
  SG_ HUD_LEAD : 45|2@0+ (1,0) [0|3] "" BDY
  SG_ BOH_3 : 43|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_4 : 42|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_5 : 41|1@0+ (1,0) [0|3] "" BDY
  SG_ CRUISE_CONTROL_LABEL : 40|1@0+ (1,0) [0|3] "" BDY
  SG_ HUD_DISTANCE_3 : 52|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03_2 : 55|2@0+ (1,0) [0|3] "" BDY
+ SG_ IMPERIAL_UNIT : 54|1@0+ (1,0) [0|1] "" BDY
+ SG_ SET_ME_X01_2 : 55|1@0+ (1,0) [0|1] "" BDY
  SG_ SET_ME_X01 : 48|1@0+ (1,0) [0|1] "" BDY
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" BDY
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" BDY
@@ -288,8 +289,8 @@ BO_ 450 EPB_STATUS: 8 EPB
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" EON
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" EON
 
-BO_ 493 HUD_SETTING: 8 XXX
- SG_ SPEED_UNIT : 5|1@0+ (1,0) [0|1] "" EON
+BO_ 493 HUD_SETTING: 5 XXX
+ SG_ IMPERIAL_UNIT : 5|1@0+ (1,0) [0|1] "" EON
 
 BO_ 487 BRAKE_PRESSURE: 4 VSA
  SG_ BRAKE_PRESSURE1 : 7|10@0+ (0.015625,-103) [0|1000] "" EON
@@ -366,7 +367,6 @@ VAL_ 399 STEER_STATUS 6 "tmp_fault" 5 "fault_1" 4 "no_torque_alert_2" 3 "low_spe
 VAL_ 401 GEAR_SHIFTER 32 "L" 16 "S" 8 "D" 4 "N" 2 "R" 1 "P" ;
 VAL_ 401 GEAR 7 "L" 10 "S" 4 "D" 3 "N" 2 "R" 1 "P" ;
 VAL_ 450 EPB_STATE 3 "engaged" 2 "disengaging" 1 "engaging" 0 "disengaged" ;
-VAL_ 493 SPEED_UNIT 1 "mph" 0 "kph" ;
 VAL_ 545 ECON_ON_2 0 "off" 3 "on" ;
 VAL_ 662 CRUISE_BUTTONS 7 "tbd" 6 "tbd" 5 "tbd" 4 "accel_res" 3 "decel_set" 2 "cancel" 1 "main" 0 "none" ;
 VAL_ 662 CRUISE_SETTING 3 "distance_adj" 2 "tbd" 1 "lkas_button" 0 "none" ;

opendbc/honda_crv_ex_2017_can_generated.dbc

@@ -200,7 +200,8 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ ACC_PROBLEM : 37|1@0+ (1,0) [0|1] "" BDY
  SG_ ACC_ON : 52|1@0+ (1,0) [0|1] "" XXX
  SG_ BOH_6 : 51|4@0+ (1,0) [0|15] "" XXX
- SG_ SET_TO_X3 : 55|2@0+ (1,0) [0|3] "" XXX
+ SG_ IMPERIAL_UNIT : 55|1@0+ (1,0) [0|1] "" XXX
+ SG_ SET_TO_X1 : 56|1@0+ (1,0) [0|1] "" XXX
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" XXX
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|15] "" XXX
 
@@ -265,6 +266,7 @@ BO_ 891 STALK_STATUS_2: 8 XXX
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" EON
 
 VAL_ 399 STEER_STATUS 6 "tmp_fault" 5 "fault_1" 4 "no_torque_alert_2" 3 "low_speed_lockout" 2 "no_torque_alert_1" 0 "normal" ;
+
 CM_ "honda_crv_ex_2017_can.dbc starts here"
 
 

opendbc/honda_crv_hybrid_2019_can_generated.dbc

@@ -200,7 +200,8 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ ACC_PROBLEM : 37|1@0+ (1,0) [0|1] "" BDY
  SG_ ACC_ON : 52|1@0+ (1,0) [0|1] "" XXX
  SG_ BOH_6 : 51|4@0+ (1,0) [0|15] "" XXX
- SG_ SET_TO_X3 : 55|2@0+ (1,0) [0|3] "" XXX
+ SG_ IMPERIAL_UNIT : 55|1@0+ (1,0) [0|1] "" XXX
+ SG_ SET_TO_X1 : 56|1@0+ (1,0) [0|1] "" XXX
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" XXX
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|15] "" XXX
 
@@ -265,6 +266,7 @@ BO_ 891 STALK_STATUS_2: 8 XXX
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" EON
 
 VAL_ 399 STEER_STATUS 6 "tmp_fault" 5 "fault_1" 4 "no_torque_alert_2" 3 "low_speed_lockout" 2 "no_torque_alert_1" 0 "normal" ;
+
 CM_ "honda_crv_hybrid_2019_can.dbc starts here"
 
 

opendbc/honda_crv_touring_2016_can_generated.dbc

@@ -164,14 +164,15 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ FCM_PROBLEM : 34|1@0+ (1,0) [0|1] "" BDY
  SG_ RADAR_OBSTRUCTED : 33|1@0+ (1,0) [0|1] "" BDY
  SG_ ENABLE_MINI_CAR : 32|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03 : 47|2@0+ (1,0) [0|3] "" BDY
+ SG_ HUD_DISTANCE : 47|2@0+ (1,0) [0|3] "" BDY
  SG_ HUD_LEAD : 45|2@0+ (1,0) [0|3] "" BDY
  SG_ BOH_3 : 43|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_4 : 42|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_5 : 41|1@0+ (1,0) [0|3] "" BDY
  SG_ CRUISE_CONTROL_LABEL : 40|1@0+ (1,0) [0|3] "" BDY
  SG_ HUD_DISTANCE_3 : 52|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03_2 : 55|2@0+ (1,0) [0|3] "" BDY
+ SG_ IMPERIAL_UNIT : 54|1@0+ (1,0) [0|1] "" BDY
+ SG_ SET_ME_X01_2 : 55|1@0+ (1,0) [0|1] "" BDY
  SG_ SET_ME_X01 : 48|1@0+ (1,0) [0|1] "" BDY
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" BDY
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" BDY

opendbc/honda_fit_ex_2018_can_generated.dbc

@@ -164,14 +164,15 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ FCM_PROBLEM : 34|1@0+ (1,0) [0|1] "" BDY
  SG_ RADAR_OBSTRUCTED : 33|1@0+ (1,0) [0|1] "" BDY
  SG_ ENABLE_MINI_CAR : 32|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03 : 47|2@0+ (1,0) [0|3] "" BDY
+ SG_ HUD_DISTANCE : 47|2@0+ (1,0) [0|3] "" BDY
  SG_ HUD_LEAD : 45|2@0+ (1,0) [0|3] "" BDY
  SG_ BOH_3 : 43|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_4 : 42|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_5 : 41|1@0+ (1,0) [0|3] "" BDY
  SG_ CRUISE_CONTROL_LABEL : 40|1@0+ (1,0) [0|3] "" BDY
  SG_ HUD_DISTANCE_3 : 52|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03_2 : 55|2@0+ (1,0) [0|3] "" BDY
+ SG_ IMPERIAL_UNIT : 54|1@0+ (1,0) [0|1] "" BDY
+ SG_ SET_ME_X01_2 : 55|1@0+ (1,0) [0|1] "" BDY
  SG_ SET_ME_X01 : 48|1@0+ (1,0) [0|1] "" BDY
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" BDY
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" BDY

opendbc/honda_insight_ex_2019_can_generated.dbc

@@ -200,7 +200,8 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ ACC_PROBLEM : 37|1@0+ (1,0) [0|1] "" BDY
  SG_ ACC_ON : 52|1@0+ (1,0) [0|1] "" XXX
  SG_ BOH_6 : 51|4@0+ (1,0) [0|15] "" XXX
- SG_ SET_TO_X3 : 55|2@0+ (1,0) [0|3] "" XXX
+ SG_ IMPERIAL_UNIT : 55|1@0+ (1,0) [0|1] "" XXX
+ SG_ SET_TO_X1 : 56|1@0+ (1,0) [0|1] "" XXX
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" XXX
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|15] "" XXX
 
@@ -265,6 +266,7 @@ BO_ 891 STALK_STATUS_2: 8 XXX
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" EON
 
 VAL_ 399 STEER_STATUS 6 "tmp_fault" 5 "fault_1" 4 "no_torque_alert_2" 3 "low_speed_lockout" 2 "no_torque_alert_1" 0 "normal" ;
+
 CM_ "honda_insight_ex_2019_can.dbc starts here"
 
 

opendbc/honda_odyssey_exl_2018_generated.dbc

@@ -164,14 +164,15 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ FCM_PROBLEM : 34|1@0+ (1,0) [0|1] "" BDY
  SG_ RADAR_OBSTRUCTED : 33|1@0+ (1,0) [0|1] "" BDY
  SG_ ENABLE_MINI_CAR : 32|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03 : 47|2@0+ (1,0) [0|3] "" BDY
+ SG_ HUD_DISTANCE : 47|2@0+ (1,0) [0|3] "" BDY
  SG_ HUD_LEAD : 45|2@0+ (1,0) [0|3] "" BDY
  SG_ BOH_3 : 43|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_4 : 42|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_5 : 41|1@0+ (1,0) [0|3] "" BDY
  SG_ CRUISE_CONTROL_LABEL : 40|1@0+ (1,0) [0|3] "" BDY
  SG_ HUD_DISTANCE_3 : 52|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03_2 : 55|2@0+ (1,0) [0|3] "" BDY
+ SG_ IMPERIAL_UNIT : 54|1@0+ (1,0) [0|1] "" BDY
+ SG_ SET_ME_X01_2 : 55|1@0+ (1,0) [0|1] "" BDY
  SG_ SET_ME_X01 : 48|1@0+ (1,0) [0|1] "" BDY
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" BDY
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" BDY

opendbc/honda_odyssey_extreme_edition_2018_china_can.dbc

@@ -150,14 +150,15 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ FCM_PROBLEM : 34|1@0+ (1,0) [0|1] "" BDY
  SG_ RADAR_OBSTRUCTED : 33|1@0+ (1,0) [0|1] "" BDY
  SG_ ENABLE_MINI_CAR : 32|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03 : 47|2@0+ (1,0) [0|3] "" BDY
+ SG_ HUD_DISTANCE : 47|2@0+ (1,0) [0|3] "" BDY
  SG_ HUD_LEAD : 45|2@0+ (1,0) [0|3] "" BDY
  SG_ BOH_3 : 43|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_4 : 42|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_5 : 41|1@0+ (1,0) [0|3] "" BDY
  SG_ CRUISE_CONTROL_LABEL : 40|1@0+ (1,0) [0|3] "" BDY
  SG_ HUD_DISTANCE_3 : 52|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03_2 : 55|2@0+ (1,0) [0|3] "" BDY
+ SG_ IMPERIAL_UNIT : 54|1@0+ (1,0) [0|1] "" BDY
+ SG_ SET_ME_X01_2 : 55|1@0+ (1,0) [0|1] "" BDY
  SG_ SET_ME_X01 : 48|1@0+ (1,0) [0|1] "" BDY
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" BDY
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" BDY

opendbc/honda_pilot_touring_2017_can_generated.dbc

@@ -164,14 +164,15 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ FCM_PROBLEM : 34|1@0+ (1,0) [0|1] "" BDY
  SG_ RADAR_OBSTRUCTED : 33|1@0+ (1,0) [0|1] "" BDY
  SG_ ENABLE_MINI_CAR : 32|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03 : 47|2@0+ (1,0) [0|3] "" BDY
+ SG_ HUD_DISTANCE : 47|2@0+ (1,0) [0|3] "" BDY
  SG_ HUD_LEAD : 45|2@0+ (1,0) [0|3] "" BDY
  SG_ BOH_3 : 43|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_4 : 42|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_5 : 41|1@0+ (1,0) [0|3] "" BDY
  SG_ CRUISE_CONTROL_LABEL : 40|1@0+ (1,0) [0|3] "" BDY
  SG_ HUD_DISTANCE_3 : 52|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03_2 : 55|2@0+ (1,0) [0|3] "" BDY
+ SG_ IMPERIAL_UNIT : 54|1@0+ (1,0) [0|1] "" BDY
+ SG_ SET_ME_X01_2 : 55|1@0+ (1,0) [0|1] "" BDY
  SG_ SET_ME_X01 : 48|1@0+ (1,0) [0|1] "" BDY
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" BDY
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" BDY

opendbc/honda_ridgeline_black_edition_2017_can_generated.dbc

@@ -164,14 +164,15 @@ BO_ 780 ACC_HUD: 8 ADAS
  SG_ FCM_PROBLEM : 34|1@0+ (1,0) [0|1] "" BDY
  SG_ RADAR_OBSTRUCTED : 33|1@0+ (1,0) [0|1] "" BDY
  SG_ ENABLE_MINI_CAR : 32|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03 : 47|2@0+ (1,0) [0|3] "" BDY
+ SG_ HUD_DISTANCE : 47|2@0+ (1,0) [0|3] "" BDY
  SG_ HUD_LEAD : 45|2@0+ (1,0) [0|3] "" BDY
  SG_ BOH_3 : 43|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_4 : 42|1@0+ (1,0) [0|3] "" BDY
  SG_ BOH_5 : 41|1@0+ (1,0) [0|3] "" BDY
  SG_ CRUISE_CONTROL_LABEL : 40|1@0+ (1,0) [0|3] "" BDY
  SG_ HUD_DISTANCE_3 : 52|1@0+ (1,0) [0|1] "" BDY
- SG_ SET_ME_X03_2 : 55|2@0+ (1,0) [0|3] "" BDY
+ SG_ IMPERIAL_UNIT : 54|1@0+ (1,0) [0|1] "" BDY
+ SG_ SET_ME_X01_2 : 55|1@0+ (1,0) [0|1] "" BDY
  SG_ SET_ME_X01 : 48|1@0+ (1,0) [0|1] "" BDY
  SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" BDY
  SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" BDY

opendbc/lexus_gs300h_2017_pt_generated.dbc

@@ -125,7 +125,7 @@ BO_ 614 STEERING_IPAS: 8 IPAS
  SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
  SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
  SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
 
 BO_ 643 PRE_COLLISION: 8 XXX

opendbc/lexus_is_2018_pt_generated.dbc

@@ -125,7 +125,7 @@ BO_ 614 STEERING_IPAS: 8 IPAS
  SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
  SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
  SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
 
 BO_ 643 PRE_COLLISION: 8 XXX

opendbc/lexus_is_hybrid_2017_pt_generated.dbc

@@ -125,7 +125,7 @@ BO_ 614 STEERING_IPAS: 8 IPAS
  SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
  SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
  SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
 
 BO_ 643 PRE_COLLISION: 8 XXX

opendbc/lexus_rx_350_2016_pt_generated.dbc

@@ -0,0 +1,335 @@
+CM_ "AUTOGENERATED FILE, DO NOT EDIT"
+
+
+CM_ "Imported file _comma.dbc starts here"
+BO_ 359 STEERING_IPAS_COMMA: 8 IPAS
+ SG_ STATE : 7|4@0+ (1,0) [0|15] "" XXX
+ SG_ ANGLE : 3|12@0- (1.5,0) [-510|510] "deg" XXX
+ SG_ SET_ME_X10 : 23|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
+ SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
+ SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
+
+CM BO_ STEERING_IPAS_COMMA "Copy of msg 614 so we can do angle control while the Park Assist ECU is connected (Panda spoofs 614 with 359 on connector J70). Note that addresses 0x266 and 0x167 are checksum-invariant";
+
+ BO_ 512 GAS_COMMAND: 6 EON
+  SG_ GAS_COMMAND : 7|16@0+ (0.159375,-75.555) [0|1] "" INTERCEPTOR
+  SG_ GAS_COMMAND2 : 23|16@0+ (0.159375,-151.111) [0|1] "" INTERCEPTOR
+  SG_ ENABLE : 39|1@0+ (1,0) [0|1] "" INTERCEPTOR
+  SG_ COUNTER_PEDAL : 35|4@0+ (1,0) [0|15] "" INTERCEPTOR
+  SG_ CHECKSUM_PEDAL : 47|8@0+ (1,0) [0|255] "" INTERCEPTOR
+
+ BO_ 513 GAS_SENSOR: 6 INTERCEPTOR
+  SG_ INTERCEPTOR_GAS : 7|16@0+ (0.159375,-75.555) [0|1] "" EON
+  SG_ INTERCEPTOR_GAS2 : 23|16@0+ (0.159375,-151.111) [0|1] "" EON
+  SG_ STATE : 39|4@0+ (1,0) [0|15] "" EON
+  SG_ COUNTER_PEDAL : 35|4@0+ (1,0) [0|15] "" EON
+  SG_ CHECKSUM_PEDAL : 47|8@0+ (1,0) [0|255] "" EON
+
+ VAL_ 513 STATE 5 "FAULT_TIMEOUT" 4 "FAULT_STARTUP" 3 "FAULT_SCE" 2 "FAULT_SEND" 1 "FAULT_BAD_CHECKSUM" 0 "NO_FAULT" ;
+
+
+CM_ "Imported file _toyota_2017.dbc starts here"
+VERSION ""
+
+
+NS_ :
+    NS_DESC_
+    CM_
+    BA_DEF_
+    BA_
+    VAL_
+    CAT_DEF_
+    CAT_
+    FILTER
+    BA_DEF_DEF_
+    EV_DATA_
+    ENVVAR_DATA_
+    SGTYPE_
+    SGTYPE_VAL_
+    BA_DEF_SGTYPE_
+    BA_SGTYPE_
+    SIG_TYPE_REF_
+    VAL_TABLE_
+    SIG_GROUP_
+    SIG_VALTYPE_
+    SIGTYPE_VALTYPE_
+    BO_TX_BU_
+    BA_DEF_REL_
+    BA_REL_
+    BA_DEF_DEF_REL_
+    BU_SG_REL_
+    BU_EV_REL_
+    BU_BO_REL_
+    SG_MUL_VAL_
+
+BS_:
+
+BU_: XXX DSU HCU EPS IPAS
+
+BO_ 36 KINEMATICS: 8 XXX
+ SG_ ACCEL_Y : 33|10@0+ (1,-512) [0|65535] "" XXX
+ SG_ YAW_RATE : 1|10@0+ (1,-512) [0|65535] "" XXX
+ SG_ STEERING_TORQUE : 17|10@0+ (1,-512) [0|65535] "" XXX
+
+BO_ 37 STEER_ANGLE_SENSOR: 8 XXX
+ SG_ STEER_ANGLE : 3|12@0- (1.5,0) [-500|500] "deg" XXX
+ SG_ STEER_FRACTION : 39|4@0- (0.1,0) [-0.7|0.7] "deg" XXX
+ SG_ STEER_RATE : 35|12@0- (1,0) [-2000|2000] "deg/s" XXX
+
+BO_ 166 BRAKE: 8 XXX
+ SG_ BRAKE_AMOUNT : 7|8@0+ (1,0) [0|255] "" XXX
+ SG_ BRAKE_PEDAL : 23|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 170 WHEEL_SPEEDS: 8 XXX
+ SG_ WHEEL_SPEED_FR : 7|16@0+ (0.01,-67.67) [0|250] "kph" XXX
+ SG_ WHEEL_SPEED_FL : 23|16@0+ (0.01,-67.67) [0|250] "kph" XXX
+ SG_ WHEEL_SPEED_RR : 39|16@0+ (0.01,-67.67) [0|250] "kph" XXX
+ SG_ WHEEL_SPEED_RL : 55|16@0+ (0.01,-67.67) [0|250] "kph" XXX
+
+BO_ 180 SPEED: 8 XXX
+ SG_ ENCODER : 39|8@0+ (1,0) [0|255] "" XXX
+ SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
+ SG_ SPEED : 47|16@0+ (0.01,0) [0|250] "kph" XXX
+
+BO_ 353 DSU_SPEED: 8 XXX
+ SG_ FORWARD_SPEED : 15|16@0- (0.00390625,-30) [0|255] "kph" XXX
+
+BO_ 466 PCM_CRUISE: 8 XXX
+ SG_ GAS_RELEASED : 4|1@0+ (1,0) [0|1] "" XXX
+ SG_ CRUISE_ACTIVE : 5|1@0+ (1,0) [0|1] "" XXX
+ SG_ STANDSTILL_ON : 12|1@0+ (1,0) [0|1] "" XXX
+ SG_ ACCEL_NET : 23|16@0- (0.001,0) [-20|20] "m/s2" XXX
+ SG_ CRUISE_STATE : 55|4@0+ (1,0) [0|15] "" XXX
+ SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 467 PCM_CRUISE_2: 8 XXX
+ SG_ MAIN_ON : 15|1@0+ (1,0) [0|1] "" XXX
+ SG_ LOW_SPEED_LOCKOUT : 14|2@0+ (1,0) [0|3] "kph" XXX
+ SG_ SET_SPEED : 23|8@0+ (1,0) [0|255] "kph" XXX
+ SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 552 ACCELEROMETER: 8 XXX
+ SG_ ACCEL_Z : 22|15@0- (1,0) [0|32767] "" XXX
+ SG_ ACCEL_X : 6|15@0- (0.001,0) [-20|20] "m/s2" XXX
+
+BO_ 560 BRAKE_MODULE2: 7 XXX
+ SG_ BRAKE_PRESSED : 26|1@0+ (1,0) [0|1] "" XXX
+
+BO_ 614 STEERING_IPAS: 8 IPAS
+ SG_ STATE : 7|4@0+ (1,0) [0|15] "" XXX
+ SG_ ANGLE : 3|12@0- (1.5,0) [-510|510] "deg" XXX
+ SG_ SET_ME_X10 : 23|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
+ SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
+ SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 643 PRE_COLLISION: 8 XXX
+
+BO_ 740 STEERING_LKA: 5 XXX
+ SG_ LKA_STATE : 31|8@0+ (1,0) [0|255] "" XXX
+ SG_ STEER_REQUEST : 0|1@0+ (1,0) [0|1] "" XXX
+ SG_ COUNTER : 6|6@0+ (1,0) [0|63] "" XXX
+ SG_ SET_ME_1 : 7|1@0+ (1,0) [0|1] "" XXX
+ SG_ STEER_TORQUE_CMD : 15|16@0- (1,0) [0|65535] "" XXX
+ SG_ CHECKSUM : 39|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 742 LEAD_INFO: 8 DSU
+ SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" HCU
+ SG_ LEAD_REL_SPEED : 23|12@0- (0.025,0) [-100|100] "m/s" HCU
+ SG_ LEAD_LONG_DIST : 7|13@0+ (0.05,0) [0|300] "m" HCU
+
+BO_ 835 ACC_CONTROL: 8 DSU
+ SG_ ACCEL_CMD : 7|16@0- (0.001,0) [-20|20] "m/s2" HCU
+ SG_ SET_ME_X01 : 23|2@0+ (1,0) [0|3] "" HCU
+ SG_ DISTANCE : 20|1@0+ (1,0) [0|1] "" XXX
+ SG_ MINI_CAR : 21|1@0+ (1,0) [0|1] "" XXX
+ SG_ SET_ME_X3 : 19|4@0+ (1,0) [0|15] "" XXX
+ SG_ SET_ME_1 : 30|1@0+ (1,0) [0|1] "" HCU
+ SG_ RELEASE_STANDSTILL : 31|1@0+ (1,0) [0|1] "" HCU
+ SG_ CANCEL_REQ : 24|1@0+ (1,0) [0|1] "" HCU
+ SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 921 PCM_CRUISE_SM: 8 XXX
+ SG_ MAIN_ON : 4|1@0+ (1,0) [0|1] "" XXX
+ SG_ CRUISE_CONTROL_STATE : 11|4@0+ (1,0) [0|15] "" XXX
+ SG_ DISTANCE_LINES : 14|2@0+ (1,0) [0|3] "" XXX
+ SG_ UI_SET_SPEED : 31|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 951 ESP_CONTROL: 8 ESP
+ SG_ TC_DISABLED : 13|1@0+ (1,0) [0|1] "" XXX
+ SG_ BRAKE_LIGHTS_ACC : 18|1@0+ (1,0) [0|1] "" XXX
+
+BO_ 1041 ACC_HUD: 8 DSU
+ SG_ FCW : 4|1@0+ (1,0) [0|1] "" XXX
+ SG_ SET_ME_X20 : 15|8@0+ (1,0) [0|1] "" XXX
+ SG_ SET_ME_X10 : 39|8@0+ (1,0) [0|1] "" XXX
+ SG_ SET_ME_X80 : 55|8@0+ (1,0) [0|1] "" XXX
+
+BO_ 1042 LKAS_HUD: 8 XXX
+ SG_ BARRIERS : 1|2@0+ (1,0) [0|3] "" XXX
+ SG_ RIGHT_LINE : 3|2@0+ (1,0) [0|3] "" XXX
+ SG_ LEFT_LINE : 5|2@0+ (1,0) [0|3] "" XXX
+ SG_ SET_ME_X01 : 7|2@0+ (1,0) [0|3] "" XXX
+ SG_ SET_ME_X01_2 : 11|2@0+ (1,0) [0|3] "" XXX
+ SG_ LDA_ALERT : 9|2@0+ (1,0) [0|3] "" XXX
+ SG_ TWO_BEEPS : 12|1@0+ (1,0) [0|1] "" XXX
+ SG_ ADJUSTING_CAMERA : 13|1@0+ (1,0) [0|1] "" XXX
+ SG_ LDA_MALFUNCTION : 15|1@0+ (1,0) [0|1] "" XXX
+ SG_ REPEATED_BEEPS : 32|1@0+ (1,0) [0|1] "" XXX
+ SG_ SET_ME_X0C : 23|8@0+ (1,0) [0|1] "" XXX
+ SG_ SET_ME_X2C : 47|8@0+ (1,0) [0|1] "" XXX
+ SG_ SET_ME_X38 : 55|8@0+ (1,0) [0|1] "" XXX
+ SG_ SET_ME_X02 : 63|8@0+ (1,0) [0|1] "" XXX
+
+BO_ 1553 UI_SEETING: 8 XXX
+ SG_ UNITS : 26|2@0+ (1,0) [0|3] "" XXX
+
+BO_ 1556 STEERING_LEVERS: 8 XXX
+ SG_ TURN_SIGNALS : 29|2@0+ (1,0) [0|3] "" XXX
+
+BO_ 1568 SEATS_DOORS: 8 XXX
+ SG_ SEATBELT_DRIVER_UNLATCHED : 62|1@0+ (1,0) [0|1] "" XXX
+ SG_ DOOR_OPEN_FL : 45|1@0+ (1,0) [0|1] "" XXX
+ SG_ DOOR_OPEN_RL : 42|1@0+ (1,0) [0|1] "" XXX
+ SG_ DOOR_OPEN_RR : 43|1@0+ (1,0) [0|1] "" XXX
+ SG_ DOOR_OPEN_FR : 44|1@0+ (1,0) [0|1] "" XXX
+
+BO_ 1570 LIGHT_STALK: 8 SCM
+ SG_ AUTO_HIGH_BEAM : 37|1@0+ (1,0) [0|1] "" XXX
+
+BO_ 1161 RSA1: 8 FCM
+ SG_ TSGN1 : 7|8@0+ (1,0) [0|0] "" XXX
+ SG_ TSGNGRY1 : 12|3@0+ (1,0) [0|0] "" XXX
+ SG_ TSGNHLT1 : 9|2@0+ (1,0) [0|0] "" XXX
+ SG_ SPDVAL1 : 23|8@0+ (1,0) [0|0] "kph" XXX
+ SG_ SPLSGN1 : 31|4@0+ (1,0) [0|0] "" XXX
+ SG_ SPLSGN2 : 27|4@0+ (1,0) [0|0] "" XXX
+ SG_ TSGN2 : 39|8@0+ (1,0) [0|0] "" XXX
+ SG_ TSGNGRY2 : 44|3@0+ (1,0) [0|0] "" XXX
+ SG_ TSGNHLT2 : 41|2@0+ (1,0) [0|0] "" XXX
+ SG_ SPDVAL2 : 55|8@0+ (1,0) [0|0] "" XXX
+ SG_ BZRRQ_P : 63|2@0+ (1,0) [0|0] "" XXX
+ SG_ BZRRQ_A : 61|2@0+ (1,0) [0|0] "" XXX
+ SG_ SYNCID1 : 59|4@0+ (1,0) [0|0] "" XXX
+
+BO_ 1162 RSA2: 8 FCM
+ SG_ TSGN3 : 7|8@0+ (1,0) [0|0] "" XXX
+ SG_ TSGNGRY3 : 12|3@0+ (1,0) [0|0] "" XXX
+ SG_ TSGNHLT3 : 9|2@0+ (1,0) [0|0] "" XXX
+ SG_ SPLSGN3 : 31|4@0+ (1,0) [0|0] "" XXX
+ SG_ SPLSGN4 : 27|4@0+ (1,0) [0|0] "" XXX
+ SG_ TSGN4 : 39|8@0+ (1,0) [0|0] "" XXX
+ SG_ TSGNGRY4 : 44|3@0+ (1,0) [0|0] "" XXX
+ SG_ TSGNHLT4 : 41|2@0+ (1,0) [0|0] "" XXX
+ SG_ DPSGNREQ : 54|1@0+ (1,0) [0|0] "" XXX
+ SG_ SGNNUMP : 53|3@0+ (1,0) [0|0] "" XXX
+ SG_ SGNNUMA : 50|3@0+ (1,0) [0|0] "" XXX
+ SG_ SPDUNT : 63|2@0+ (1,0) [0|0] "" XXX
+ SG_ TSRWMSG : 61|2@0+ (1,0) [0|0] "" XXX
+ SG_ SYNCID2 : 59|4@0+ (1,0) [0|0] "" XXX
+
+BO_ 1163 RSA3: 8 FCM
+ SG_ TSREQPD : 7|1@0+ (1,0) [0|0] "" XXX
+ SG_ TSRMSW : 6|1@0+ (1,0) [0|0] "" XXX
+ SG_ OTSGNNTM : 5|2@0+ (1,0) [0|0] "" XXX
+ SG_ NTLVLSPD : 3|2@0+ (1,0) [0|0] "" XXX
+ SG_ OVSPNTM : 1|2@0+ (1,0) [0|0] "" XXX
+ SG_ OVSPVALL : 11|4@0+ (1,-5) [0|0] "" XXX
+ SG_ OVSPVALM : 19|4@0+ (1,-5) [0|0] "" XXX
+ SG_ OVSPVALH : 27|4@0+ (1,-5) [0|0] "" XXX
+ SG_ TSRSPU : 33|2@0+ (1,0) [0|0] "" XXX
+
+CM_ SG_ 36 ACCEL_Y "unit is tbd";
+CM_ SG_ 36 YAW_RATE "verify";
+CM_ SG_ 36 STEERING_TORQUE "does not seem the steer torque, tbd";
+CM_ SG_ 37 STEER_FRACTION "1/15th of the signal STEER_ANGLE, which is 1.5 deg; note that 0x8 is never set";
+CM_ SG_ 37 STEER_RATE "factor is tbd";
+CM_ SG_ 466 ACCEL_NET "net acceleration produced by the system, given ACCEL_CMD, road grade and other factors";
+CM_ SG_ 467 SET_SPEED "43 kph are shown as 28mph, so conversion isnt perfect";
+CM_ SG_ 467 LOW_SPEED_LOCKOUT "in low speed lockout, system would always disengage below 28mph";
+CM_ SG_ 560 BRAKE_PRESSED "another brake pressed?";
+CM_ SG_ 608 STEER_TORQUE_DRIVER "driver torque";
+CM_ SG_ 608 STEER_OVERRIDE "set when driver torque exceeds a certain value";
+CM_ SG_ 614 ANGLE "set to measured angle when ipas control isn't active";
+CM_ SG_ 921 UI_SET_SPEED "set speed shown in UI with user set unit";
+CM_ SG_ 951 BRAKE_LIGHTS_ACC "brake lights when ACC commands decel";
+CM_ SG_ 1042 SET_ME_1 "unclear what this is, but it's always 1 in drive traces";
+CM_ SG_ 1042 REPEATED_BEEPS "recommended for fcw and other important alerts";
+CM_ SG_ 1161 SPDVAL1 "Numbers 0-199 is displayed, 200-254 displays circle without number and 255 is for no limit.";
+CM_ SG_ 1161 SYNCID1 "counter from 1 to f at 1 Hz";
+CM_ SG_ 1161 SPDVAL2 "conditional speed value 70"
+CM_ SG_ 1162 SGNNUMP "1 if SPDVAL1 is set, otherwise 0";
+CM_ SG_ 1162 SYNCID2 "counter from 1 to f at 1 Hz";
+CM_ SG_ 1163 TSREQPD "always 1";
+CM_ SG_ 1163 TSRMSW "always 1";
+CM_ SG_ 1163 OTSGNNTM "always 3";
+CM_ SG_ 1163 NTLVLSPD "always 3";
+CM_ SG_ 1163 OVSPNTM "always 3";
+CM_ SG_ 1163 OVSPVALL "-5 at start then 2 after 2 seconds";
+CM_ SG_ 1163 OVSPVALM "-5 at start then 5 after 2 seconds";
+CM_ SG_ 1163 OVSPVALH "-5 at start then 10 after 2 seconds";
+CM_ SG_ 1163 TSRSPU "always 1";
+
+VAL_ 466 CRUISE_STATE 8 "active" 7 "standstill" 1 "off";
+VAL_ 467 LOW_SPEED_LOCKOUT 2 "low speed locked" 1 "ok";
+VAL_ 614 STATE 3 "enabled" 1 "disabled";
+VAL_ 614 DIRECTION_CMD 3 "right" 2 "center" 1 "left";
+VAL_ 921 CRUISE_CONTROL_STATE 2 "disabled" 11 "hold" 10 "hold_waiting_user_cmd" 6 "enabled" 5 "faulted";
+VAL_ 1042 LDA_ALERT 3 "hold with continuous beep" 2 "LDA unavailable" 1 "hold" 0 "none";
+VAL_ 1042 BARRIERS 3 "both" 2 "right" 1 "left" 0 "none";
+VAL_ 1042 RIGHT_LINE 3 "orange" 2 "faded" 1 "solid" 0 "none";
+VAL_ 1042 LEFT_LINE 3 "orange" 2 "faded" 1 "solid" 0 "none";
+VAL_ 1553 UNITS 1 "km" 2 "miles";
+VAL_ 1556 TURN_SIGNALS 3 "none" 2 "right" 1 "left";
+VAL_ 1161 TSGN1 1 "speed sign" 0 "none";
+VAL_ 1161 TSGN2 1 "speed sign" 0 "none";
+VAL_ 1161 SPLSGN2 15 "conditional blank" 4 "wet road" 5 "rain" 0 "none";
+VAL_ 1162 TSGN3 0 "none" 1 "speed sign" 2 "0 unlimited" 7 "unlimited" 16 "highway" 17 "no highway" 18 "motorway" 19 "no motorway" 20 "in city" 21 "outside city" 22 "pedestrian area" 23 "no pedestrian area" 65 "no overtaking left" 66 "no overtaking right" 67 "overtaking allowed again" 129 "no entry";
+VAL_ 1162 SPLSGN3 15 "conditional blank" 4 "wet road" 5 "rain" 0 "none";
+
+
+CM_ "CHFFR_METRIC 37 STEER_ANGLE STEER_ANGLE 0.36 180";
+
+CM_ "lexus_rx_350_2016_pt.dbc starts here"
+
+
+
+BO_ 550 BRAKE_MODULE: 8 XXX
+ SG_ BRAKE_PRESSURE : 0|9@0+ (1,0) [0|511] "" XXX
+ SG_ BRAKE_POSITION : 16|9@0+ (1,0) [0|511] "" XXX
+ SG_ BRAKE_PRESSED : 37|1@0+ (1,0) [0|1] "" XXX
+
+BO_ 608 STEER_TORQUE_SENSOR: 8 XXX
+ SG_ STEER_TORQUE_EPS : 47|16@0- (0.73,0) [-20000|20000] "" XXX
+ SG_ STEER_TORQUE_DRIVER : 15|16@0- (1,0) [-32768|32767] "" XXX
+ SG_ STEER_OVERRIDE : 0|1@0+ (1,0) [0|1] "" XXX
+ SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 610 EPS_STATUS: 5 EPS
+ SG_ IPAS_STATE : 3|4@0+ (1,0) [0|15] "" XXX
+ SG_ LKA_STATE : 31|7@0+ (1,0) [0|127] "" XXX
+ SG_ TYPE : 24|1@0+ (1,0) [0|1] "" XXX
+ SG_ CHECKSUM : 39|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 956 GEAR_PACKET: 8 XXX
+ SG_ SPORT_ON : 2|1@0+ (1,0) [0|1] "" XXX
+ SG_ GEAR : 13|6@0+ (1,0) [0|63] "" XXX
+ SG_ ECON_ON : 40|1@0+ (1,0) [0|1] "" XXX
+
+BO_ 705 GAS_PEDAL: 8 XXX
+ SG_ GAS_PEDAL : 55|8@0+ (1,0) [0|255] "" XXX
+
+
+CM_ SG_ 550 BRAKE_PRESSURE "seems prop to pedal force";
+CM_ SG_ 550 BRAKE_POSITION "seems proportional to pedal displacement, unclear the max value of 0x1c8";
+CM_ SG_ 610 TYPE "seems 1 on Corolla, 0 on all others";
+VAL_ 610 IPAS_STATE 5 "override" 3 "enabled" 1 "disabled" ;
+VAL_ 610 LKA_STATE 25 "temporary_fault" 9 "temporary_fault2" 5 "active" 1 "standby" ;
+VAL_ 956 SPORT_ON 0 "off" 1 "on" ;
+VAL_ 956 GEAR 0 "D" 1 "S" 8 "N" 16 "R" 32 "P" ;
+VAL_ 956 ECON_ON 0 "off" 1 "on" ;

opendbc/lexus_rx_hybrid_2017_pt_generated.dbc

@@ -125,7 +125,7 @@ BO_ 614 STEERING_IPAS: 8 IPAS
  SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
  SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
  SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
 
 BO_ 643 PRE_COLLISION: 8 XXX

opendbc/nissan_2017.dbc

@@ -0,0 +1,184 @@
+VERSION ""
+
+
+NS_ :
+    NS_DESC_
+    CM_
+    BA_DEF_
+    BA_
+    VAL_
+    CAT_DEF_
+    CAT_
+    FILTER
+    BA_DEF_DEF_
+    EV_DATA_
+    ENVVAR_DATA_
+    SGTYPE_
+    SGTYPE_VAL_
+    BA_DEF_SGTYPE_
+    BA_SGTYPE_
+    SIG_TYPE_REF_
+    VAL_TABLE_
+    SIG_GROUP_
+    SIG_VALTYPE_
+    SIGTYPE_VALTYPE_
+    BO_TX_BU_
+    BA_DEF_REL_
+    BA_REL_
+    BA_DEF_DEF_REL_
+    BU_SG_REL_
+    BU_EV_REL_
+    BU_BO_REL_
+    SG_MUL_VAL_
+
+BS_:
+
+BU_: XXX
+
+
+BO_ 644 Speed_1: 8 XXX
+ SG_ Speed_FR : 7|16@0+ (0.0118,0) [0|65535] "" XXX
+ SG_ Speed_FL : 23|16@0+ (0.0118,0) [0|65535] "" XXX
+ SG_ Speed_Vehicle : 39|16@0+ (0.0245,0) [0|65535] "" XXX
+
+BO_ 645 WheelspeedRear: 8 XXX
+ SG_ RR : 7|16@0+ (0.00555,0) [0|65535] "KPH" XXX
+ SG_ RL : 23|16@0+ (0.00555,0) [0|65535] "KPH" XXX
+
+BO_ 768 STEER_TORQUE: 8 XXX
+ SG_ STEERING_TOURQUE : 0|7@1+ (1,0) [0|127] "" XXX
+
+BO_ 459 Maybe_RegenBraking: 8 XXX
+
+BO_ 372 Maybe_Gear_Selector: 8 XXX
+ SG_ Counter : 32|4@1+ (1,0) [0|15] "" XXX
+
+BO_ 374 Maybe_Motor_RPM_or_Speed: 8 XXX
+ SG_ Counter : 48|4@1+ (1,0) [0|15] "" XXX
+
+BO_ 460 Maybe_Brake_Related: 8 XXX
+
+BO_ 2 SteeringWheel: 8 XXX
+ SG_ Steering_RateChange : 23|8@0+ (1,0) [0|255] "" XXX
+ SG_ Always_07 : 31|8@0+ (1,0) [0|255] "" XXX
+ SG_ Steering_Angle : 0|16@1- (-0.1,0) [0|65535] "" XXX
+
+BO_ 384 Maybe_PowerInfo: 8 XXX
+ SG_ Unknown_Timer_PowerInfo : 48|4@1+ (1,0) [0|15] "" XXX
+ SG_ EnginePower : 27|12@0- (1,0) [0|1] "" XXX
+ SG_ RequestedAccel : 23|12@0- (1,0) [0|4294967295] "" XXX
+
+BO_ 1107 Lights: 8 XXX
+ SG_ RIGHT_BLINKER : 12|1@0+ (1,0) [0|1] "" XXX
+ SG_ LEFT_BLINKER : 11|1@0+ (1,0) [0|1] "" XXX
+ SG_ _HEADLIGHTS : 5|1@0+ (1,0) [0|1] "" XXX
+
+BO_ 666 WheelspeedFront: 8 XXX
+ SG_ _FL_WHEELSPEED : 39|16@0+ (0.01014,0) [0|65535] "" XXX
+ SG_ FR : 7|16@0+ (0.00555,0) [0|65535] "KPH" XXX
+ SG_ FL : 23|16@0+ (0.00555,0) [0|65535] "KPH" XXX
+
+BO_ 398 NEW_MSG_2: 8 XXX
+
+BO_ 389 NEW_MSG_3: 8 XXX
+ SG_ NEW_SIGNAL_1 : 15|8@0+ (1,0) [0|255] "" XXX
+ SG_ NEW_SIGNAL_2 : 22|6@0+ (1,0) [0|3] "" XXX
+ SG_ NEW_SIGNAL_4 : 47|8@0+ (1,0) [0|255] "" XXX
+ SG_ NEW_SIGNAL_5 : 55|4@0+ (1,0) [0|255] "" XXX
+ SG_ NEW_SIGNAL_6 : 63|8@0+ (1,0) [0|127] "" XXX
+ SG_ COUNTER : 48|4@1+ (1,0) [0|15] "" XXX
+ SG_ NEW_SIGNAL_3 : 30|8@0- (1,0) [0|255] "" XXX
+
+BO_ 397 NEW_MSG_4: 8 XXX
+ SG_ NEW_SIGNAL_1 : 7|16@0+ (1,0) [0|3] "" XXX
+ SG_ NEW_SIGNAL_2 : 23|16@0+ (1,0) [0|32767] "" XXX
+ SG_ NEW_SIGNAL_3 : 39|16@0+ (1,0) [0|65535] "" XXX
+ SG_ NEW_SIGNAL_4 : 55|16@0+ (1,0) [0|31] "" XXX
+
+BO_ 658 NEW_MSG_5: 8 XXX
+ SG_ NEW_SIGNAL_1 : 7|16@0+ (1,0) [0|255] "" XXX
+
+BO_ 855 NEW_MSG_6: 8 XXX
+ SG_ NEW_SIGNAL_1 : 7|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 773 NEW_MSG_7: 8 XXX
+ SG_ NEW_SIGNAL_1 : 39|8@0+ (1,0) [0|255] "" XXX
+ SG_ NEW_SIGNAL_2 : 47|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 851 SPEED_RELATED: 8 XXX
+ SG_ SPEED_RELATED : 7|16@0+ (0.01014,0) [0|65535] "" XXX
+
+BO_ 386 Accelerator: 8 XXX
+ SG_ Accelerator : 38|7@0+ (1,0) [0|127] "" XXX
+
+BO_ 347 ACCELSOMETHING: 8 XXX
+ SG_ PowerMaybe : 9|10@0+ (1,0) [0|1023] "" XXX
+ SG_ ACCELERATOR2 : 6|11@0+ (1,-800) [0|65535] "" XXX
+
+BO_ 346 ANOTHER_ACCEL: 8 XXX
+ SG_ ANOTHERACCEL : 23|10@0+ (1,0) [0|1023] "" XXX
+ SG_ Reverse_ACCEL : 25|10@0+ (1,0) [0|1023] "" XXX
+
+BO_ 348 FULLRANGEACCEL: 8 XXX
+ SG_ AccelFullRange : 47|10@0+ (1,0) [0|1023] "" XXX
+ SG_ Accel : 26|11@0+ (1,0) [0|2047] "" XXX
+ SG_ NEW_SIGNAL_1 : 7|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 566 ANOTHERFULLRANGEACCEL: 8 XXX
+ SG_ ANOTHERFULLRANGEACCEL : 43|8@0+ (1,0) [0|1023] "" XXX
+ SG_ RPMORTORQUE : 31|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 523 Yetyetanotheraccel: 8 XXX
+ SG_ ANOTHERREVERSEACCEL : 37|10@0+ (1,0) [0|1023] "" XXX
+ SG_ yetyetanotheraccel : 31|10@0+ (1,0) [0|255] "" XXX
+
+BO_ 779 ANOTHERRRFULLRANGEACCEL: 8 XXX
+ SG_ ANOTHERRRFULLRANGEACCEL : 47|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 1108 Doors: 8 XXX
+ SG_ DOOR_CLOSED_RR : 40|1@0+ (1,0) [0|1] "" XXX
+ SG_ DOOR_OPEN_RR : 41|1@0+ (1,0) [0|1] "" XXX
+ SG_ DOOR_CLOSED_RL : 42|1@0+ (1,0) [0|1] "" XXX
+ SG_ DOOR_OPEN_RL : 43|1@0+ (1,0) [0|1] "" XXX
+ SG_ DOOR_CLOSED_FL : 44|1@0+ (1,0) [0|1] "" XXX
+ SG_ DOOR_OPEN_FL : 45|1@0+ (1,0) [0|1] "" XXX
+ SG_ DOOR_CLOSED_FR : 46|1@0+ (1,0) [0|3] "" XXX
+ SG_ DOOR_OPEN_FR : 47|1@0+ (1,0) [0|3] "" XXX
+ SG_ BOOT_OPEN : 55|1@0+ (1,0) [0|1] "" XXX
+
+BO_ 403 LKAS_OLD: 8 XXX
+ SG_ Checksum : 63|8@0+ (1,0) [0|255] "" XXX
+ SG_ Angle_2 : 32|13@0+ (1,-4000) [0|63] "" XXX
+ SG_ Counter : 48|4@1+ (1,0) [0|15] "" XXX
+ SG_ Angle_1 : 10|13@0+ (0.12,-480) [0|65535] "" XXX
+ SG_ Steering_Torque : 7|13@0+ (-1,4000) [0|65535] "" XXX
+ SG_ Torque_Command : 29|13@0+ (1,-4000) [0|255] "" XXX
+
+BO_ 412 NEW_MSG_9: 8 XXX
+ SG_ NEW_SIGNAL_1 : 7|16@0+ (1,0) [0|65535] "" XXX
+ SG_ NEW_SIGNAL_3 : 23|16@0+ (1,0) [0|65535] "" XXX
+ SG_ NEW_SIGNAL_2 : 39|8@0+ (1,0) [0|3] "" XXX
+ SG_ NEW_SIGNAL_4 : 47|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 361 LKAS: 8 XXX
+ SG_ NEW_SIGNAL_4 : 39|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_X80 : 47|8@0+ (1,0) [0|255] "" XXX
+ SG_ LKA_Active : 52|1@0+ (1,0) [0|15] "" XXX
+ SG_ CRC : 63|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_0x80_2 : 31|8@0+ (1,0) [0|255] "" XXX
+ SG_ Counter : 51|4@0+ (1,0) [0|15] "" XXX
+ SG_ Des_Angle : 7|18@0+ (-0.01,1310) [0|255] "" XXX
+
+BO_ 438 ProPilot: 8 XXX
+ SG_ NEW_SIGNAL_2 : 11|4@0+ (1,0) [0|255] "" XXX
+ SG_ NEW_SIGNAL_4 : 27|4@0+ (1,0) [0|255] "" XXX
+ SG_ NEW_SIGNAL_8 : 63|8@0+ (1,0) [0|7] "" XXX
+ SG_ Counter : 55|4@0+ (1,0) [0|255] "" XXX
+ SG_ NEW_SIGNAL_6 : 47|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_3 : 32|2@1+ (1,0) [0|15] "" XXX
+ SG_ NEW_SIGNAL_1 : 7|12@0- (1,0) [0|255] "" XXX
+ SG_ NEW_SIGNAL_3 : 23|12@0- (-1,0) [0|255] "" XXX
+ SG_ CRUISE_ON : 36|1@0+ (1,0) [0|255] "" XXX
+ SG_ CRUISE_ACTIVATED : 38|1@0+ (1,0) [0|3] "" XXX
+ SG_ STEER_STATUS : 51|1@1+ (1,0) [0|3] "" XXX
+ 

opendbc/toyota_avalon_2017_pt_generated.dbc

@@ -125,7 +125,7 @@ BO_ 614 STEERING_IPAS: 8 IPAS
  SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
  SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
  SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
 
 BO_ 643 PRE_COLLISION: 8 XXX

opendbc/toyota_camry_hybrid_2018_pt_generated.dbc

@@ -125,7 +125,7 @@ BO_ 614 STEERING_IPAS: 8 IPAS
  SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
  SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
  SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
 
 BO_ 643 PRE_COLLISION: 8 XXX
@@ -314,7 +314,7 @@ BO_ 581 GAS_PEDAL: 8 XXX
  SG_ GAS_PEDAL : 23|8@0+ (0.005,0) [0|1] "" XXX
 
 BO_ 608 STEER_TORQUE_SENSOR: 8 XXX
- SG_ STEER_TORQUE_EPS : 47|16@0- (0.66,0) [-20000|20000] "" XXX
+ SG_ STEER_TORQUE_EPS : 47|16@0- (0.73,0) [-20000|20000] "" XXX
  SG_ STEER_TORQUE_DRIVER : 15|16@0- (1,0) [-32768|32767] "" XXX
  SG_ STEER_OVERRIDE : 0|1@0+ (1,0) [0|1] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX

opendbc/toyota_corolla_2017_pt_generated.dbc

@@ -125,7 +125,7 @@ BO_ 614 STEERING_IPAS: 8 IPAS
  SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
  SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
  SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
 
 BO_ 643 PRE_COLLISION: 8 XXX

opendbc/toyota_highlander_2017_pt_generated.dbc

@@ -125,7 +125,7 @@ BO_ 614 STEERING_IPAS: 8 IPAS
  SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
  SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
  SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
 
 BO_ 643 PRE_COLLISION: 8 XXX

opendbc/toyota_highlander_hybrid_2018_pt_generated.dbc

@@ -125,7 +125,7 @@ BO_ 614 STEERING_IPAS: 8 IPAS
  SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
  SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
  SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
 
 BO_ 643 PRE_COLLISION: 8 XXX

opendbc/toyota_nodsu_hybrid_pt_generated.dbc

@@ -125,7 +125,7 @@ BO_ 614 STEERING_IPAS: 8 IPAS
  SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
  SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
  SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
 
 BO_ 643 PRE_COLLISION: 8 XXX
@@ -295,7 +295,7 @@ VAL_ 1162 SPLSGN3 15 "conditional blank" 4 "wet road" 5 "rain" 0 "none";
 
 CM_ "CHFFR_METRIC 37 STEER_ANGLE STEER_ANGLE 0.36 180";
 
-CM_ "toyota_chr_hybrid_2018_pt.dbc starts here"
+CM_ "toyota_nodsu_hybrid_pt.dbc starts here"
 
 
 
@@ -318,6 +318,7 @@ BO_ 608 STEER_TORQUE_SENSOR: 8 XXX
  SG_ STEER_TORQUE_DRIVER : 15|16@0- (1,0) [-32768|32767] "" XXX
  SG_ STEER_OVERRIDE : 0|1@0+ (1,0) [0|1] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
+ SG_ STEER_ANGLE : 31|16@0- (0.056,0) [-500|500] "" XXX
 
 BO_ 610 EPS_STATUS: 8 EPS
  SG_ IPAS_STATE : 3|4@0+ (1,0) [0|15] "" XXX

opendbc/toyota_nodsu_pt_generated.dbc

@@ -125,7 +125,7 @@ BO_ 614 STEERING_IPAS: 8 IPAS
  SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
  SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
  SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
 
 BO_ 643 PRE_COLLISION: 8 XXX
@@ -295,10 +295,21 @@ VAL_ 1162 SPLSGN3 15 "conditional blank" 4 "wet road" 5 "rain" 0 "none";
 
 CM_ "CHFFR_METRIC 37 STEER_ANGLE STEER_ANGLE 0.36 180";
 
-CM_ "toyota_chr_2018_pt.dbc starts here"
+CM_ "toyota_nodsu_pt.dbc starts here"
 
 
 
+BO_ 401 STEERING_LTA: 8 XXX
+ SG_ COUNTER : 7|8@0+ (1,0) [0|255] "" XXX
+ SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
+ SG_ SETME_X3 : 29|2@0+ (1,0) [0|3] "" XXX
+ SG_ PERCENTAGE : 39|8@0+ (1,0) [0|255] "" XXX
+ SG_ SETME_X64 : 47|8@0+ (1,0) [0|255] "" XXX
+ SG_ ANGLE : 55|8@0- (0.5,0) [0|255] "" XXX
+ SG_ STEER_ANGLE_CMD : 15|16@0- (0.056,0) [-540|540] "" XXX
+ SG_ STEER_REQUEST : 25|1@0+ (1,0) [0|1] "" XXX
+ SG_ BIT : 30|1@0+ (1,0) [0|1] "" XXX
+
 BO_ 550 BRAKE_MODULE: 8 XXX
  SG_ BRAKE_PRESSURE : 0|9@0+ (1,0) [0|511] "" XXX
  SG_ BRAKE_POSITION : 16|9@0+ (1,0) [0|511] "" XXX
@@ -313,6 +324,7 @@ BO_ 608 STEER_TORQUE_SENSOR: 8 XXX
  SG_ STEER_TORQUE_DRIVER : 15|16@0- (1,0) [-32768|32767] "" XXX
  SG_ STEER_OVERRIDE : 0|1@0+ (1,0) [0|1] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
+ SG_ STEER_ANGLE : 31|16@0- (0.056,0) [-500|500] "" XXX
 
 BO_ 610 EPS_STATUS: 8 EPS
  SG_ IPAS_STATE : 3|4@0+ (1,0) [0|15] "" XXX

opendbc/toyota_prius_2017_pt_generated.dbc

@@ -125,7 +125,7 @@ BO_ 614 STEERING_IPAS: 8 IPAS
  SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
  SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
  SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
 
 BO_ 643 PRE_COLLISION: 8 XXX

opendbc/toyota_rav4_2017_pt_generated.dbc

@@ -125,7 +125,7 @@ BO_ 614 STEERING_IPAS: 8 IPAS
  SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
  SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
  SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
 
 BO_ 643 PRE_COLLISION: 8 XXX

opendbc/toyota_rav4_hybrid_2017_pt_generated.dbc

@@ -125,7 +125,7 @@ BO_ 614 STEERING_IPAS: 8 IPAS
  SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
  SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
  SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
 
 BO_ 643 PRE_COLLISION: 8 XXX

opendbc/toyota_sienna_xle_2018_pt_generated.dbc

@@ -125,7 +125,7 @@ BO_ 614 STEERING_IPAS: 8 IPAS
  SG_ SET_ME_X00 : 31|8@0+ (1,0) [0|255] "" XXX
  SG_ DIRECTION_CMD : 38|2@0+ (1,0) [0|3] "" XXX
  SG_ SET_ME_X40 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ SET_ME_X00 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_X00_1 : 55|8@0+ (1,0) [0|255] "" XXX
  SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
 
 BO_ 643 PRE_COLLISION: 8 XXX

panda/.circleci/config.yml

@@ -12,6 +12,34 @@ jobs:
           name: Run safety test
           command: |
             docker run panda_safety /bin/bash -c "cd /panda/tests/safety; ./test.sh"
+
+  misra-c2012:
+    machine:
+      docker_layer_caching: true
+    steps:
+      - checkout
+      - run:
+          name: Build image
+          command: "docker build -t panda_misra -f tests/misra/Dockerfile ."
+      - run:
+          name: Run Misra C 2012 test
+          command: |
+            mkdir /tmp/misra
+            docker run -v /tmp/misra:/tmp/misra panda_misra /bin/bash -c "cd /panda/tests/misra; ./test_misra.sh"
+      - store_artifacts:
+          name: Store cppcheck test output
+          path: /tmp/misra/cppcheck_output.txt
+      - store_artifacts:
+          name: Store misra test output
+          path: /tmp/misra/misra_output.txt
+      - store_artifacts:
+          name: Store cppcheck safety test output
+          path: /tmp/misra/cppcheck_safety_output.txt
+      - store_artifacts:
+          name: Store misra safety test output
+          path: /tmp/misra/misra_safety_output.txt
+
+
   build:
     machine:
       docker_layer_caching: true
@@ -40,18 +68,43 @@ jobs:
           name: Build Pedal STM bootstub image
           command: |
             docker run panda_build /bin/bash -c "cd /panda/board/pedal; make obj/bootstub.bin"
-      - run:
-          name: Build NEO STM image
-          command: |
-            docker run panda_build /bin/bash -c "cd /panda/board; make clean; make -f Makefile.legacy obj/comma.bin"
       - run:
           name: Build ESP image
           command: |
             docker run panda_build /bin/bash -c "cd /panda/boardesp; make user1.bin"
 
+  safety_replay:
+    machine:
+      docker_layer_caching: true
+    steps:
+      - checkout
+      - run:
+          name: Build image
+          command: "docker build -t panda_safety_replay -f tests/safety_replay/Dockerfile ."
+      - run:
+          name: Replay drives
+          command: |
+            docker run panda_safety_replay /bin/bash -c "cd /openpilot/panda/tests/safety_replay; PYTHONPATH=/openpilot ./test_safety_replay.py"
+
+  language_check:
+    machine:
+      docker_layer_caching: true
+    steps:
+      - checkout
+      - run:
+          name: Build image
+          command: "docker build -t language_check -f tests/language/Dockerfile ."
+      - run:
+          name: Check code for bad language
+          command: |
+            docker run language_check /bin/bash -c "cd /panda/tests/language; ./test_language.py"
+
 workflows:
   version: 2
   main:
     jobs:
       - safety
+      - misra-c2012
       - build
+      - safety_replay
+      - language_check

panda/.gitignore

@@ -10,5 +10,6 @@ a.out
 dist/
 pandacan.egg-info/
 board/obj/
-examples/output.csv
-.DS_Store
+examples/output.csv
+.DS_Store
+nosetests.xml

panda/Dockerfile

@@ -59,6 +59,4 @@ USER pandauser
 RUN cd /tmp/panda/boardesp && ./get_sdk_ci.sh
 USER root
 
-COPY ./xx/pandaextra /tmp/pandaextra
-
 ADD ./panda.tar.gz /tmp/panda

panda/Jenkinsfile

@@ -14,42 +14,60 @@ pipeline {
       steps {
         timeout(time: 60, unit: 'MINUTES') {
           script {
-            sh 'git clone --no-checkout --depth 1 git@github.com:commaai/xx.git || true'
-            sh 'cd xx && git fetch origin && git checkout origin/master -- pandaextra && cd ..' // Needed for certs for panda flashing
             sh 'git archive -v -o panda.tar.gz --format=tar.gz HEAD'
             dockerImage = docker.build("${env.DOCKER_IMAGE_TAG}")
           }
         }
       }
     }
-    stage('Test Dev Build') {
+    stage('Test Dev Build (no WIFI)') {
       steps {
-        lock(resource: "Pandas", inversePrecedence: true, quantity:1){
+        lock(resource: "Pandas", inversePrecedence: true, quantity: 1){
           timeout(time: 60, unit: 'MINUTES') {
-            sh "docker run --name ${env.DOCKER_NAME} --privileged --volume /dev/bus/usb:/dev/bus/usb --volume /var/run/dbus:/var/run/dbus --net host ${env.DOCKER_IMAGE_TAG} bash -c 'cd /tmp/panda; ./run_automated_tests.sh '"
+            script {
+              sh "docker run --name ${env.DOCKER_NAME} --privileged --volume /dev/bus/usb:/dev/bus/usb --volume /var/run/dbus:/var/run/dbus --net host ${env.DOCKER_IMAGE_TAG} bash -c 'cd /tmp/panda; SKIPWIFI=1 ./run_automated_tests.sh'"
+              sh "docker cp ${env.DOCKER_NAME}:/tmp/panda/nosetests.xml test_results_dev_nowifi.xml"
+              sh "docker rm ${env.DOCKER_NAME}"
+            }
           }
         }
       }
     }
     stage('Test EON Build') {
       steps {
-        lock(resource: "Pandas", inversePrecedence: true, quantity:1){
+        lock(resource: "Pandas", inversePrecedence: true, quantity: 1){
           timeout(time: 60, unit: 'MINUTES') {
-            sh "docker cp ${env.DOCKER_NAME}:/tmp/panda/nosetests.xml test_results_dev.xml"
-            sh "touch EON && docker cp EON ${env.DOCKER_NAME}:/EON"
-            sh "docker start -a ${env.DOCKER_NAME}"
+            script {
+              sh "docker run --name ${env.DOCKER_NAME} --privileged --volume /dev/bus/usb:/dev/bus/usb --volume /var/run/dbus:/var/run/dbus --net host ${env.DOCKER_IMAGE_TAG} bash -c 'touch /EON; cd /tmp/panda; ./run_automated_tests.sh'"
+              sh "docker cp ${env.DOCKER_NAME}:/tmp/panda/nosetests.xml test_results_eon.xml"
+              sh "docker rm ${env.DOCKER_NAME}"
+            }
+          }
+        }
+      }
+    }
+    stage('Test Dev Build (WIFI)') {
+      steps {
+        lock(resource: "Pandas", inversePrecedence: true, quantity: 1){
+          timeout(time: 60, unit: 'MINUTES') {
+            script {
+              sh "docker run --name ${env.DOCKER_NAME} --privileged --volume /dev/bus/usb:/dev/bus/usb --volume /var/run/dbus:/var/run/dbus --net host ${env.DOCKER_IMAGE_TAG} bash -c 'cd /tmp/panda; ./run_automated_tests.sh'"
+              sh "docker cp ${env.DOCKER_NAME}:/tmp/panda/nosetests.xml test_results_dev.xml"
+              sh "docker rm ${env.DOCKER_NAME}"
+            }
           }
         }
       }
     }
   }
   post {
-    always {
+    failure {
       script {
-        sh "docker cp ${env.DOCKER_NAME}:/tmp/panda/nosetests.xml test_results_EON.xml"
-        sh "docker rm ${env.DOCKER_NAME}"
+        sh "docker rm ${env.DOCKER_NAME} || true"
       }
+    }
+    always {
       junit "test_results*.xml"
     }
   }
-}
+}

panda/VERSION

@@ -1 +1 @@
-v1.2.1
+v1.4.1

panda/board/Makefile

@@ -1,5 +1,5 @@
 PROJ_NAME = panda
-CFLAGS = -g -Wall
+CFLAGS = -g -Wall -Wextra -Wstrict-prototypes -Werror
 
 CFLAGS += -mlittle-endian -mthumb -mcpu=cortex-m4
 CFLAGS += -mhard-float -DSTM32F4 -DSTM32F413xx -mfpu=fpv4-sp-d16 -fsingle-precision-constant

panda/board/Makefile.legacy

@@ -1,9 +0,0 @@
-# :set noet
-PROJ_NAME = comma
-CFLAGS  = -g -Wall
-
-CFLAGS += -mlittle-endian -mthumb -mcpu=cortex-m3
-CFLAGS += -msoft-float -DSTM32F2 -DSTM32F205xx
-STARTUP_FILE = startup_stm32f205xx
-
-include build.mk

panda/board/README.md

@@ -23,12 +23,6 @@ Programming
 make
 ```
 
-**NEO**
-
-```
-make -f Makefile.legacy
-```
-
 Troubleshooting
 ----
 

panda/board/bootstub.c

@@ -12,11 +12,19 @@
   #include "stm32f2xx_hal_gpio_ex.h"
 #endif
 
+// default since there's no serial
+void puts(const char *a) {
+  UNUSED(a);
+}
+
+void puth(unsigned int i) {
+  UNUSED(i);
+}
+
 #include "libc.h"
 #include "provision.h"
 
-#include "drivers/drivers.h"
-
+#include "drivers/clock.h"
 #include "drivers/llgpio.h"
 #include "gpio.h"
 
@@ -24,15 +32,6 @@
 #include "drivers/usb.h"
 //#include "drivers/uart.h"
 
-#ifdef PEDAL
-#define CUSTOM_CAN_INTERRUPTS
-#include "safety.h"
-#include "drivers/can.h"
-#endif
-
-int puts(const char *a) { return 0; }
-void puth(unsigned int i) {}
-
 #include "crypto/rsa.h"
 #include "crypto/sha.h"
 
@@ -40,11 +39,11 @@ void puth(unsigned int i) {}
 
 #include "spi_flasher.h"
 
-void __initialize_hardware_early() {
+void __initialize_hardware_early(void) {
   early();
 }
 
-void fail() {
+void fail(void) {
   soft_flasher_start();
 }
 
@@ -54,7 +53,7 @@ extern void *_app_start[];
 // FIXME: sometimes your panda will fail flashing and will quickly blink a single Green LED
 // BOUNTY: $200 coupon on shop.comma.ai or $100 check.
 
-int main() {
+int main(void) {
   __disable_irq();
   clock_init();
   detect();
@@ -94,7 +93,7 @@ fail:
   return 0;
 good:
   // jump to flash
-  ((void(*)()) _app_start[1])();
+  ((void(*)(void)) _app_start[1])();
   return 0;
 }
 

panda/board/build.mk

@@ -2,12 +2,15 @@ CFLAGS += -I inc -I ../ -nostdlib -fno-builtin -std=gnu11 -Os
 
 CFLAGS += -Tstm32_flash.ld
 
+DFU_UTIL = "dfu-util"
+
 # Compile fast charge (DCP) only not on EON
 ifeq (,$(wildcard /EON))
   BUILDER = DEV
 else
   CFLAGS += "-DEON"
   BUILDER = EON
+  DFU_UTIL = "tools/dfu-util-aarch64"
 endif
 
 CC = arm-none-eabi-gcc
@@ -22,7 +25,6 @@ else
   CFLAGS += "-DALLOW_DEBUG"
 endif
 
-DFU_UTIL = "dfu-util"
 
 DEPDIR = generated_dependencies
 $(shell mkdir -p -m 777 $(DEPDIR) >/dev/null)

panda/board/config.h

@@ -12,29 +12,29 @@
   #include "stm32f2xx.h"
 #endif
 
-#define USB_VID 0xbbaa
+#define USB_VID 0xbbaaU
 
 #ifdef BOOTSTUB
-#define USB_PID 0xddee
+#define USB_PID 0xddeeU
 #else
-#define USB_PID 0xddcc
+#define USB_PID 0xddccU
 #endif
 
 #include <stdbool.h>
 #define NULL ((void*)0)
-#define COMPILE_TIME_ASSERT(pred) switch(0){case 0:case pred:;}
+#define COMPILE_TIME_ASSERT(pred) ((void)sizeof(char[1 - (2 * (!(pred)))]))
 
-#define min(a,b) \
+#define MIN(a,b) \
  ({ __typeof__ (a) _a = (a); \
      __typeof__ (b) _b = (b); \
-   _a < _b ? _a : _b; })
+   (_a < _b) ? _a : _b; })
 
-#define max(a,b) \
+#define MAX(a,b) \
  ({ __typeof__ (a) _a = (a); \
      __typeof__ (b) _b = (b); \
-   _a > _b ? _a : _b; })
+   (_a > _b) ? _a : _b; })
 
-#define MAX_RESP_LEN 0x40
+#define MAX_RESP_LEN 0x40U
 
 #endif
 

panda/board/drivers/adc.h

@@ -8,7 +8,7 @@
 #define ADCCHAN_VOLTAGE 12
 #define ADCCHAN_CURRENT 13
 
-void adc_init() {
+void adc_init(void) {
   // global setup
   ADC->CCR = ADC_CCR_TSVREFE | ADC_CCR_VBATE;
   //ADC1->CR2 = ADC_CR2_ADON | ADC_CR2_EOCS | ADC_CR2_DDS;
@@ -19,7 +19,7 @@ void adc_init() {
   ADC1->SMPR1 = ADC_SMPR1_SMP12 | ADC_SMPR1_SMP13;
 }
 
-uint32_t adc_get(int channel) {
+uint32_t adc_get(unsigned int channel) {
   // includes length
   //ADC1->SQR1 = 0;
 

panda/board/drivers/can.h

@@ -1,10 +1,41 @@
-// IRQs: CAN1_TX, CAN1_RX0, CAN1_SCE, CAN2_TX, CAN2_RX0, CAN2_SCE, CAN3_TX, CAN3_RX0, CAN3_SCE
+// IRQs: CAN1_TX, CAN1_RX0, CAN1_SCE
+//       CAN2_TX, CAN2_RX0, CAN2_SCE
+//       CAN3_TX, CAN3_RX0, CAN3_SCE
+
+typedef struct {
+  volatile uint32_t w_ptr;
+  volatile uint32_t r_ptr;
+  uint32_t fifo_size;
+  CAN_FIFOMailBox_TypeDef *elems;
+} can_ring;
+
+#define CAN_BUS_RET_FLAG 0x80U
+#define CAN_BUS_NUM_MASK 0x7FU
+
+#define BUS_MAX 4U
+
+uint32_t can_send_errs = 0;
+uint32_t can_fwd_errs = 0;
+uint32_t gmlan_send_errs = 0;
+extern int can_live, pending_can_live;
+
+// must reinit after changing these
+extern int can_loopback, can_silent;
+extern uint32_t can_speed[4];
+
+void can_set_forwarding(int from, int to);
+
+void can_init(uint8_t can_number);
+void can_init_all(void);
+void can_send(CAN_FIFOMailBox_TypeDef *to_push, uint8_t bus_number);
+bool can_pop(can_ring *q, CAN_FIFOMailBox_TypeDef *elem);
+
+// end API
+
 #define ALL_CAN_SILENT 0xFF
 #define ALL_CAN_BUT_MAIN_SILENT 0xFE
 #define ALL_CAN_LIVE 0
 
-#include "lline_relay.h"
-
 int can_live = 0, pending_can_live = 0, can_loopback = 0, can_silent = ALL_CAN_SILENT;
 
 // ********************* instantiate queues *********************
@@ -16,30 +47,30 @@ int can_live = 0, pending_can_live = 0, can_loopback = 0, can_silent = ALL_CAN_S
 can_buffer(rx_q, 0x1000)
 can_buffer(tx1_q, 0x100)
 can_buffer(tx2_q, 0x100)
+can_buffer(tx3_q, 0x100)
+can_buffer(txgmlan_q, 0x100)
+can_ring *can_queues[] = {&can_tx1_q, &can_tx2_q, &can_tx3_q, &can_txgmlan_q};
 
-#ifdef PANDA
-  can_buffer(tx3_q, 0x100)
-  can_buffer(txgmlan_q, 0x100)
-  can_ring *can_queues[] = {&can_tx1_q, &can_tx2_q, &can_tx3_q, &can_txgmlan_q};
-#else
-  can_ring *can_queues[] = {&can_tx1_q, &can_tx2_q};
-#endif
-
-#ifdef PANDA
-// Forward declare
-void power_save_reset_timer();
-#endif
+// global CAN stats
+int can_rx_cnt = 0;
+int can_tx_cnt = 0;
+int can_txd_cnt = 0;
+int can_err_cnt = 0;
+int can_overflow_cnt = 0;
 
 // ********************* interrupt safe queue *********************
 
-int can_pop(can_ring *q, CAN_FIFOMailBox_TypeDef *elem) {
-  int ret = 0;
+bool can_pop(can_ring *q, CAN_FIFOMailBox_TypeDef *elem) {
+  bool ret = 0;
 
   enter_critical_section();
   if (q->w_ptr != q->r_ptr) {
     *elem = q->elems[q->r_ptr];
-    if ((q->r_ptr + 1) == q->fifo_size) q->r_ptr = 0;
-    else q->r_ptr += 1;
+    if ((q->r_ptr + 1U) == q->fifo_size) {
+      q->r_ptr = 0;
+    } else {
+      q->r_ptr += 1U;
+    }
     ret = 1;
   }
   exit_critical_section();
@@ -47,20 +78,28 @@ int can_pop(can_ring *q, CAN_FIFOMailBox_TypeDef *elem) {
   return ret;
 }
 
-int can_push(can_ring *q, CAN_FIFOMailBox_TypeDef *elem) {
-  int ret = 0;
+bool can_push(can_ring *q, CAN_FIFOMailBox_TypeDef *elem) {
+  bool ret = false;
   uint32_t next_w_ptr;
 
   enter_critical_section();
-  if ((q->w_ptr + 1) == q->fifo_size) next_w_ptr = 0;
-  else next_w_ptr = q->w_ptr + 1;
+  if ((q->w_ptr + 1U) == q->fifo_size) {
+    next_w_ptr = 0;
+  } else {
+    next_w_ptr = q->w_ptr + 1U;
+  }
   if (next_w_ptr != q->r_ptr) {
     q->elems[q->w_ptr] = *elem;
     q->w_ptr = next_w_ptr;
-    ret = 1;
+    ret = true;
   }
   exit_critical_section();
-  if (ret == 0) puts("can_push failed!\n");
+  if (!ret) {
+    can_overflow_cnt++;
+    #ifdef DEBUG
+      puts("can_push failed!\n");
+    #endif
+  }
   return ret;
 }
 
@@ -80,220 +119,92 @@ void can_clear(can_ring *q) {
 // can_num_lookup: Translates from 'bus number' to 'can number'.
 // can_forwarding: Given a bus num, lookup bus num to forward to. -1 means no forward.
 
-int can_rx_cnt = 0;
-int can_tx_cnt = 0;
-int can_txd_cnt = 0;
-int can_err_cnt = 0;
-
-// NEO:         Bus 1=CAN1   Bus 2=CAN2
 // Panda:       Bus 0=CAN1   Bus 1=CAN2   Bus 2=CAN3
-#ifdef PANDA
-  CAN_TypeDef *cans[] = {CAN1, CAN2, CAN3};
-  uint8_t bus_lookup[] = {0,1,2};
-  uint8_t can_num_lookup[] = {0,1,2,-1};
-  int8_t can_forwarding[] = {-1,-1,-1,-1};
-  uint32_t can_speed[] = {5000, 5000, 5000, 333};
-  bool can_autobaud_enabled[] = {false, false, false, false};
-  #define CAN_MAX 3
-#else
-  CAN_TypeDef *cans[] = {CAN1, CAN2};
-  uint8_t bus_lookup[] = {1,0};
-  uint8_t can_num_lookup[] = {1,0};
-  int8_t can_forwarding[] = {-1,-1};
-  uint32_t can_speed[] = {5000, 5000};
-  bool can_autobaud_enabled[] = {false, false};
-  #define CAN_MAX 2
-#endif
-
-uint32_t can_autobaud_speeds[] = {5000, 2500, 1250, 1000, 10000};
-#define AUTOBAUD_SPEEDS_LEN (sizeof(can_autobaud_speeds) / sizeof(can_autobaud_speeds[0]))
+CAN_TypeDef *cans[] = {CAN1, CAN2, CAN3};
+uint8_t bus_lookup[] = {0,1,2};
+uint8_t can_num_lookup[] = {0,1,2,-1};
+int8_t can_forwarding[] = {-1,-1,-1,-1};
+uint32_t can_speed[] = {5000, 5000, 5000, 333};
+#define CAN_MAX 3
 
 #define CANIF_FROM_CAN_NUM(num) (cans[num])
-#ifdef PANDA
-#define CAN_NUM_FROM_CANIF(CAN) (CAN==CAN1 ? 0 : (CAN==CAN2 ? 1 : 2))
-#define CAN_NAME_FROM_CANIF(CAN) (CAN==CAN1 ? "CAN1" : (CAN==CAN2 ? "CAN2" : "CAN3"))
-#else
-#define CAN_NUM_FROM_CANIF(CAN) (CAN==CAN1 ? 0 : 1)
-#define CAN_NAME_FROM_CANIF(CAN) (CAN==CAN1 ? "CAN1" : "CAN2")
-#endif
+#define CAN_NUM_FROM_CANIF(CAN) ((CAN)==CAN1 ? 0 : ((CAN) == CAN2 ? 1 : 2))
+#define CAN_NAME_FROM_CANIF(CAN) ((CAN)==CAN1 ? "CAN1" : ((CAN) == CAN2 ? "CAN2" : "CAN3"))
 #define BUS_NUM_FROM_CAN_NUM(num) (bus_lookup[num])
 #define CAN_NUM_FROM_BUS_NUM(num) (can_num_lookup[num])
 
-// other option
-/*#define CAN_QUANTA 16
-#define CAN_SEQ1 13
-#define CAN_SEQ2 2*/
-
-// this is needed for 1 mbps support
-#define CAN_QUANTA 8
-#define CAN_SEQ1 6 // roundf(quanta * 0.875f) - 1;
-#define CAN_SEQ2 1 // roundf(quanta * 0.125f);
-
-#define CAN_PCLK 24000
-// 333 = 33.3 kbps
-// 5000 = 500 kbps
-#define can_speed_to_prescaler(x) (CAN_PCLK / CAN_QUANTA * 10 / (x))
-
-void can_autobaud_speed_increment(uint8_t can_number) {
-  uint32_t autobaud_speed = can_autobaud_speeds[0];
-  uint8_t bus_number = BUS_NUM_FROM_CAN_NUM(can_number);
-  for (int i = 0; i < AUTOBAUD_SPEEDS_LEN; i++) {
-    if (can_speed[bus_number] == can_autobaud_speeds[i]) {
-      if (i+1 < AUTOBAUD_SPEEDS_LEN) {
-        autobaud_speed = can_autobaud_speeds[i+1];
-      }
-      break;
-    }
-  }
-  can_speed[bus_number] = autobaud_speed;
-#ifdef DEBUG
-  CAN_TypeDef* CAN = CANIF_FROM_CAN_NUM(can_number);
-  puts(CAN_NAME_FROM_CANIF(CAN));
-  puts(" auto-baud test ");
-  putui(can_speed[bus_number]);
-  puts(" cbps\n");
-#endif
-}
-
 void process_can(uint8_t can_number);
 
 void can_set_speed(uint8_t can_number) {
   CAN_TypeDef *CAN = CANIF_FROM_CAN_NUM(can_number);
   uint8_t bus_number = BUS_NUM_FROM_CAN_NUM(can_number);
 
-  while (true) {
-    // initialization mode
-    CAN->MCR = CAN_MCR_TTCM | CAN_MCR_INRQ;
-    while((CAN->MSR & CAN_MSR_INAK) != CAN_MSR_INAK);
-
-    // set time quanta from defines
-    CAN->BTR = (CAN_BTR_TS1_0 * (CAN_SEQ1-1)) |
-              (CAN_BTR_TS2_0 * (CAN_SEQ2-1)) |
-              (can_speed_to_prescaler(can_speed[bus_number]) - 1);
-
-    // silent loopback mode for debugging
-    if (can_loopback) {
-      CAN->BTR |= CAN_BTR_SILM | CAN_BTR_LBKM;
-    }
-    if (can_silent & (1 << can_number)) {
-      CAN->BTR |= CAN_BTR_SILM;
-    }
-
-    // reset
-    CAN->MCR = CAN_MCR_TTCM | CAN_MCR_ABOM;
-
-    #define CAN_TIMEOUT 1000000
-    int tmp = 0;
-    while((CAN->MSR & CAN_MSR_INAK) == CAN_MSR_INAK && tmp < CAN_TIMEOUT) tmp++;
-    if (tmp < CAN_TIMEOUT) {
-      return;
-    }
-
-    if (can_autobaud_enabled[bus_number]) {
-      can_autobaud_speed_increment(can_number);
-    } else {
-      puts("CAN init FAILED!!!!!\n");
-      puth(can_number); puts(" ");
-      puth(BUS_NUM_FROM_CAN_NUM(can_number)); puts("\n");
-      return;
-    }
+  if (!llcan_set_speed(CAN, can_speed[bus_number], can_loopback, (unsigned int)(can_silent) & (1U << can_number))) {
+    puts("CAN init FAILED!!!!!\n");
+    puth(can_number); puts(" ");
+    puth(BUS_NUM_FROM_CAN_NUM(can_number)); puts("\n");
   }
 }
 
 void can_init(uint8_t can_number) {
-  if (can_number == 0xff) return;
+  if (can_number != 0xffU) {
+    CAN_TypeDef *CAN = CANIF_FROM_CAN_NUM(can_number);
+    set_can_enable(CAN, 1);
+    can_set_speed(can_number);
 
-  CAN_TypeDef *CAN = CANIF_FROM_CAN_NUM(can_number);
-  set_can_enable(CAN, 1);
-  can_set_speed(can_number);
+    llcan_init(CAN);
 
-  // accept all filter
-  CAN->FMR |= CAN_FMR_FINIT;
-
-  // no mask
-  CAN->sFilterRegister[0].FR1 = 0;
-  CAN->sFilterRegister[0].FR2 = 0;
-  CAN->sFilterRegister[14].FR1 = 0;
-  CAN->sFilterRegister[14].FR2 = 0;
-  CAN->FA1R |= 1 | (1 << 14);
-
-  CAN->FMR &= ~(CAN_FMR_FINIT);
-
-  // enable certain CAN interrupts
-  CAN->IER |= CAN_IER_TMEIE | CAN_IER_FMPIE0 |  CAN_IER_WKUIE;
-
-  switch (can_number) {
-    case 0:
-      NVIC_EnableIRQ(CAN1_TX_IRQn);
-      NVIC_EnableIRQ(CAN1_RX0_IRQn);
-      NVIC_EnableIRQ(CAN1_SCE_IRQn);
-      break;
-    case 1:
-      NVIC_EnableIRQ(CAN2_TX_IRQn);
-      NVIC_EnableIRQ(CAN2_RX0_IRQn);
-      NVIC_EnableIRQ(CAN2_SCE_IRQn);
-      break;
-#ifdef CAN3
-    case 2:
-      NVIC_EnableIRQ(CAN3_TX_IRQn);
-      NVIC_EnableIRQ(CAN3_RX0_IRQn);
-      NVIC_EnableIRQ(CAN3_SCE_IRQn);
-      break;
-#endif
+    // in case there are queued up messages
+    process_can(can_number);
   }
-
-  // in case there are queued up messages
-  process_can(can_number);
 }
 
-void can_init_all() {
+void can_init_all(void) {
   for (int i=0; i < CAN_MAX; i++) {
     can_init(i);
   }
 }
 
-void can_set_gmlan(int bus) {
-  #ifdef PANDA
-  if (bus == -1 || bus != can_num_lookup[3]) {
-    // GMLAN OFF
-    switch (can_num_lookup[3]) {
+void can_set_gmlan(uint8_t bus) {
+
+  // first, disable GMLAN on prev bus
+  uint8_t prev_bus = can_num_lookup[3];
+  if (bus != prev_bus) {
+    switch (prev_bus) {
       case 1:
-        puts("disable GMLAN on CAN2\n");
-        set_can_mode(1, 0);
-        bus_lookup[1] = 1;
-        can_num_lookup[1] = 1;
-        can_num_lookup[3] = -1;
-        can_init(1);
-        break;
       case 2:
-        puts("disable GMLAN on CAN3\n");
-        set_can_mode(2, 0);
-        bus_lookup[2] = 2;
-        can_num_lookup[2] = 2;
+        puts("Disable GMLAN on CAN");
+        puth(prev_bus + 1U);
+        puts("\n");
+        set_can_mode(prev_bus, 0);
+        bus_lookup[prev_bus] = prev_bus;
+        can_num_lookup[prev_bus] = prev_bus;
         can_num_lookup[3] = -1;
-        can_init(2);
+        can_init(prev_bus);
+        break;
+      default:
+        // GMLAN was not set on either BUS 1 or 2
         break;
     }
   }
 
-  if (bus == 1) {
-    puts("GMLAN on CAN2\n");
-    // GMLAN on CAN2
-    set_can_mode(1, 1);
-    bus_lookup[1] = 3;
-    can_num_lookup[1] = -1;
-    can_num_lookup[3] = 1;
-    can_init(1);
-  } else if (bus == 2 && revision == PANDA_REV_C) {
-    puts("GMLAN on CAN3\n");
-    // GMLAN on CAN3
-    set_can_mode(2, 1);
-    bus_lookup[2] = 3;
-    can_num_lookup[2] = -1;
-    can_num_lookup[3] = 2;
-    can_init(2);
+  // now enable GMLAN on the new bus
+  switch (bus) {
+    case 1:
+    case 2:
+      puts("Enable GMLAN on CAN");
+      puth(bus + 1U);
+      puts("\n");
+      set_can_mode(bus, 1);
+      bus_lookup[bus] = 3;
+      can_num_lookup[bus] = -1;
+      can_num_lookup[3] = bus;
+      can_init(bus);
+      break;
+    default:
+      puts("GMLAN can only be set on CAN2 or CAN3");
+      break;
   }
-  #endif
 }
 
 // CAN error
@@ -319,125 +230,74 @@ void can_sce(CAN_TypeDef *CAN) {
     puts("\n");
   #endif
 
-  uint8_t can_number = CAN_NUM_FROM_CANIF(CAN);
-  uint8_t bus_number = BUS_NUM_FROM_CAN_NUM(can_number);
-
-  if (CAN->MSR & CAN_MSR_WKUI) {
-    //Waking from sleep
-    #ifdef DEBUG
-      puts("WAKE\n");
-    #endif
-    set_can_enable(CAN, 1);
-    CAN->MSR &= ~(CAN_MSR_WKUI);
-    CAN->MSR = CAN->MSR;
-#ifdef PANDA
-    power_save_reset_timer();
-#endif
-  } else {
-    can_err_cnt += 1;
-
-
-    if (can_autobaud_enabled[bus_number] && (CAN->ESR & CAN_ESR_LEC)) {
-      can_autobaud_speed_increment(can_number);
-      can_set_speed(can_number);
-    }
-
-    // clear current send
-    CAN->TSR |= CAN_TSR_ABRQ0;
-    CAN->MSR &= ~(CAN_MSR_ERRI);
-    CAN->MSR = CAN->MSR;
-  }
+  can_err_cnt += 1;
+  llcan_clear_send(CAN);
   exit_critical_section();
 }
 
 // ***************************** CAN *****************************
 
 void process_can(uint8_t can_number) {
-  if (can_number == 0xff) return;
-#ifdef PANDA
-  power_save_reset_timer();
-#endif
+  if (can_number != 0xffU) {
 
-  enter_critical_section();
+    enter_critical_section();
 
-  CAN_TypeDef *CAN = CANIF_FROM_CAN_NUM(can_number);
-  uint8_t bus_number = BUS_NUM_FROM_CAN_NUM(can_number);
-  #ifdef DEBUG
-    puts("process CAN TX\n");
-  #endif
+    CAN_TypeDef *CAN = CANIF_FROM_CAN_NUM(can_number);
+    uint8_t bus_number = BUS_NUM_FROM_CAN_NUM(can_number);
 
-  // check for empty mailbox
-  CAN_FIFOMailBox_TypeDef to_send;
-  if ((CAN->TSR & CAN_TSR_TME0) == CAN_TSR_TME0) {
-    // add successfully transmitted message to my fifo
-    if ((CAN->TSR & CAN_TSR_RQCP0) == CAN_TSR_RQCP0) {
-      can_txd_cnt += 1;
+    // check for empty mailbox
+    CAN_FIFOMailBox_TypeDef to_send;
+    if ((CAN->TSR & CAN_TSR_TME0) == CAN_TSR_TME0) {
+      // add successfully transmitted message to my fifo
+      if ((CAN->TSR & CAN_TSR_RQCP0) == CAN_TSR_RQCP0) {
+        can_txd_cnt += 1;
 
-      if ((CAN->TSR & CAN_TSR_TXOK0) == CAN_TSR_TXOK0) {
-        CAN_FIFOMailBox_TypeDef to_push;
-        to_push.RIR = CAN->sTxMailBox[0].TIR;
-        to_push.RDTR = (CAN->sTxMailBox[0].TDTR & 0xFFFF000F) | ((CAN_BUS_RET_FLAG | bus_number) << 4);
-        to_push.RDLR = CAN->sTxMailBox[0].TDLR;
-        to_push.RDHR = CAN->sTxMailBox[0].TDHR;
-        can_push(&can_rx_q, &to_push);
+        if ((CAN->TSR & CAN_TSR_TXOK0) == CAN_TSR_TXOK0) {
+          CAN_FIFOMailBox_TypeDef to_push;
+          to_push.RIR = CAN->sTxMailBox[0].TIR;
+          to_push.RDTR = (CAN->sTxMailBox[0].TDTR & 0xFFFF000FU) | ((CAN_BUS_RET_FLAG | bus_number) << 4);
+          to_push.RDLR = CAN->sTxMailBox[0].TDLR;
+          to_push.RDHR = CAN->sTxMailBox[0].TDHR;
+          can_send_errs += !can_push(&can_rx_q, &to_push);
+        }
+
+        if ((CAN->TSR & CAN_TSR_TERR0) == CAN_TSR_TERR0) {
+          #ifdef DEBUG
+            puts("CAN TX ERROR!\n");
+          #endif
+        }
+
+        if ((CAN->TSR & CAN_TSR_ALST0) == CAN_TSR_ALST0) {
+          #ifdef DEBUG
+            puts("CAN TX ARBITRATION LOST!\n");
+          #endif
+        }
+
+        // clear interrupt
+        // careful, this can also be cleared by requesting a transmission
+        CAN->TSR |= CAN_TSR_RQCP0;
       }
 
-      if ((CAN->TSR & CAN_TSR_TERR0) == CAN_TSR_TERR0) {
-        #ifdef DEBUG
-          puts("CAN TX ERROR!\n");
-        #endif
+      if (can_pop(can_queues[bus_number], &to_send)) {
+        can_tx_cnt += 1;
+        // only send if we have received a packet
+        CAN->sTxMailBox[0].TDLR = to_send.RDLR;
+        CAN->sTxMailBox[0].TDHR = to_send.RDHR;
+        CAN->sTxMailBox[0].TDTR = to_send.RDTR;
+        CAN->sTxMailBox[0].TIR = to_send.RIR;
       }
-
-      if ((CAN->TSR & CAN_TSR_ALST0) == CAN_TSR_ALST0) {
-        #ifdef DEBUG
-          puts("CAN TX ARBITRATION LOST!\n");
-        #endif
-      }
-
-      // clear interrupt
-      // careful, this can also be cleared by requesting a transmission
-      CAN->TSR |= CAN_TSR_RQCP0;
     }
 
-    if (can_pop(can_queues[bus_number], &to_send)) {
-      if (CAN->MCR & CAN_MCR_SLEEP) {
-        set_can_enable(CAN, 1);
-        CAN->MCR &= ~(CAN_MCR_SLEEP);
-        CAN->MCR |= CAN_MCR_INRQ;
-        while((CAN->MSR & CAN_MSR_INAK) != CAN_MSR_INAK);
-        CAN->MCR &= ~(CAN_MCR_INRQ);
-      }
-      can_tx_cnt += 1;
-      // only send if we have received a packet
-      CAN->sTxMailBox[0].TDLR = to_send.RDLR;
-      CAN->sTxMailBox[0].TDHR = to_send.RDHR;
-      CAN->sTxMailBox[0].TDTR = to_send.RDTR;
-      CAN->sTxMailBox[0].TIR = to_send.RIR;
-    }
+    exit_critical_section();
   }
-
-  exit_critical_section();
 }
 
 // CAN receive handlers
 // blink blue when we are receiving CAN messages
 void can_rx(uint8_t can_number) {
-  #ifdef PANDA
-    power_save_reset_timer();
-  #endif
   CAN_TypeDef *CAN = CANIF_FROM_CAN_NUM(can_number);
   uint8_t bus_number = BUS_NUM_FROM_CAN_NUM(can_number);
-  while (CAN->RF0R & CAN_RF0R_FMP0) {
-    if (can_autobaud_enabled[bus_number]) {
-      can_autobaud_enabled[bus_number] = false;
-      puts(CAN_NAME_FROM_CANIF(CAN));
-    #ifdef DEBUG
-      puts(" auto-baud ");
-      putui(can_speed[bus_number]);
-      puts(" cbps\n");
-    #endif
-    }
-
+  while ((CAN->RF0R & CAN_RF0R_FMP0) != 0) {
     can_rx_cnt += 1;
 
     // can is live
@@ -454,63 +314,49 @@ void can_rx(uint8_t can_number) {
     to_push.RDTR = (to_push.RDTR & 0xFFFF000F) | (bus_number << 4);
 
     // forwarding (panda only)
-    #ifdef PANDA
-      if ((get_lline_status() != 0) || !relay_control) { //Relay engaged or relay isn't controlled, allow fwd
-        int bus_fwd_num = can_forwarding[bus_number] != -1 ? can_forwarding[bus_number] : safety_fwd_hook(bus_number, &to_push);
-        if (bus_fwd_num != -1) {
-          CAN_FIFOMailBox_TypeDef to_send;
-          to_send.RIR = to_push.RIR | 1; // TXRQ
-          to_send.RDTR = to_push.RDTR;
-          to_send.RDLR = to_push.RDLR;
-          to_send.RDHR = to_push.RDHR;
-          can_send(&to_send, bus_fwd_num);
-        }
-      }
-    #endif
+    int bus_fwd_num = (can_forwarding[bus_number] != -1) ? can_forwarding[bus_number] : safety_fwd_hook(bus_number, &to_push);
+    if (bus_fwd_num != -1) {
+      CAN_FIFOMailBox_TypeDef to_send;
+      to_send.RIR = to_push.RIR | 1; // TXRQ
+      to_send.RDTR = to_push.RDTR;
+      to_send.RDLR = to_push.RDLR;
+      to_send.RDHR = to_push.RDHR;
+      can_send(&to_send, bus_fwd_num);
+    }
 
     safety_rx_hook(&to_push);
 
-    #ifdef PANDA
-      set_led(LED_BLUE, 1);
-    #endif
-    can_push(&can_rx_q, &to_push);
+    set_led(LED_BLUE, 1);
+    can_send_errs += !can_push(&can_rx_q, &to_push);
 
     // next
     CAN->RF0R |= CAN_RF0R_RFOM0;
   }
 }
 
-#ifndef CUSTOM_CAN_INTERRUPTS
+void CAN1_TX_IRQHandler(void) { process_can(0); }
+void CAN1_RX0_IRQHandler(void) { can_rx(0); }
+void CAN1_SCE_IRQHandler(void) { can_sce(CAN1); }
 
-void CAN1_TX_IRQHandler() { process_can(0); }
-void CAN1_RX0_IRQHandler() { can_rx(0); }
-void CAN1_SCE_IRQHandler() { can_sce(CAN1); }
+void CAN2_TX_IRQHandler(void) { process_can(1); }
+void CAN2_RX0_IRQHandler(void) { can_rx(1); }
+void CAN2_SCE_IRQHandler(void) { can_sce(CAN2); }
 
-void CAN2_TX_IRQHandler() { process_can(1); }
-void CAN2_RX0_IRQHandler() { can_rx(1); }
-void CAN2_SCE_IRQHandler() { can_sce(CAN2); }
-
-#ifdef CAN3
-void CAN3_TX_IRQHandler() { process_can(2); }
-void CAN3_RX0_IRQHandler() { can_rx(2); }
-void CAN3_SCE_IRQHandler() { can_sce(CAN3); }
-#endif
-
-#endif
+void CAN3_TX_IRQHandler(void) { process_can(2); }
+void CAN3_RX0_IRQHandler(void) { can_rx(2); }
+void CAN3_SCE_IRQHandler(void) { can_sce(CAN3); }
 
 void can_send(CAN_FIFOMailBox_TypeDef *to_push, uint8_t bus_number) {
-  if (safety_tx_hook(to_push) && !can_autobaud_enabled[bus_number]) {
+  if (safety_tx_hook(to_push) != 0) {
     if (bus_number < BUS_MAX) {
       // add CAN packet to send queue
       // bus number isn't passed through
       to_push->RDTR &= 0xF;
-      if (bus_number == 3 && can_num_lookup[3] == 0xFF) {
-        #ifdef PANDA
+      if ((bus_number == 3U) && (can_num_lookup[3] == 0xFFU)) {
         // TODO: why uint8 bro? only int8?
-        bitbang_gmlan(to_push);
-        #endif
+        gmlan_send_errs += !bitbang_gmlan(to_push);
       } else {
-        can_push(can_queues[bus_number], to_push);
+        can_fwd_errs += !can_push(can_queues[bus_number], to_push);
         process_can(CAN_NUM_FROM_BUS_NUM(bus_number));
       }
     }
@@ -520,3 +366,4 @@ void can_send(CAN_FIFOMailBox_TypeDef *to_push, uint8_t bus_number) {
 void can_set_forwarding(int from, int to) {
   can_forwarding[from] = to;
 }
+

panda/board/drivers/clock.h

@@ -0,0 +1,40 @@
+void clock_init(void) {
+  // enable external oscillator
+  RCC->CR |= RCC_CR_HSEON;
+  while ((RCC->CR & RCC_CR_HSERDY) == 0);
+
+  // divide things
+  RCC->CFGR = RCC_CFGR_HPRE_DIV1 | RCC_CFGR_PPRE2_DIV2 | RCC_CFGR_PPRE1_DIV4;
+
+  // 16mhz crystal
+  RCC->PLLCFGR = RCC_PLLCFGR_PLLQ_2 | RCC_PLLCFGR_PLLM_3 |
+                 RCC_PLLCFGR_PLLN_6 | RCC_PLLCFGR_PLLN_5 | RCC_PLLCFGR_PLLSRC_HSE;
+
+  // start PLL
+  RCC->CR |= RCC_CR_PLLON;
+  while ((RCC->CR & RCC_CR_PLLRDY) == 0);
+
+  // Configure Flash prefetch, Instruction cache, Data cache and wait state
+  // *** without this, it breaks ***
+  FLASH->ACR = FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_5WS;
+
+  // switch to PLL
+  RCC->CFGR |= RCC_CFGR_SW_PLL;
+  while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL);
+
+  // *** running on PLL ***
+}
+
+void watchdog_init(void) {
+  // setup watchdog
+  IWDG->KR = 0x5555;
+  IWDG->PR = 0;          // divider /4
+  // 0 = 0.125 ms, let's have a 50ms watchdog
+  IWDG->RLR = 400 - 1;
+  IWDG->KR = 0xCCCC;
+}
+
+void watchdog_feed(void) {
+  IWDG->KR = 0xAAAA;
+}
+

panda/board/drivers/dac.h

@@ -1,4 +1,7 @@
-void dac_init() {
+void puth(unsigned int i);
+void puts(const char *a);
+
+void dac_init(void) {
   // no buffers required since we have an opamp
   //DAC->CR = DAC_CR_EN1 | DAC_CR_BOFF1 | DAC_CR_EN2 | DAC_CR_BOFF2;
   DAC->DHR12R1 = 0;
@@ -11,6 +14,10 @@ void dac_set(int channel, uint32_t value) {
     DAC->DHR12R1 = value;
   } else if (channel == 1) {
     DAC->DHR12R2 = value;
+  } else {
+    puts("Failed to set DAC: invalid channel value: ");
+    puth(value);
+    puts("\n");
   }
 }
 

panda/board/drivers/drivers.h

@@ -1,141 +0,0 @@
-#ifndef PANDA_DRIVERS_H
-#define PANDA_DRIVERS_H
-
-// ********************* LLGPIO *********************
-
-#define MODE_INPUT 0
-#define MODE_OUTPUT 1
-#define MODE_ALTERNATE 2
-#define MODE_ANALOG 3
-
-#define PULL_NONE 0
-#define PULL_UP 1
-#define PULL_DOWN 2
-
-void set_gpio_mode(GPIO_TypeDef *GPIO, int pin, int mode);
-void set_gpio_output(GPIO_TypeDef *GPIO, int pin, int val);
-void set_gpio_alternate(GPIO_TypeDef *GPIO, int pin, int mode);
-void set_gpio_pullup(GPIO_TypeDef *GPIO, int pin, int mode);
-
-int get_gpio_input(GPIO_TypeDef *GPIO, int pin);
-
-
-// ********************* USB *********************
-// IRQs: OTG_FS
-
-typedef union {
-  uint16_t w;
-  struct BW {
-    uint8_t msb;
-    uint8_t lsb;
-  }
-  bw;
-}
-uint16_t_uint8_t;
-
-typedef union _USB_Setup {
-  uint32_t d8[2];
-  struct _SetupPkt_Struc
-  {
-    uint8_t           bmRequestType;
-    uint8_t           bRequest;
-    uint16_t_uint8_t  wValue;
-    uint16_t_uint8_t  wIndex;
-    uint16_t_uint8_t  wLength;
-  } b;
-}
-USB_Setup_TypeDef;
-
-void usb_init();
-int usb_cb_control_msg(USB_Setup_TypeDef *setup, uint8_t *resp, int hardwired);
-int usb_cb_ep1_in(uint8_t *usbdata, int len, int hardwired);
-void usb_cb_ep2_out(uint8_t *usbdata, int len, int hardwired);
-void usb_cb_ep3_out(uint8_t *usbdata, int len, int hardwired);
-void usb_cb_enumeration_complete();
-
-
-// ********************* UART *********************
-// IRQs: USART1, USART2, USART3, UART5
-
-#define FIFO_SIZE 0x400
-typedef struct uart_ring {
-  uint16_t w_ptr_tx;
-  uint16_t r_ptr_tx;
-  uint8_t elems_tx[FIFO_SIZE];
-  uint16_t w_ptr_rx;
-  uint16_t r_ptr_rx;
-  uint8_t elems_rx[FIFO_SIZE];
-  USART_TypeDef *uart;
-  void (*callback)(struct uart_ring*);
-} uart_ring;
-
-void uart_init(USART_TypeDef *u, int baud);
-
-int getc(uart_ring *q, char *elem);
-int putc(uart_ring *q, char elem);
-
-int puts(const char *a);
-void puth(unsigned int i);
-void hexdump(const void *a, int l);
-
-
-// ********************* ADC *********************
-
-void adc_init();
-uint32_t adc_get(int channel);
-
-
-// ********************* DAC *********************
-
-void dac_init();
-void dac_set(int channel, uint32_t value);
-
-
-// ********************* TIMER *********************
-
-void timer_init(TIM_TypeDef *TIM, int psc);
-
-
-// ********************* SPI *********************
-// IRQs: DMA2_Stream2, DMA2_Stream3, EXTI4
-
-void spi_init();
-int spi_cb_rx(uint8_t *data, int len, uint8_t *data_out);
-
-
-// ********************* CAN *********************
-// IRQs: CAN1_TX, CAN1_RX0, CAN1_SCE
-//       CAN2_TX, CAN2_RX0, CAN2_SCE
-//       CAN3_TX, CAN3_RX0, CAN3_SCE
-
-typedef struct {
-  uint32_t w_ptr;
-  uint32_t r_ptr;
-  uint32_t fifo_size;
-  CAN_FIFOMailBox_TypeDef *elems;
-} can_ring;
-
-#define CAN_BUS_RET_FLAG 0x80
-#define CAN_BUS_NUM_MASK 0x7F
-
-#ifdef PANDA
-  #define BUS_MAX 4
-#else
-  #define BUS_MAX 2
-#endif
-
-extern int can_live, pending_can_live;
-
-// must reinit after changing these
-extern int can_loopback, can_silent;
-extern uint32_t can_speed[];
-
-void can_set_forwarding(int from, int to);
-
-void can_init(uint8_t can_number);
-void can_init_all();
-void can_send(CAN_FIFOMailBox_TypeDef *to_push, uint8_t bus_number);
-int can_pop(can_ring *q, CAN_FIFOMailBox_TypeDef *elem);
-
-#endif
-

panda/board/drivers/gmlan_alt.h

@@ -9,7 +9,7 @@
 
 #define MAX_BITS_CAN_PACKET (200)
 
-int gmlan_alt_mode = DISABLED; 
+int gmlan_alt_mode = DISABLED;
 
 // returns out_len
 int do_bitstuff(char *out, char *in, int in_len) {
@@ -18,7 +18,8 @@ int do_bitstuff(char *out, char *in, int in_len) {
   int j = 0;
   for (int i = 0; i < in_len; i++) {
     char bit = in[i];
-    out[j++] = bit;
+    out[j] = bit;
+    j++;
 
     // do the stuffing
     if (bit == last_bit) {
@@ -26,7 +27,8 @@ int do_bitstuff(char *out, char *in, int in_len) {
       if (bit_cnt == 5) {
         // 5 in a row the same, do stuff
         last_bit = !bit;
-        out[j++] = last_bit;
+        out[j] = last_bit;
+        j++;
         bit_cnt = 1;
       }
     } else {
@@ -39,32 +41,38 @@ int do_bitstuff(char *out, char *in, int in_len) {
 }
 
 int append_crc(char *in, int in_len) {
-  int crc = 0;
+  unsigned int crc = 0;
   for (int i = 0; i < in_len; i++) {
     crc <<= 1;
-    if (in[i] ^ ((crc>>15)&1)) {
-      crc = crc ^ 0x4599;
+    if (((unsigned int)(in[i]) ^ ((crc >> 15) & 1U)) != 0U) {
+      crc = crc ^ 0x4599U;
     }
-    crc &= 0x7fff;
+    crc &= 0x7fffU;
   }
+  int in_len_copy = in_len;
   for (int i = 14; i >= 0; i--) {
-    in[in_len++] = (crc>>i)&1;
+    in[in_len_copy] = (crc >> (unsigned int)(i)) & 1U;
+    in_len_copy++;
   }
-  return in_len;
+  return in_len_copy;
 }
 
 int append_bits(char *in, int in_len, char *app, int app_len) {
+  int in_len_copy = in_len;
   for (int i = 0; i < app_len; i++) {
-    in[in_len++] = app[i];
+    in[in_len_copy] = app[i];
+    in_len_copy++;
   }
-  return in_len;
+  return in_len_copy;
 }
 
 int append_int(char *in, int in_len, int val, int val_len) {
-  for (int i = val_len-1; i >= 0; i--) {
-    in[in_len++] = (val&(1<<i)) != 0;
+  int in_len_copy = in_len;
+  for (int i = val_len - 1; i >= 0; i--) {
+    in[in_len_copy] = ((unsigned int)(val) & (1U << (unsigned int)(i))) != 0U;
+    in_len_copy++;
   }
-  return in_len;
+  return in_len_copy;
 }
 
 int get_bit_message(char *out, CAN_FIFOMailBox_TypeDef *to_bang) {
@@ -82,12 +90,12 @@ int get_bit_message(char *out, CAN_FIFOMailBox_TypeDef *to_bang) {
   // test packet
   int dlc_len = to_bang->RDTR & 0xF;
   len = append_int(pkt, len, 0, 1);    // Start-of-frame
-  
-  if (to_bang->RIR & 4) {
+
+  if ((to_bang->RIR & 4) != 0) {
     // extended identifier
     len = append_int(pkt, len, to_bang->RIR >> 21, 11);  // Identifier
     len = append_int(pkt, len, 3, 2);    // SRR+IDE
-    len = append_int(pkt, len, (to_bang->RIR >> 3) & ((1<<18)-1), 18);  // Identifier
+    len = append_int(pkt, len, (to_bang->RIR >> 3) & ((1U << 18) - 1U), 18);  // Identifier
     len = append_int(pkt, len, 0, 3);    // RTR+r1+r0
   } else {
     // standard identifier
@@ -114,9 +122,7 @@ int get_bit_message(char *out, CAN_FIFOMailBox_TypeDef *to_bang) {
   return len;
 }
 
-#ifdef PANDA
-
-void setup_timer4() {
+void setup_timer4(void) {
   // setup
   TIM4->PSC = 48-1;          // tick on 1 us
   TIM4->CR1 = TIM_CR1_CEN;   // enable
@@ -133,7 +139,7 @@ void setup_timer4() {
 int gmlan_timeout_counter = GMLAN_TICKS_PER_TIMEOUT_TICKLE; //GMLAN transceiver times out every 17ms held high; tickle every 15ms
 int can_timeout_counter = GMLAN_TICKS_PER_SECOND; //1 second
 
-int inverted_bit_to_send = GMLAN_HIGH; 
+int inverted_bit_to_send = GMLAN_HIGH;
 int gmlan_switch_below_timeout = -1;
 int gmlan_switch_timeout_enable = 0;
 
@@ -142,9 +148,9 @@ void gmlan_switch_init(int timeout_enable) {
   gmlan_alt_mode = GPIO_SWITCH;
   gmlan_switch_below_timeout = 1;
   set_gpio_mode(GPIOB, 13, MODE_OUTPUT);
-  
+
   setup_timer4();
-  
+
   inverted_bit_to_send = GMLAN_LOW; //We got initialized, set the output low
 }
 
@@ -164,16 +170,17 @@ void reset_gmlan_switch_timeout(void) {
 }
 
 void set_bitbanged_gmlan(int val) {
-  if (val) {
-    GPIOB->ODR |= (1 << 13);
+  if (val != 0) {
+    GPIOB->ODR |= (1U << 13);
   } else {
-    GPIOB->ODR &= ~(1 << 13);
+    GPIOB->ODR &= ~(1U << 13);
   }
 }
 
 char pkt_stuffed[MAX_BITS_CAN_PACKET];
 int gmlan_sending = -1;
 int gmlan_sendmax = -1;
+bool gmlan_send_ok = true;
 
 int gmlan_silent_count = 0;
 int gmlan_fail_count = 0;
@@ -182,7 +189,7 @@ int gmlan_fail_count = 0;
 
 void TIM4_IRQHandler(void) {
   if (gmlan_alt_mode == BITBANG) {
-    if (TIM4->SR & TIM_SR_UIF && gmlan_sendmax != -1) {
+    if ((TIM4->SR & TIM_SR_UIF) && (gmlan_sendmax != -1)) {
       int read = get_gpio_input(GPIOB, 12);
       if (gmlan_silent_count < REQUIRED_SILENT_TIME) {
         if (read == 0) {
@@ -190,19 +197,21 @@ void TIM4_IRQHandler(void) {
         } else {
           gmlan_silent_count++;
         }
-      } else if (gmlan_silent_count == REQUIRED_SILENT_TIME) {
-        int retry = 0;
+      } else {
+        bool retry = 0;
         // in send loop
-        if (gmlan_sending > 0 &&  // not first bit
-           (read == 0 && pkt_stuffed[gmlan_sending-1] == 1) &&  // bus wrongly dominant
-           gmlan_sending != (gmlan_sendmax-11)) {    //not ack bit
+        if ((gmlan_sending > 0) &&  // not first bit
+           ((read == 0) && (pkt_stuffed[gmlan_sending-1] == 1)) &&  // bus wrongly dominant
+           (gmlan_sending != (gmlan_sendmax - 11))) {    //not ack bit
           puts("GMLAN ERR: bus driven at ");
           puth(gmlan_sending);
           puts("\n");
           retry = 1;
-        } else if (read == 1 && gmlan_sending == (gmlan_sendmax-11)) {    // recessive during ACK
+        } else if ((read == 1) && (gmlan_sending == (gmlan_sendmax - 11))) {    // recessive during ACK
           puts("GMLAN ERR: didn't recv ACK\n");
           retry = 1;
+        } else {
+          // do not retry
         }
         if (retry) {
           // reset sender (retry after 7 silent)
@@ -212,13 +221,14 @@ void TIM4_IRQHandler(void) {
           gmlan_fail_count++;
           if (gmlan_fail_count == MAX_FAIL_COUNT) {
             puts("GMLAN ERR: giving up send\n");
+            gmlan_send_ok = false;
           }
         } else {
           set_bitbanged_gmlan(pkt_stuffed[gmlan_sending]);
           gmlan_sending++;
         }
       }
-      if (gmlan_sending == gmlan_sendmax || gmlan_fail_count == MAX_FAIL_COUNT) {
+      if ((gmlan_sending == gmlan_sendmax) || (gmlan_fail_count == MAX_FAIL_COUNT)) {
         set_bitbanged_gmlan(1); // recessive
         set_gpio_mode(GPIOB, 13, MODE_INPUT);
         TIM4->DIER = 0;  // no update interrupt
@@ -227,11 +237,9 @@ void TIM4_IRQHandler(void) {
       }
     }
     TIM4->SR = 0;
-  } //bit bang mode
-
-  else if (gmlan_alt_mode == GPIO_SWITCH) {
-    if (TIM4->SR & TIM_SR_UIF && gmlan_switch_below_timeout != -1) {
-      if (can_timeout_counter == 0 && gmlan_switch_timeout_enable) {
+  } else if (gmlan_alt_mode == GPIO_SWITCH) {
+    if ((TIM4->SR & TIM_SR_UIF) && (gmlan_switch_below_timeout != -1)) {
+      if ((can_timeout_counter == 0) && gmlan_switch_timeout_enable) {
         //it has been more than 1 second since timeout was reset; disable timer and restore the GMLAN output
         set_gpio_output(GPIOB, 13, GMLAN_LOW);
         gmlan_switch_below_timeout = -1;
@@ -252,25 +260,27 @@ void TIM4_IRQHandler(void) {
       }
     }
     TIM4->SR = 0;
-  } //gmlan switch mode
+  } else {
+    puts("invalid gmlan_alt_mode\n");
+  }
 }
 
-void bitbang_gmlan(CAN_FIFOMailBox_TypeDef *to_bang) {
+bool bitbang_gmlan(CAN_FIFOMailBox_TypeDef *to_bang) {
+  gmlan_send_ok = true;
   gmlan_alt_mode = BITBANG;
-  // TODO: make failure less silent
-  if (gmlan_sendmax != -1) return;
 
-  int len = get_bit_message(pkt_stuffed, to_bang);
-  gmlan_fail_count = 0;
-  gmlan_silent_count = 0;
-  gmlan_sending = 0;
-  gmlan_sendmax = len;
+  if (gmlan_sendmax == -1) {
+    int len = get_bit_message(pkt_stuffed, to_bang);
+    gmlan_fail_count = 0;
+    gmlan_silent_count = 0;
+    gmlan_sending = 0;
+    gmlan_sendmax = len;
+    // setup for bitbang loop
+    set_bitbanged_gmlan(1); // recessive
+    set_gpio_mode(GPIOB, 13, MODE_OUTPUT);
 
-  // setup for bitbang loop
-  set_bitbanged_gmlan(1); // recessive
-  set_gpio_mode(GPIOB, 13, MODE_OUTPUT);
-
-  setup_timer4();
+    setup_timer4();
+  }
+  return gmlan_send_ok;
 }
 
-#endif

panda/board/drivers/llcan.h

@@ -0,0 +1,94 @@
+// this is needed for 1 mbps support
+#define CAN_QUANTA 8U
+#define CAN_SEQ1 6 // roundf(quanta * 0.875f) - 1;
+#define CAN_SEQ2 1 // roundf(quanta * 0.125f);
+
+#define CAN_PCLK 24000U
+// 333 = 33.3 kbps
+// 5000 = 500 kbps
+#define can_speed_to_prescaler(x) (CAN_PCLK / CAN_QUANTA * 10U / (x))
+
+#define GET_BUS(msg) (((msg)->RDTR >> 4) & 0xFF)
+#define GET_LEN(msg) ((msg)->RDTR & 0xF)
+#define GET_ADDR(msg) ((((msg)->RIR & 4) != 0) ? ((msg)->RIR >> 3) : ((msg)->RIR >> 21))
+#define GET_BYTE(msg, b) (((int)(b) > 3) ? (((msg)->RDHR >> (8U * ((unsigned int)(b) % 4U))) & 0XFFU) : (((msg)->RDLR >> (8U * (unsigned int)(b))) & 0xFFU))
+#define GET_BYTES_04(msg) ((msg)->RDLR)
+#define GET_BYTES_48(msg) ((msg)->RDHR)
+
+void puts(const char *a);
+
+bool llcan_set_speed(CAN_TypeDef *CAN_obj, uint32_t speed, bool loopback, bool silent) {
+  // initialization mode
+  CAN_obj->MCR = CAN_MCR_TTCM | CAN_MCR_INRQ;
+  while((CAN_obj->MSR & CAN_MSR_INAK) != CAN_MSR_INAK);
+
+  // set time quanta from defines
+  CAN_obj->BTR = (CAN_BTR_TS1_0 * (CAN_SEQ1-1)) |
+            (CAN_BTR_TS2_0 * (CAN_SEQ2-1)) |
+            (can_speed_to_prescaler(speed) - 1U);
+
+  // silent loopback mode for debugging
+  if (loopback) {
+    CAN_obj->BTR |= CAN_BTR_SILM | CAN_BTR_LBKM;
+  }
+  if (silent) {
+    CAN_obj->BTR |= CAN_BTR_SILM;
+  }
+
+  // reset
+  // cppcheck-suppress redundantAssignment ; it's a register
+  CAN_obj->MCR = CAN_MCR_TTCM | CAN_MCR_ABOM;
+
+  #define CAN_TIMEOUT 1000000
+  int tmp = 0;
+  bool ret = false;
+  while(((CAN_obj->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) && (tmp < CAN_TIMEOUT)) tmp++;
+  if (tmp < CAN_TIMEOUT) {
+    ret = true;
+  }
+
+  return ret;
+}
+
+void llcan_init(CAN_TypeDef *CAN_obj) {
+  // accept all filter
+  CAN_obj->FMR |= CAN_FMR_FINIT;
+
+  // no mask
+  CAN_obj->sFilterRegister[0].FR1 = 0;
+  CAN_obj->sFilterRegister[0].FR2 = 0;
+  CAN_obj->sFilterRegister[14].FR1 = 0;
+  CAN_obj->sFilterRegister[14].FR2 = 0;
+  CAN_obj->FA1R |= 1U | (1U << 14);
+
+  CAN_obj->FMR &= ~(CAN_FMR_FINIT);
+
+  // enable certain CAN interrupts
+  CAN_obj->IER |= CAN_IER_TMEIE | CAN_IER_FMPIE0 |  CAN_IER_WKUIE;
+
+  if (CAN_obj == CAN1) {
+    NVIC_EnableIRQ(CAN1_TX_IRQn);
+    NVIC_EnableIRQ(CAN1_RX0_IRQn);
+    NVIC_EnableIRQ(CAN1_SCE_IRQn);
+  } else if (CAN_obj == CAN2) {
+    NVIC_EnableIRQ(CAN2_TX_IRQn);
+    NVIC_EnableIRQ(CAN2_RX0_IRQn);
+    NVIC_EnableIRQ(CAN2_SCE_IRQn);
+#ifdef CAN3
+  } else if (CAN_obj == CAN3) {
+    NVIC_EnableIRQ(CAN3_TX_IRQn);
+    NVIC_EnableIRQ(CAN3_RX0_IRQn);
+    NVIC_EnableIRQ(CAN3_SCE_IRQn);
+#endif
+  } else {
+    puts("Invalid CAN: initialization failed\n");
+  }
+}
+
+void llcan_clear_send(CAN_TypeDef *CAN_obj) {
+  CAN_obj->TSR |= CAN_TSR_ABRQ0;
+  CAN_obj->MSR &= ~(CAN_MSR_ERRI);
+  // cppcheck-suppress selfAssignment ; needed to clear the register
+  CAN_obj->MSR = CAN_obj->MSR;
+}
+

panda/board/drivers/llgpio.h

@@ -1,35 +1,44 @@
-void set_gpio_mode(GPIO_TypeDef *GPIO, int pin, int mode) {
+#define MODE_INPUT 0
+#define MODE_OUTPUT 1
+#define MODE_ALTERNATE 2
+#define MODE_ANALOG 3
+
+#define PULL_NONE 0
+#define PULL_UP 1
+#define PULL_DOWN 2
+
+void set_gpio_mode(GPIO_TypeDef *GPIO, unsigned int pin, unsigned int mode) {
   uint32_t tmp = GPIO->MODER;
-  tmp &= ~(3 << (pin*2));
-  tmp |= (mode << (pin*2));
+  tmp &= ~(3U << (pin * 2U));
+  tmp |= (mode << (pin * 2U));
   GPIO->MODER = tmp;
 }
 
-void set_gpio_output(GPIO_TypeDef *GPIO, int pin, int val) {
-  if (val) {
-    GPIO->ODR |= (1 << pin);
+void set_gpio_output(GPIO_TypeDef *GPIO, unsigned int pin, bool enabled) {
+  if (enabled) {
+    GPIO->ODR |= (1U << pin);
   } else {
-    GPIO->ODR &= ~(1 << pin);
+    GPIO->ODR &= ~(1U << pin);
   }
   set_gpio_mode(GPIO, pin, MODE_OUTPUT);
 }
 
-void set_gpio_alternate(GPIO_TypeDef *GPIO, int pin, int mode) {
-  uint32_t tmp = GPIO->AFR[pin>>3];
-  tmp &= ~(0xF << ((pin&7)*4));
-  tmp |= mode << ((pin&7)*4);
-  GPIO->AFR[pin>>3] = tmp;
+void set_gpio_alternate(GPIO_TypeDef *GPIO, unsigned int pin, unsigned int mode) {
+  uint32_t tmp = GPIO->AFR[pin >> 3U];
+  tmp &= ~(0xFU << ((pin & 7U) * 4U));
+  tmp |= mode << ((pin & 7U) * 4U);
+  GPIO->AFR[pin >> 3] = tmp;
   set_gpio_mode(GPIO, pin, MODE_ALTERNATE);
 }
 
-void set_gpio_pullup(GPIO_TypeDef *GPIO, int pin, int mode) {
+void set_gpio_pullup(GPIO_TypeDef *GPIO, unsigned int pin, unsigned int mode) {
   uint32_t tmp = GPIO->PUPDR;
-  tmp &= ~(3 << (pin*2));
-  tmp |= (mode << (pin*2));
+  tmp &= ~(3U << (pin * 2U));
+  tmp |= (mode << (pin * 2U));
   GPIO->PUPDR = tmp;
 }
 
-int get_gpio_input(GPIO_TypeDef *GPIO, int pin) {
-  return (GPIO->IDR & (1 << pin)) == (1 << pin);
+int get_gpio_input(GPIO_TypeDef *GPIO, unsigned int pin) {
+  return (GPIO->IDR & (1U << pin)) == (1U << pin);
 }
 

panda/board/drivers/lline_relay.h

@@ -1,88 +0,0 @@
-#ifdef PANDA
-
-int relay_control = 0;  // True if relay is controlled through l-line
-
-/* Conrol a relay connected to l-line pin */
-
-// 160us cycles, 1 high, 25 low
-
-volatile int turn_on_relay = 0;
-volatile int on_cycles = 25;
-
-//5s timeout
-#define LLINE_TIMEOUT_CYCLES 31250
-volatile int timeout_cycles = LLINE_TIMEOUT_CYCLES;
-
-void TIM5_IRQHandler(void) {
-  if (TIM5->SR & TIM_SR_UIF) {
-    on_cycles--;
-    timeout_cycles--;
-    if (timeout_cycles == 0) {
-      turn_on_relay = 0;
-    }
-    if (on_cycles > 0) {
-      if (turn_on_relay) {
-        set_gpio_output(GPIOC, 10, 0);
-      }
-    }
-    else {
-      set_gpio_output(GPIOC, 10, 1);
-      on_cycles = 25;
-    }
-  }
-  TIM5->ARR = 160-1;
-  TIM5->SR = 0;
-}
-
-void lline_relay_init (void) {
-  set_lline_output(0);
-  relay_control = 1;
-  set_gpio_output(GPIOC, 10, 1);
-
-  // setup
-  TIM5->PSC = 48-1; // tick on 1 us
-  TIM5->CR1 = TIM_CR1_CEN;   // enable
-  TIM5->ARR = 50-1;         // 50 us
-  TIM5->DIER = TIM_DIER_UIE; // update interrupt
-  TIM5->CNT = 0;
-
-  NVIC_EnableIRQ(TIM5_IRQn);
-
-#ifdef DEBUG
-  puts("INIT LLINE\n");
-  puts(" SR ");
-  putui(TIM5->SR);
-  puts(" PSC ");
-  putui(TIM5->PSC);
-  puts(" CR1 ");
-  putui(TIM5->CR1);
-  puts(" ARR ");
-  putui(TIM5->ARR);
-  puts(" DIER ");
-  putui(TIM5->DIER);
-  puts(" SR ");
-  putui(TIM5->SR);
-  puts(" CNT ");
-  putui(TIM5->CNT);
-  puts("\n");
-#endif
-}
-
-void lline_relay_release (void) {
-  set_lline_output(0);
-  relay_control = 0;
-  puts("RELEASE LLINE\n");
-  set_gpio_alternate(GPIOC, 10, GPIO_AF7_USART3);
-  NVIC_DisableIRQ(TIM5_IRQn);
-}
-
-void set_lline_output(int to_set) {
-  timeout_cycles = LLINE_TIMEOUT_CYCLES;
-  turn_on_relay = to_set;
-}
-
-int get_lline_status() {
-  return turn_on_relay;
-}
-
-#endif

panda/board/drivers/spi.h

@@ -1,11 +1,16 @@
 // IRQs: DMA2_Stream2, DMA2_Stream3, EXTI4
 
+void spi_init(void);
+int spi_cb_rx(uint8_t *data, int len, uint8_t *data_out);
+
+// end API
+
 #define SPI_BUF_SIZE 256
 uint8_t spi_buf[SPI_BUF_SIZE];
 int spi_buf_count = 0;
 int spi_total_count = 0;
 
-void spi_init() {
+void spi_init(void) {
   //puts("SPI init\n");
   SPI1->CR1 = SPI_CR1_SPE;
 
@@ -23,8 +28,8 @@ void spi_init() {
 
   // setup interrupt on falling edge of SPI enable (on PA4)
   SYSCFG->EXTICR[2] = SYSCFG_EXTICR2_EXTI4_PA;
-  EXTI->IMR = (1 << 4);
-  EXTI->FTSR = (1 << 4);
+  EXTI->IMR |= (1U << 4);
+  EXTI->FTSR |= (1U << 4);
   NVIC_EnableIRQ(EXTI4_IRQn);
 }
 
@@ -80,7 +85,7 @@ uint8_t spi_tx_buf[0x44];
 // SPI RX
 void DMA2_Stream2_IRQHandler(void) {
   int *resp_len = (int*)spi_tx_buf;
-  memset(spi_tx_buf, 0xaa, 0x44);
+  (void)memset(spi_tx_buf, 0xaa, 0x44);
   *resp_len = spi_cb_rx(spi_buf, 0x14, spi_tx_buf+4);
   #ifdef DEBUG_SPI
     puts("SPI write: ");
@@ -108,12 +113,12 @@ void DMA2_Stream3_IRQHandler(void) {
 }
 
 void EXTI4_IRQHandler(void) {
-  volatile int pr = EXTI->PR;
+  volatile unsigned int pr = EXTI->PR & (1U << 4);
   #ifdef DEBUG_SPI
     puts("exti4\n");
   #endif
   // SPI CS falling
-  if (pr & (1 << 4)) {
+  if ((pr & (1U << 4)) != 0U) {
     spi_total_count = 0;
     spi_rx_dma(spi_buf, 0x14);
   }

panda/board/drivers/uart.h

@@ -1,5 +1,27 @@
 // IRQs: USART1, USART2, USART3, UART5
 
+#define FIFO_SIZE 0x400U
+typedef struct uart_ring {
+  volatile uint16_t w_ptr_tx;
+  volatile uint16_t r_ptr_tx;
+  uint8_t elems_tx[FIFO_SIZE];
+  volatile uint16_t w_ptr_rx;
+  volatile uint16_t r_ptr_rx;
+  uint8_t elems_rx[FIFO_SIZE];
+  USART_TypeDef *uart;
+  void (*callback)(struct uart_ring*);
+} uart_ring;
+
+void uart_init(USART_TypeDef *u, int baud);
+
+bool getc(uart_ring *q, char *elem);
+bool putc(uart_ring *q, char elem);
+
+void puts(const char *a);
+void puth(unsigned int i);
+void hexdump(const void *a, int l);
+
+
 // ***************************** serial port queues *****************************
 
 // esp = USART1
@@ -28,18 +50,25 @@ uart_ring debug_ring = { .w_ptr_tx = 0, .r_ptr_tx = 0,
 
 
 uart_ring *get_ring_by_number(int a) {
+  uart_ring *ring = NULL;
   switch(a) {
     case 0:
-      return &debug_ring;
+      ring = &debug_ring;
+      break;
     case 1:
-      return &esp_ring;
+      ring = &esp_ring;
+      break;
     case 2:
-      return &lin1_ring;
+      ring = &lin1_ring;
+      break;
     case 3:
-      return &lin2_ring;
+      ring = &lin2_ring;
+      break;
     default:
-      return NULL;
+      ring = NULL;
+      break;
   }
+  return ring;
 }
 
 // ***************************** serial port *****************************
@@ -50,31 +79,32 @@ void uart_ring_process(uart_ring *q) {
   int sr = q->uart->SR;
 
   if (q->w_ptr_tx != q->r_ptr_tx) {
-    if (sr & USART_SR_TXE) {
+    if ((sr & USART_SR_TXE) != 0) {
       q->uart->DR = q->elems_tx[q->r_ptr_tx];
-      q->r_ptr_tx = (q->r_ptr_tx + 1) % FIFO_SIZE;
-    } else {
-      // push on interrupt later
-      q->uart->CR1 |= USART_CR1_TXEIE;
+      q->r_ptr_tx = (q->r_ptr_tx + 1U) % FIFO_SIZE;
     }
+    // there could be more to send
+    q->uart->CR1 |= USART_CR1_TXEIE;
   } else {
     // nothing to send
     q->uart->CR1 &= ~USART_CR1_TXEIE;
   }
 
-  if (sr & USART_SR_RXNE || sr & USART_SR_ORE) {
+  if ((sr & USART_SR_RXNE) || (sr & USART_SR_ORE)) {
     uint8_t c = q->uart->DR;  // TODO: can drop packets
     if (q != &esp_ring) {
-      uint16_t next_w_ptr = (q->w_ptr_rx + 1) % FIFO_SIZE;
+      uint16_t next_w_ptr = (q->w_ptr_rx + 1U) % FIFO_SIZE;
       if (next_w_ptr != q->r_ptr_rx) {
         q->elems_rx[q->w_ptr_rx] = c;
         q->w_ptr_rx = next_w_ptr;
-        if (q->callback) q->callback(q);
+        if (q->callback != NULL) {
+          q->callback(q);
+        }
       }
     }
   }
 
-  if (sr & USART_SR_ORE) {
+  if ((sr & USART_SR_ORE) != 0) {
     // set dropped packet flag?
   }
 
@@ -88,46 +118,46 @@ void USART2_IRQHandler(void) { uart_ring_process(&debug_ring); }
 void USART3_IRQHandler(void) { uart_ring_process(&lin2_ring); }
 void UART5_IRQHandler(void) { uart_ring_process(&lin1_ring); }
 
-int getc(uart_ring *q, char *elem) {
-  int ret = 0;
+bool getc(uart_ring *q, char *elem) {
+  bool ret = false;
 
   enter_critical_section();
   if (q->w_ptr_rx != q->r_ptr_rx) {
-    *elem = q->elems_rx[q->r_ptr_rx];
-    q->r_ptr_rx = (q->r_ptr_rx + 1) % FIFO_SIZE;
-    ret = 1;
+    if (elem != NULL) *elem = q->elems_rx[q->r_ptr_rx];
+    q->r_ptr_rx = (q->r_ptr_rx + 1U) % FIFO_SIZE;
+    ret = true;
   }
   exit_critical_section();
 
   return ret;
 }
 
-int injectc(uart_ring *q, char elem) {
-  int ret = 0;
+bool injectc(uart_ring *q, char elem) {
+  int ret = false;
   uint16_t next_w_ptr;
 
   enter_critical_section();
-  next_w_ptr = (q->w_ptr_rx + 1) % FIFO_SIZE;
+  next_w_ptr = (q->w_ptr_rx + 1U) % FIFO_SIZE;
   if (next_w_ptr != q->r_ptr_rx) {
     q->elems_rx[q->w_ptr_rx] = elem;
     q->w_ptr_rx = next_w_ptr;
-    ret = 1;
+    ret = true;
   }
   exit_critical_section();
 
   return ret;
 }
 
-int putc(uart_ring *q, char elem) {
-  int ret = 0;
+bool putc(uart_ring *q, char elem) {
+  bool ret = false;
   uint16_t next_w_ptr;
 
   enter_critical_section();
-  next_w_ptr = (q->w_ptr_tx + 1) % FIFO_SIZE;
+  next_w_ptr = (q->w_ptr_tx + 1U) % FIFO_SIZE;
   if (next_w_ptr != q->r_ptr_tx) {
     q->elems_tx[q->w_ptr_tx] = elem;
     q->w_ptr_tx = next_w_ptr;
-    ret = 1;
+    ret = true;
   }
   exit_critical_section();
 
@@ -136,6 +166,24 @@ int putc(uart_ring *q, char elem) {
   return ret;
 }
 
+void uart_flush(uart_ring *q) {
+  while (q->w_ptr_tx != q->r_ptr_tx) {
+    __WFI();
+  }
+}
+
+void uart_flush_sync(uart_ring *q) {
+  // empty the TX buffer
+  while (q->w_ptr_tx != q->r_ptr_tx) {
+    uart_ring_process(q);
+  }
+}
+
+void uart_send_break(uart_ring *u) {
+  while ((u->uart->CR1 & USART_CR1_SBK) != 0);
+  u->uart->CR1 |= USART_CR1_SBK;
+}
+
 void clear_uart_buff(uart_ring *q) {
   enter_critical_section();
   q->w_ptr_tx = 0;
@@ -147,38 +195,38 @@ void clear_uart_buff(uart_ring *q) {
 
 // ***************************** start UART code *****************************
 
-#define __DIV(_PCLK_, _BAUD_)                        (((_PCLK_)*25)/(4*(_BAUD_)))
-#define __DIVMANT(_PCLK_, _BAUD_)                    (__DIV((_PCLK_), (_BAUD_))/100)
-#define __DIVFRAQ(_PCLK_, _BAUD_)                    (((__DIV((_PCLK_), (_BAUD_)) - (__DIVMANT((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100)
-#define __USART_BRR(_PCLK_, _BAUD_)              ((__DIVMANT((_PCLK_), (_BAUD_)) << 4)|(__DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0F))
+#define __DIV(_PCLK_, _BAUD_)                        (((_PCLK_) * 25U) / (4U * (_BAUD_)))
+#define __DIVMANT(_PCLK_, _BAUD_)                    (__DIV((_PCLK_), (_BAUD_)) / 100U)
+#define __DIVFRAQ(_PCLK_, _BAUD_)                    ((((__DIV((_PCLK_), (_BAUD_)) - (__DIVMANT((_PCLK_), (_BAUD_)) * 100U)) * 16U) + 50U) / 100U)
+#define __USART_BRR(_PCLK_, _BAUD_)              ((__DIVMANT((_PCLK_), (_BAUD_)) << 4) | (__DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0FU))
 
-void uart_set_baud(USART_TypeDef *u, int baud) {
+void uart_set_baud(USART_TypeDef *u, unsigned int baud) {
   if (u == USART1) {
     // USART1 is on APB2
-    u->BRR = __USART_BRR(48000000, baud);
+    u->BRR = __USART_BRR(48000000U, baud);
   } else {
-    u->BRR = __USART_BRR(24000000, baud);
+    u->BRR = __USART_BRR(24000000U, baud);
   }
 }
 
 #define USART1_DMA_LEN 0x20
 char usart1_dma[USART1_DMA_LEN];
 
-void uart_dma_drain() {
+void uart_dma_drain(void) {
   uart_ring *q = &esp_ring;
 
   enter_critical_section();
 
-  if (DMA2->HISR & DMA_HISR_TCIF5 || DMA2->HISR & DMA_HISR_HTIF5 || DMA2_Stream5->NDTR != USART1_DMA_LEN) {
+  if ((DMA2->HISR & DMA_HISR_TCIF5) || (DMA2->HISR & DMA_HISR_HTIF5) || (DMA2_Stream5->NDTR != USART1_DMA_LEN)) {
     // disable DMA
     q->uart->CR3 &= ~USART_CR3_DMAR;
     DMA2_Stream5->CR &= ~DMA_SxCR_EN;
-    while (DMA2_Stream5->CR & DMA_SxCR_EN);
+    while ((DMA2_Stream5->CR & DMA_SxCR_EN) != 0);
 
-    int i;
-    for (i = 0; i < USART1_DMA_LEN - DMA2_Stream5->NDTR; i++) {
+    unsigned int i;
+    for (i = 0; i < (USART1_DMA_LEN - DMA2_Stream5->NDTR); i++) {
       char c = usart1_dma[i];
-      uint16_t next_w_ptr = (q->w_ptr_rx + 1) % FIFO_SIZE;
+      uint16_t next_w_ptr = (q->w_ptr_rx + 1U) % FIFO_SIZE;
       if (next_w_ptr != q->r_ptr_rx) {
         q->elems_rx[q->w_ptr_rx] = c;
         q->w_ptr_rx = next_w_ptr;
@@ -241,6 +289,8 @@ void uart_init(USART_TypeDef *u, int baud) {
     NVIC_EnableIRQ(USART3_IRQn);
   } else if (u == UART5) {
     NVIC_EnableIRQ(UART5_IRQn);
+  } else {
+    // USART type undefined, skip
   }
 }
 
@@ -254,49 +304,49 @@ void putch(const char a) {
 
     //putc(&debug_ring, a);
   } else {
-    injectc(&debug_ring, a);
+    // misra-c2012-17.7: serial debug function, ok to ignore output
+    (void)injectc(&debug_ring, a);
   }
 }
 
-int puts(const char *a) {
-  for (;*a;a++) {
-    if (*a == '\n') putch('\r');
-    putch(*a);
+void puts(const char *a) {
+  for (const char *in = a; *in; in++) {
+    if (*in == '\n') putch('\r');
+    putch(*in);
   }
-  return 0;
 }
 
 void putui(uint32_t i) {
+  uint32_t i_copy = i;
   char str[11];
   uint8_t idx = 10;
-  str[idx--] = '\0';
+  str[idx] = '\0';
+  idx--;
   do {
-    str[idx--] = (i % 10) + 0x30;
-    i /= 10;
-  } while (i);
-  puts(str + idx + 1);
+    str[idx] = (i_copy % 10U) + 0x30U;
+    idx--;
+    i_copy /= 10;
+  } while (i_copy != 0U);
+  puts(str + idx + 1U);
 }
 
 void puth(unsigned int i) {
-  int pos;
   char c[] = "0123456789abcdef";
-  for (pos = 28; pos != -4; pos -= 4) {
-    putch(c[(i >> pos) & 0xF]);
+  for (int pos = 28; pos != -4; pos -= 4) {
+    putch(c[(i >> (unsigned int)(pos)) & 0xFU]);
   }
 }
 
 void puth2(unsigned int i) {
-  int pos;
   char c[] = "0123456789abcdef";
-  for (pos = 4; pos != -4; pos -= 4) {
-    putch(c[(i >> pos) & 0xF]);
+  for (int pos = 4; pos != -4; pos -= 4) {
+    putch(c[(i >> (unsigned int)(pos)) & 0xFU]);
   }
 }
 
 void hexdump(const void *a, int l) {
-  int i;
-  for (i=0;i<l;i++) {
-    if (i != 0 && (i&0xf) == 0) puts("\n");
+  for (int i=0; i < l; i++) {
+    if ((i != 0) && ((i & 0xf) == 0)) puts("\n");
     puth2(((const unsigned char*)a)[i]);
     puts(" ");
   }

panda/board/drivers/usb.h

@@ -1,5 +1,35 @@
 // IRQs: OTG_FS
 
+typedef union {
+  uint16_t w;
+  struct BW {
+    uint8_t msb;
+    uint8_t lsb;
+  }
+  bw;
+}
+uint16_t_uint8_t;
+
+typedef union _USB_Setup {
+  uint32_t d8[2];
+  struct _SetupPkt_Struc
+  {
+    uint8_t           bmRequestType;
+    uint8_t           bRequest;
+    uint16_t_uint8_t  wValue;
+    uint16_t_uint8_t  wIndex;
+    uint16_t_uint8_t  wLength;
+  } b;
+}
+USB_Setup_TypeDef;
+
+void usb_init(void);
+int usb_cb_control_msg(USB_Setup_TypeDef *setup, uint8_t *resp, bool hardwired);
+int usb_cb_ep1_in(void *usbdata, int len, bool hardwired);
+void usb_cb_ep2_out(void *usbdata, int len, bool hardwired);
+void usb_cb_ep3_out(void *usbdata, int len, bool hardwired);
+void usb_cb_enumeration_complete(void);
+
 // **** supporting defines ****
 
 typedef struct
@@ -13,9 +43,9 @@ USB_OTG_GlobalTypeDef *USBx = USB_OTG_FS;
 #define USBx_HOST       ((USB_OTG_HostTypeDef *)((uint32_t)USBx + USB_OTG_HOST_BASE))
 #define USBx_HOST_PORT  ((USB_OTG_HostPortTypeDef *)((uint32_t)USBx + USB_OTG_HOST_PORT_BASE))
 #define USBx_DEVICE     ((USB_OTG_DeviceTypeDef *)((uint32_t)USBx + USB_OTG_DEVICE_BASE))
-#define USBx_INEP(i)    ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
-#define USBx_OUTEP(i)   ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
-#define USBx_DFIFO(i)   *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + (i) * USB_OTG_FIFO_SIZE)
+#define USBx_INEP(i)    ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + ((i) * USB_OTG_EP_REG_SIZE)))
+#define USBx_OUTEP(i)   ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + ((i) * USB_OTG_EP_REG_SIZE)))
+#define USBx_DFIFO(i)   *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + ((i) * USB_OTG_FIFO_SIZE))
 #define USBx_PCGCCTL    *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_PCGCCTL_BASE)
 
 #define  USB_REQ_GET_STATUS                             0x00
@@ -66,7 +96,7 @@ USB_OTG_GlobalTypeDef *USBx = USB_OTG_FS;
 #define STS_SETUP_COMP                         4
 #define STS_SETUP_UPDT                         6
 
-#define USBD_FS_TRDT_VALUE           5
+#define USBD_FS_TRDT_VALUE           5U
 
 #define USB_OTG_SPEED_FULL 3
 
@@ -95,11 +125,11 @@ uint8_t resp[MAX_RESP_LEN];
 
 // Convert machine byte order to USB byte order
 #define TOUSBORDER(num)\
-  (num&0xFF), ((num>>8)&0xFF)
+  ((num) & 0xFFU), (((num) >> 8) & 0xFFU)
 
 // take in string length and return the first 2 bytes of a string descriptor
 #define STRING_DESCRIPTOR_HEADER(size)\
-  (((size * 2 + 2)&0xFF) | 0x0300)
+  (((((size) * 2) + 2) & 0xFF) | 0x0300)
 
 uint8_t device_desc[] = {
   DSCR_DEVICE_LEN, USB_DESC_TYPE_DEVICE, //Length, Type
@@ -128,7 +158,7 @@ uint8_t device_qualifier[] = {
 
 uint8_t configuration_desc[] = {
   DSCR_CONFIG_LEN, USB_DESC_TYPE_CONFIGURATION, // Length, Type,
-  TOUSBORDER(0x0045), // Total Len (uint16)
+  TOUSBORDER(0x0045U), // Total Len (uint16)
   0x01, 0x01, STRING_OFFSET_ICONFIGURATION, // Num Interface, Config Value, Configuration
   0xc0, 0x32, // Attributes, Max Power
   // interface 0 ALT 0
@@ -139,17 +169,17 @@ uint8_t configuration_desc[] = {
     // endpoint 1, read CAN
     DSCR_ENDPOINT_LEN, USB_DESC_TYPE_ENDPOINT, // Length, Type
     ENDPOINT_RCV | 1, ENDPOINT_TYPE_BULK, // Endpoint Num/Direction, Type
-    TOUSBORDER(0x0040), // Max Packet (0x0040)
+    TOUSBORDER(0x0040U), // Max Packet (0x0040)
     0x00, // Polling Interval (NA)
     // endpoint 2, send serial
     DSCR_ENDPOINT_LEN, USB_DESC_TYPE_ENDPOINT, // Length, Type
     ENDPOINT_SND | 2, ENDPOINT_TYPE_BULK, // Endpoint Num/Direction, Type
-    TOUSBORDER(0x0040), // Max Packet (0x0040)
+    TOUSBORDER(0x0040U), // Max Packet (0x0040)
     0x00, // Polling Interval
     // endpoint 3, send CAN
     DSCR_ENDPOINT_LEN, USB_DESC_TYPE_ENDPOINT, // Length, Type
     ENDPOINT_SND | 3, ENDPOINT_TYPE_BULK, // Endpoint Num/Direction, Type
-    TOUSBORDER(0x0040), // Max Packet (0x0040)
+    TOUSBORDER(0x0040U), // Max Packet (0x0040)
     0x00, // Polling Interval
   // interface 0 ALT 1
   DSCR_INTERFACE_LEN, USB_DESC_TYPE_INTERFACE, // Length, Type
@@ -159,17 +189,17 @@ uint8_t configuration_desc[] = {
     // endpoint 1, read CAN
     DSCR_ENDPOINT_LEN, USB_DESC_TYPE_ENDPOINT, // Length, Type
     ENDPOINT_RCV | 1, ENDPOINT_TYPE_INT, // Endpoint Num/Direction, Type
-    TOUSBORDER(0x0040), // Max Packet (0x0040)
+    TOUSBORDER(0x0040U), // Max Packet (0x0040)
     0x05, // Polling Interval (5 frames)
     // endpoint 2, send serial
     DSCR_ENDPOINT_LEN, USB_DESC_TYPE_ENDPOINT, // Length, Type
     ENDPOINT_SND | 2, ENDPOINT_TYPE_BULK, // Endpoint Num/Direction, Type
-    TOUSBORDER(0x0040), // Max Packet (0x0040)
+    TOUSBORDER(0x0040U), // Max Packet (0x0040)
     0x00, // Polling Interval
     // endpoint 3, send CAN
     DSCR_ENDPOINT_LEN, USB_DESC_TYPE_ENDPOINT, // Length, Type
     ENDPOINT_SND | 3, ENDPOINT_TYPE_BULK, // Endpoint Num/Direction, Type
-    TOUSBORDER(0x0040), // Max Packet (0x0040)
+    TOUSBORDER(0x0040U), // Max Packet (0x0040)
     0x00, // Polling Interval
 };
 
@@ -186,17 +216,10 @@ uint16_t string_manufacturer_desc[] = {
   'c', 'o', 'm', 'm', 'a', '.', 'a', 'i'
 };
 
-#ifdef PANDA
 uint16_t string_product_desc[] = {
   STRING_DESCRIPTOR_HEADER(5),
   'p', 'a', 'n', 'd', 'a'
 };
-#else
-uint16_t string_product_desc[] = {
-  STRING_DESCRIPTOR_HEADER(5),
-  'N', 'E', 'O', 'v', '1'
-};
-#endif
 
 // default serial number when we're not a panda
 uint16_t string_serial_desc[] = {
@@ -210,7 +233,6 @@ uint16_t string_configuration_desc[] = {
   '0', '1' // "01"
 };
 
-#ifdef PANDA
 // WCID (auto install WinUSB driver)
 // https://github.com/pbatard/libwdi/wiki/WCID-Devices
 // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/winusb-installation#automatic-installation-of--winusb-without-an-inf-file
@@ -360,8 +382,6 @@ uint8_t winusb_20_desc[WINUSB_PLATFORM_DESCRIPTOR_LENGTH] = {
     '1', 0x00, 'a', 0x00, 'd', 0x00, 'e', 0x00, '9', 0x00, '}', 0x00, 0x00, 0x00 // 78 bytes
 };
 
-#endif
-
 // current packet
 USB_Setup_TypeDef setup;
 uint8_t usbdata[0x100];
@@ -374,34 +394,36 @@ int current_int0_alt_setting = 0;
 // packet read and write
 
 void *USB_ReadPacket(void *dest, uint16_t len) {
-  uint32_t i=0;
-  uint32_t count32b = (len + 3) / 4;
+  uint32_t *dest_copy = (uint32_t *)dest;
+  uint32_t count32b = (len + 3U) / 4U;
 
-  for ( i = 0; i < count32b; i++, dest += 4 ) {
-    // packed?
-    *(__attribute__((__packed__)) uint32_t *)dest = USBx_DFIFO(0);
+  for (uint32_t i = 0; i < count32b; i++) {
+    *dest_copy = USBx_DFIFO(0);
+    dest_copy++;
   }
-  return ((void *)dest);
+  return ((void *)dest_copy);
 }
 
-void USB_WritePacket(const uint8_t *src, uint16_t len, uint32_t ep) {
+void USB_WritePacket(const void *src, uint16_t len, uint32_t ep) {
   #ifdef DEBUG_USB
   puts("writing ");
   hexdump(src, len);
   #endif
 
-  uint8_t numpacket = (len+(MAX_RESP_LEN-1))/MAX_RESP_LEN;
-  uint32_t count32b = 0, i = 0;
-  count32b = (len + 3) / 4;
+  uint8_t numpacket = (len + (MAX_RESP_LEN - 1U)) / MAX_RESP_LEN;
+  uint32_t count32b = 0;
+  count32b = (len + 3U) / 4U;
 
-  // bullshit
+  // TODO: revisit this
   USBx_INEP(ep)->DIEPTSIZ = ((numpacket << 19) & USB_OTG_DIEPTSIZ_PKTCNT) |
                             (len               & USB_OTG_DIEPTSIZ_XFRSIZ);
   USBx_INEP(ep)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
 
   // load the FIFO
-  for (i = 0; i < count32b; i++, src += 4) {
-    USBx_DFIFO(ep) = *((__attribute__((__packed__)) uint32_t *)src);
+  const uint32_t *src_copy = (const uint32_t *)src;
+  for (uint32_t i = 0; i < count32b; i++) {
+    USBx_DFIFO(ep) = *src_copy;
+    src_copy++;
   }
 }
 
@@ -413,7 +435,7 @@ void USB_WritePacket_EP0(uint8_t *src, uint16_t len) {
   hexdump(src, len);
   #endif
 
-  uint16_t wplen = min(len, 0x40);
+  uint16_t wplen = MIN(len, 0x40);
   USB_WritePacket(src, wplen, 0);
 
   if (wplen < len) {
@@ -425,7 +447,7 @@ void USB_WritePacket_EP0(uint8_t *src, uint16_t len) {
   }
 }
 
-void usb_reset() {
+void usb_reset(void) {
   // unmask endpoint interrupts, so many sets
   USBx_DEVICE->DAINT = 0xFFFFFFFF;
   USBx_DEVICE->DAINTMSK = 0xFFFFFFFF;
@@ -449,10 +471,10 @@ void usb_reset() {
   USBx->GRXFSIZ = 0x40;
 
   // 0x100 to offset past GRXFSIZ
-  USBx->DIEPTXF0_HNPTXFSIZ = (0x40 << 16) | 0x40;
+  USBx->DIEPTXF0_HNPTXFSIZ = (0x40U << 16) | 0x40U;
 
   // EP1, massive
-  USBx->DIEPTXF[0] = (0x40 << 16) | 0x80;
+  USBx->DIEPTXF[0] = (0x40U << 16) | 0x80U;
 
   // flush TX fifo
   USBx->GRSTCTL = USB_OTG_GRSTCTL_TXFFLSH | USB_OTG_GRSTCTL_TXFNUM_4;
@@ -465,34 +487,36 @@ void usb_reset() {
   USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGINAK;
 
   // ready to receive setup packets
-  USBx_OUTEP(0)->DOEPTSIZ = USB_OTG_DOEPTSIZ_STUPCNT | (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) | (3 * 8);
+  USBx_OUTEP(0)->DOEPTSIZ = USB_OTG_DOEPTSIZ_STUPCNT | (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19)) | (3U << 3);
 }
 
 char to_hex_char(int a) {
+  char ret;
   if (a < 10) {
-    return '0' + a;
+    ret = '0' + a;
   } else {
-    return 'a' + (a-10);
+    ret = 'a' + (a - 10);
   }
+  return ret;
 }
 
-void usb_setup() {
+void usb_setup(void) {
   int resp_len;
   // setup packet is ready
   switch (setup.b.bRequest) {
     case USB_REQ_SET_CONFIGURATION:
       // enable other endpoints, has to be here?
-      USBx_INEP(1)->DIEPCTL = (0x40 & USB_OTG_DIEPCTL_MPSIZ) | (2 << 18) | (1 << 22) |
+      USBx_INEP(1)->DIEPCTL = (0x40U & USB_OTG_DIEPCTL_MPSIZ) | (2U << 18) | (1U << 22) |
                               USB_OTG_DIEPCTL_SD0PID_SEVNFRM | USB_OTG_DIEPCTL_USBAEP;
       USBx_INEP(1)->DIEPINT = 0xFF;
 
-      USBx_OUTEP(2)->DOEPTSIZ = (1 << 19) | 0x40;
-      USBx_OUTEP(2)->DOEPCTL = (0x40 & USB_OTG_DOEPCTL_MPSIZ) | (2 << 18) |
+      USBx_OUTEP(2)->DOEPTSIZ = (1U << 19) | 0x40U;
+      USBx_OUTEP(2)->DOEPCTL = (0x40U & USB_OTG_DOEPCTL_MPSIZ) | (2U << 18) |
                                USB_OTG_DOEPCTL_SD0PID_SEVNFRM | USB_OTG_DOEPCTL_USBAEP;
       USBx_OUTEP(2)->DOEPINT = 0xFF;
 
-      USBx_OUTEP(3)->DOEPTSIZ = (1 << 19) | 0x40;
-      USBx_OUTEP(3)->DOEPCTL = (0x40 & USB_OTG_DOEPCTL_MPSIZ) | (2 << 18) |
+      USBx_OUTEP(3)->DOEPTSIZ = (1U << 19) | 0x40U;
+      USBx_OUTEP(3)->DOEPCTL = (0x40U & USB_OTG_DOEPCTL_MPSIZ) | (2U << 18) |
                                USB_OTG_DOEPCTL_SD0PID_SEVNFRM | USB_OTG_DOEPCTL_USBAEP;
       USBx_OUTEP(3)->DOEPINT = 0xFF;
 
@@ -505,7 +529,7 @@ void usb_setup() {
       break;
     case USB_REQ_SET_ADDRESS:
       // set now?
-      USBx_DEVICE->DCFG |= ((setup.b.wValue.w & 0x7f) << 4);
+      USBx_DEVICE->DCFG |= ((setup.b.wValue.w & 0x7fU) << 4);
 
       #ifdef DEBUG_USB
         puts(" set address\n");
@@ -525,57 +549,55 @@ void usb_setup() {
           //puts("    writing device descriptor\n");
 
           // setup transfer
-          USB_WritePacket(device_desc, min(sizeof(device_desc), setup.b.wLength.w), 0);
+          USB_WritePacket(device_desc, MIN(sizeof(device_desc), setup.b.wLength.w), 0);
           USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
 
           //puts("D");
           break;
         case USB_DESC_TYPE_CONFIGURATION:
-          USB_WritePacket(configuration_desc, min(sizeof(configuration_desc), setup.b.wLength.w), 0);
+          USB_WritePacket(configuration_desc, MIN(sizeof(configuration_desc), setup.b.wLength.w), 0);
           USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
           break;
         case USB_DESC_TYPE_DEVICE_QUALIFIER:
-          USB_WritePacket(device_qualifier, min(sizeof(device_qualifier), setup.b.wLength.w), 0);
+          USB_WritePacket(device_qualifier, MIN(sizeof(device_qualifier), setup.b.wLength.w), 0);
           USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
           break;
         case USB_DESC_TYPE_STRING:
           switch (setup.b.wValue.bw.msb) {
             case STRING_OFFSET_LANGID:
-              USB_WritePacket((uint8_t*)string_language_desc, min(sizeof(string_language_desc), setup.b.wLength.w), 0);
+              USB_WritePacket((uint8_t*)string_language_desc, MIN(sizeof(string_language_desc), setup.b.wLength.w), 0);
               break;
             case STRING_OFFSET_IMANUFACTURER:
-              USB_WritePacket((uint8_t*)string_manufacturer_desc, min(sizeof(string_manufacturer_desc), setup.b.wLength.w), 0);
+              USB_WritePacket((uint8_t*)string_manufacturer_desc, MIN(sizeof(string_manufacturer_desc), setup.b.wLength.w), 0);
               break;
             case STRING_OFFSET_IPRODUCT:
-              USB_WritePacket((uint8_t*)string_product_desc, min(sizeof(string_product_desc), setup.b.wLength.w), 0);
+              USB_WritePacket((uint8_t*)string_product_desc, MIN(sizeof(string_product_desc), setup.b.wLength.w), 0);
               break;
             case STRING_OFFSET_ISERIAL:
-              #ifdef PANDA
-                resp[0] = 0x02 + 12*4;
+              #ifdef UID_BASE
+                resp[0] = 0x02 + (12 * 4);
                 resp[1] = 0x03;
 
                 // 96 bits = 12 bytes
                 for (int i = 0; i < 12; i++){
                   uint8_t cc = ((uint8_t *)UID_BASE)[i];
-                  resp[2 + i*4 + 0] = to_hex_char((cc>>4)&0xF);
-                  resp[2 + i*4 + 1] = '\0';
-                  resp[2 + i*4 + 2] = to_hex_char((cc>>0)&0xF);
-                  resp[2 + i*4 + 3] = '\0';
+                  resp[2 + (i * 4) + 0] = to_hex_char((cc >> 4) & 0xFU);
+                  resp[2 + (i * 4) + 1] = '\0';
+                  resp[2 + (i * 4) + 2] = to_hex_char((cc >> 0) & 0xFU);
+                  resp[2 + (i * 4) + 3] = '\0';
                 }
 
-                USB_WritePacket(resp, min(resp[0], setup.b.wLength.w), 0);
+                USB_WritePacket(resp, MIN(resp[0], setup.b.wLength.w), 0);
               #else
-                USB_WritePacket((const uint8_t *)string_serial_desc, min(sizeof(string_serial_desc), setup.b.wLength.w), 0);
+                USB_WritePacket((const uint8_t *)string_serial_desc, MIN(sizeof(string_serial_desc), setup.b.wLength.w), 0);
               #endif
               break;
-            #ifdef PANDA
             case STRING_OFFSET_ICONFIGURATION:
-              USB_WritePacket((uint8_t*)string_configuration_desc, min(sizeof(string_configuration_desc), setup.b.wLength.w), 0);
+              USB_WritePacket((uint8_t*)string_configuration_desc, MIN(sizeof(string_configuration_desc), setup.b.wLength.w), 0);
               break;
             case 238:
-              USB_WritePacket((uint8_t*)string_238_desc, min(sizeof(string_238_desc), setup.b.wLength.w), 0);
+              USB_WritePacket((uint8_t*)string_238_desc, MIN(sizeof(string_238_desc), setup.b.wLength.w), 0);
               break;
-            #endif
             default:
               // nothing
               USB_WritePacket(0, 0, 0);
@@ -583,12 +605,10 @@ void usb_setup() {
           }
           USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
           break;
-        #ifdef PANDA
         case USB_DESC_TYPE_BINARY_OBJECT_STORE:
-          USB_WritePacket(binary_object_store_desc, min(sizeof(binary_object_store_desc), setup.b.wLength.w), 0);
+          USB_WritePacket(binary_object_store_desc, MIN(sizeof(binary_object_store_desc), setup.b.wLength.w), 0);
           USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
           break;
-        #endif
         default:
           // nothing here?
           USB_WritePacket(0, 0, 0);
@@ -609,11 +629,10 @@ void usb_setup() {
       USB_WritePacket(0, 0, 0);
       USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
       break;
-    #ifdef PANDA
     case WEBUSB_VENDOR_CODE:
       switch (setup.b.wIndex.w) {
         case WEBUSB_REQ_GET_URL:
-          USB_WritePacket(webusb_url_descriptor, min(sizeof(webusb_url_descriptor), setup.b.wLength.w), 0);
+          USB_WritePacket(webusb_url_descriptor, MIN(sizeof(webusb_url_descriptor), setup.b.wLength.w), 0);
           USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
           break;
         default:
@@ -627,29 +646,28 @@ void usb_setup() {
       switch (setup.b.wIndex.w) {
         // winusb 2.0 descriptor from BOS
         case WINUSB_REQ_GET_DESCRIPTOR:
-          USB_WritePacket_EP0((uint8_t*)winusb_20_desc, min(sizeof(winusb_20_desc), setup.b.wLength.w));
+          USB_WritePacket_EP0((uint8_t*)winusb_20_desc, MIN(sizeof(winusb_20_desc), setup.b.wLength.w));
           break;
         // Extended Compat ID OS Descriptor
         case WINUSB_REQ_GET_COMPATID_DESCRIPTOR:
-          USB_WritePacket_EP0((uint8_t*)winusb_ext_compatid_os_desc, min(sizeof(winusb_ext_compatid_os_desc), setup.b.wLength.w));
+          USB_WritePacket_EP0((uint8_t*)winusb_ext_compatid_os_desc, MIN(sizeof(winusb_ext_compatid_os_desc), setup.b.wLength.w));
           break;
         // Extended Properties OS Descriptor
         case WINUSB_REQ_GET_EXT_PROPS_OS:
-          USB_WritePacket_EP0((uint8_t*)winusb_ext_prop_os_desc, min(sizeof(winusb_ext_prop_os_desc), setup.b.wLength.w));
+          USB_WritePacket_EP0((uint8_t*)winusb_ext_prop_os_desc, MIN(sizeof(winusb_ext_prop_os_desc), setup.b.wLength.w));
           break;
         default:
           USB_WritePacket_EP0(0, 0);
       }
       break;
-    #endif
     default:
       resp_len = usb_cb_control_msg(&setup, resp, 1);
-      USB_WritePacket(resp, min(resp_len, setup.b.wLength.w), 0);
+      USB_WritePacket(resp, MIN(resp_len, setup.b.wLength.w), 0);
       USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
   }
 }
 
-void usb_init() {
+void usb_init(void) {
   // full speed PHY, do reset and remove power down
   /*puth(USBx->GRSTCTL);
   puts(" resetting PHY\n");*/
@@ -665,7 +683,7 @@ void usb_init() {
   USBx->GUSBCFG = USB_OTG_GUSBCFG_PHYSEL | USB_OTG_GUSBCFG_FDMOD;
 
   // slowest timings
-  USBx->GUSBCFG |= (uint32_t)((USBD_FS_TRDT_VALUE << 10) & USB_OTG_GUSBCFG_TRDT);
+  USBx->GUSBCFG |= ((USBD_FS_TRDT_VALUE << 10) & USB_OTG_GUSBCFG_TRDT);
 
   // power up the PHY
 #ifdef STM32F4
@@ -714,7 +732,6 @@ void usb_init() {
   USBx->GAHBCFG = USB_OTG_GAHBCFG_GINT;
 
   // DCTL startup value is 2 on new chip, 0 on old chip
-  // THIS IS FUCKING BULLSHIT
   USBx_DEVICE->DCTL = 0;
 
   // enable the IRQ
@@ -742,27 +759,27 @@ void usb_irqhandler(void) {
     puts(" USB interrupt!\n");
   #endif
 
-  if (gintsts & USB_OTG_GINTSTS_CIDSCHG) {
+  if ((gintsts & USB_OTG_GINTSTS_CIDSCHG) != 0) {
     puts("connector ID status change\n");
   }
 
-  if (gintsts & USB_OTG_GINTSTS_ESUSP) {
+  if ((gintsts & USB_OTG_GINTSTS_ESUSP) != 0) {
     puts("ESUSP detected\n");
   }
 
-  if (gintsts & USB_OTG_GINTSTS_USBRST) {
+  if ((gintsts & USB_OTG_GINTSTS_USBRST) != 0) {
     puts("USB reset\n");
     usb_reset();
   }
 
-  if (gintsts & USB_OTG_GINTSTS_ENUMDNE) {
+  if ((gintsts & USB_OTG_GINTSTS_ENUMDNE) != 0) {
     puts("enumeration done");
     // Full speed, ENUMSPD
     //puth(USBx_DEVICE->DSTS);
     puts("\n");
   }
 
-  if (gintsts & USB_OTG_GINTSTS_OTGINT) {
+  if ((gintsts & USB_OTG_GINTSTS_OTGINT) != 0) {
     puts("OTG int:");
     puth(USBx->GOTGINT);
     puts("\n");
@@ -772,24 +789,25 @@ void usb_irqhandler(void) {
   }
 
   // RX FIFO first
-  if (gintsts & USB_OTG_GINTSTS_RXFLVL) {
+  if ((gintsts & USB_OTG_GINTSTS_RXFLVL) != 0) {
     // 1. Read the Receive status pop register
     volatile unsigned int rxst = USBx->GRXSTSP;
+    int status = (rxst & USB_OTG_GRXSTSP_PKTSTS) >> 17;
 
     #ifdef DEBUG_USB
       puts(" RX FIFO:");
       puth(rxst);
       puts(" status: ");
-      puth((rxst & USB_OTG_GRXSTSP_PKTSTS) >> 17);
+      puth(status);
       puts(" len: ");
       puth((rxst & USB_OTG_GRXSTSP_BCNT) >> 4);
       puts("\n");
     #endif
 
-    if (((rxst & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT) {
+    if (status == STS_DATA_UPDT) {
       int endpoint = (rxst & USB_OTG_GRXSTSP_EPNUM);
       int len = (rxst & USB_OTG_GRXSTSP_BCNT) >> 4;
-      USB_ReadPacket(&usbdata, len);
+      (void)USB_ReadPacket(&usbdata, len);
       #ifdef DEBUG_USB
         puts("  data ");
         puth(len);
@@ -804,13 +822,15 @@ void usb_irqhandler(void) {
       if (endpoint == 3) {
         usb_cb_ep3_out(usbdata, len, 1);
       }
-    } else if (((rxst & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT) {
-      USB_ReadPacket(&setup, 8);
+    } else if (status == STS_SETUP_UPDT) {
+      (void)USB_ReadPacket(&setup, 8);
       #ifdef DEBUG_USB
         puts("  setup ");
         hexdump(&setup, 8);
         puts("\n");
       #endif
+    } else {
+      // status is neither STS_DATA_UPDT or STS_SETUP_UPDT, skip
     }
   }
 
@@ -834,7 +854,7 @@ void usb_irqhandler(void) {
     USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK | USB_OTG_DCTL_CGINAK;
   }
 
-  if (gintsts & USB_OTG_GINTSTS_SRQINT) {
+  if ((gintsts & USB_OTG_GINTSTS_SRQINT) != 0) {
     // we want to do "A-device host negotiation protocol" since we are the A-device
     /*puts("start request\n");
     puth(USBx->GOTGCTL);
@@ -845,7 +865,7 @@ void usb_irqhandler(void) {
   }
 
   // out endpoint hit
-  if (gintsts & USB_OTG_GINTSTS_OEPINT) {
+  if ((gintsts & USB_OTG_GINTSTS_OEPINT) != 0) {
     #ifdef DEBUG_USB
       puts("  0:");
       puth(USBx_OUTEP(0)->DOEPINT);
@@ -860,40 +880,42 @@ void usb_irqhandler(void) {
       puts(" OUT ENDPOINT\n");
     #endif
 
-    if (USBx_OUTEP(2)->DOEPINT & USB_OTG_DOEPINT_XFRC) {
+    if ((USBx_OUTEP(2)->DOEPINT & USB_OTG_DOEPINT_XFRC) != 0) {
       #ifdef DEBUG_USB
         puts("  OUT2 PACKET XFRC\n");
       #endif
-      USBx_OUTEP(2)->DOEPTSIZ = (1 << 19) | 0x40;
+      USBx_OUTEP(2)->DOEPTSIZ = (1U << 19) | 0x40U;
       USBx_OUTEP(2)->DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_CNAK;
     }
 
-    if (USBx_OUTEP(3)->DOEPINT & USB_OTG_DOEPINT_XFRC) {
+    if ((USBx_OUTEP(3)->DOEPINT & USB_OTG_DOEPINT_XFRC) != 0) {
       #ifdef DEBUG_USB
         puts("  OUT3 PACKET XFRC\n");
       #endif
-      USBx_OUTEP(3)->DOEPTSIZ = (1 << 19) | 0x40;
+      USBx_OUTEP(3)->DOEPTSIZ = (1U << 19) | 0x40U;
       USBx_OUTEP(3)->DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_CNAK;
-    } else if (USBx_OUTEP(3)->DOEPINT & 0x2000) {
+    } else if ((USBx_OUTEP(3)->DOEPINT & 0x2000) != 0) {
       #ifdef DEBUG_USB
         puts("  OUT3 PACKET WTF\n");
       #endif
       // if NAK was set trigger this, unknown interrupt
-      USBx_OUTEP(3)->DOEPTSIZ = (1 << 19) | 0x40;
+      USBx_OUTEP(3)->DOEPTSIZ = (1U << 19) | 0x40U;
       USBx_OUTEP(3)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
-    } else if (USBx_OUTEP(3)->DOEPINT) {
+    } else if ((USBx_OUTEP(3)->DOEPINT) != 0) {
       puts("OUTEP3 error ");
       puth(USBx_OUTEP(3)->DOEPINT);
       puts("\n");
+    } else {
+      // USBx_OUTEP(3)->DOEPINT is 0, ok to skip
     }
 
-    if (USBx_OUTEP(0)->DOEPINT & USB_OTG_DIEPINT_XFRC) {
+    if ((USBx_OUTEP(0)->DOEPINT & USB_OTG_DIEPINT_XFRC) != 0) {
       // ready for next packet
-      USBx_OUTEP(0)->DOEPTSIZ = USB_OTG_DOEPTSIZ_STUPCNT | (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) | (1 * 8);
+      USBx_OUTEP(0)->DOEPTSIZ = USB_OTG_DOEPTSIZ_STUPCNT | (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19)) | (1U << 3);
     }
 
     // respond to setup packets
-    if (USBx_OUTEP(0)->DOEPINT & USB_OTG_DOEPINT_STUP) {
+    if ((USBx_OUTEP(0)->DOEPINT & USB_OTG_DOEPINT_STUP) != 0) {
       usb_setup();
     }
 
@@ -903,7 +925,7 @@ void usb_irqhandler(void) {
   }
 
   // interrupt endpoint hit (Page 1221)
-  if (gintsts & USB_OTG_GINTSTS_IEPINT) {
+  if ((gintsts & USB_OTG_GINTSTS_IEPINT) != 0) {
     #ifdef DEBUG_USB
       puts("  ");
       puth(USBx_INEP(0)->DIEPINT);
@@ -918,8 +940,8 @@ void usb_irqhandler(void) {
     // No need to set NAK in OTG_DIEPCTL0 when nothing to send,
     // Appears USB core automatically sets NAK. WritePacket clears it.
 
-    // Handle the two interface alternate settings. Setting 0 is has
-    // EP1 as bulk. Setting 1 has EP1 as interrupt. The code to handle
+    // Handle the two interface alternate settings. Setting 0 has EP1
+    // as bulk. Setting 1 has EP1 as interrupt. The code to handle
     // these two EP variations are very similar and can be
     // restructured for smaller code footprint. Keeping split out for
     // now for clarity.
@@ -928,7 +950,7 @@ void usb_irqhandler(void) {
     switch (current_int0_alt_setting) {
       case 0: ////// Bulk config
         // *** IN token received when TxFIFO is empty
-        if (USBx_INEP(1)->DIEPINT & USB_OTG_DIEPMSK_ITTXFEMSK) {
+        if ((USBx_INEP(1)->DIEPINT & USB_OTG_DIEPMSK_ITTXFEMSK) != 0) {
           #ifdef DEBUG_USB
           puts("  IN PACKET QUEUE\n");
           #endif
@@ -939,7 +961,7 @@ void usb_irqhandler(void) {
 
       case 1: ////// Interrupt config
         // *** IN token received when TxFIFO is empty
-        if (USBx_INEP(1)->DIEPINT & USB_OTG_DIEPMSK_ITTXFEMSK) {
+        if ((USBx_INEP(1)->DIEPINT & USB_OTG_DIEPMSK_ITTXFEMSK) != 0) {
           #ifdef DEBUG_USB
           puts("  IN PACKET QUEUE\n");
           #endif
@@ -950,19 +972,22 @@ void usb_irqhandler(void) {
           }
         }
         break;
+      default:
+        puts("current_int0_alt_setting value invalid\n");
+        break;
     }
 
-    if (USBx_INEP(0)->DIEPINT & USB_OTG_DIEPMSK_ITTXFEMSK) {
+    if ((USBx_INEP(0)->DIEPINT & USB_OTG_DIEPMSK_ITTXFEMSK) != 0) {
       #ifdef DEBUG_USB
       puts("  IN PACKET QUEUE\n");
       #endif
 
-      if (ep0_txlen != 0 && (USBx_INEP(0)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) >= 0x40) {
-        uint16_t len = min(ep0_txlen, 0x40);
+      if ((ep0_txlen != 0U) && ((USBx_INEP(0)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) >= 0x40U)) {
+        uint16_t len = MIN(ep0_txlen, 0x40);
         USB_WritePacket(ep0_txdata, len, 0);
         ep0_txdata += len;
         ep0_txlen -= len;
-        if (ep0_txlen == 0) {
+        if (ep0_txlen == 0U) {
           ep0_txdata = NULL;
           USBx_DEVICE->DIEPEMPMSK &= ~1;
           USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;

panda/board/gpio.h

@@ -1,3 +1,5 @@
+// this is last place with ifdef PANDA
+
 #ifdef STM32F4
   #include "stm32f4xx_hal_gpio_ex.h"
 #else
@@ -11,23 +13,25 @@
 
 #define PULL_EFFECTIVE_DELAY 10
 
-int has_external_debug_serial = 0;
-int is_giant_panda = 0;
-int is_entering_bootmode = 0;
-int revision = PANDA_REV_AB;
-int is_grey_panda = 0;
+void puts(const char *a);
 
-int detect_with_pull(GPIO_TypeDef *GPIO, int pin, int mode) {
+bool has_external_debug_serial = 0;
+bool is_giant_panda = 0;
+bool is_entering_bootmode = 0;
+int revision = PANDA_REV_AB;
+bool is_grey_panda = 0;
+
+bool detect_with_pull(GPIO_TypeDef *GPIO, int pin, int mode) {
   set_gpio_mode(GPIO, pin, MODE_INPUT);
   set_gpio_pullup(GPIO, pin, mode);
   for (volatile int i=0; i<PULL_EFFECTIVE_DELAY; i++);
-  int ret = get_gpio_input(GPIO, pin);
+  bool ret = get_gpio_input(GPIO, pin);
   set_gpio_pullup(GPIO, pin, PULL_NONE);
   return ret;
 }
 
 // must call again from main because BSS is zeroed
-void detect() {
+void detect(void) {
   // detect has_external_debug_serial
   has_external_debug_serial = detect_with_pull(GPIOA, 3, PULL_DOWN);
 
@@ -61,44 +65,7 @@ void detect() {
 
 // ********************* bringup *********************
 
-void clock_init() {
-  // enable external oscillator
-  RCC->CR |= RCC_CR_HSEON;
-  while ((RCC->CR & RCC_CR_HSERDY) == 0);
-
-  // divide shit
-  RCC->CFGR = RCC_CFGR_HPRE_DIV1 | RCC_CFGR_PPRE2_DIV2 | RCC_CFGR_PPRE1_DIV4;
-  #ifdef PANDA
-    RCC->PLLCFGR = RCC_PLLCFGR_PLLQ_2 | RCC_PLLCFGR_PLLM_3 |
-                   RCC_PLLCFGR_PLLN_6 | RCC_PLLCFGR_PLLN_5 | RCC_PLLCFGR_PLLSRC_HSE;
-  #else
-    #ifdef PEDAL
-      // comma pedal has a 16mhz crystal
-      RCC->PLLCFGR = RCC_PLLCFGR_PLLQ_2 | RCC_PLLCFGR_PLLM_3 |
-                     RCC_PLLCFGR_PLLN_6 | RCC_PLLCFGR_PLLN_5 | RCC_PLLCFGR_PLLSRC_HSE;
-    #else
-      // NEO board has a 8mhz crystal
-      RCC->PLLCFGR = RCC_PLLCFGR_PLLQ_2 | RCC_PLLCFGR_PLLM_3 |
-                     RCC_PLLCFGR_PLLN_7 | RCC_PLLCFGR_PLLN_6 | RCC_PLLCFGR_PLLSRC_HSE;
-    #endif
-  #endif
-
-  // start PLL
-  RCC->CR |= RCC_CR_PLLON;
-  while ((RCC->CR & RCC_CR_PLLRDY) == 0);
-
-  // Configure Flash prefetch, Instruction cache, Data cache and wait state
-  // *** without this, it breaks ***
-  FLASH->ACR = FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_5WS;
-
-  // switch to PLL
-  RCC->CFGR |= RCC_CFGR_SW_PLL;
-  while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL);
-
-  // *** running on PLL ***
-}
-
-void periph_init() {
+void periph_init(void) {
   // enable GPIOB, UART2, CAN, USB clock
   RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
   RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN;
@@ -117,26 +84,24 @@ void periph_init() {
     RCC->APB1ENR |= RCC_APB1ENR_CAN3EN;
   #endif
   RCC->APB1ENR |= RCC_APB1ENR_DACEN;
-  RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
-  RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;
-  RCC->APB1ENR |= RCC_APB1ENR_TIM4EN;
-  RCC->APB1ENR |= RCC_APB1ENR_TIM5EN;
-  RCC->APB1ENR |= RCC_APB1ENR_TIM6EN;
+  RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;  // main counter
+  RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;  // slow loop and pedal
+  RCC->APB1ENR |= RCC_APB1ENR_TIM4EN;  // gmlan_alt
+  //RCC->APB1ENR |= RCC_APB1ENR_TIM5EN;
+  //RCC->APB1ENR |= RCC_APB1ENR_TIM6EN;
   RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
   RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN;
-  RCC->APB2ENR |= RCC_APB2ENR_TIM1EN;
+  //RCC->APB2ENR |= RCC_APB2ENR_TIM1EN;
   RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
   RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
-
-  // needed?
   RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
 }
 
 // ********************* setters *********************
 
-void set_can_enable(CAN_TypeDef *CAN, int enabled) {
+void set_can_enable(CAN_TypeDef *CAN_obj, bool enabled) {
   // enable CAN busses
-  if (CAN == CAN1) {
+  if (CAN_obj == CAN1) {
     #ifdef PANDA
       // CAN1_EN
       set_gpio_output(GPIOC, 1, !enabled);
@@ -149,7 +114,7 @@ void set_can_enable(CAN_TypeDef *CAN, int enabled) {
         set_gpio_output(GPIOB, 3, enabled);
       #endif
     #endif
-  } else if (CAN == CAN2) {
+  } else if (CAN_obj == CAN2) {
     #ifdef PANDA
       // CAN2_EN
       set_gpio_output(GPIOC, 13, !enabled);
@@ -158,10 +123,12 @@ void set_can_enable(CAN_TypeDef *CAN, int enabled) {
       set_gpio_output(GPIOB, 4, enabled);
     #endif
   #ifdef CAN3
-  } else if (CAN == CAN3) {
+  } else if (CAN_obj == CAN3) {
     // CAN3_EN
     set_gpio_output(GPIOA, 0, !enabled);
   #endif
+  } else {
+    puts("Invalid CAN: enabling failed\n");
   }
 }
 
@@ -176,16 +143,16 @@ void set_can_enable(CAN_TypeDef *CAN, int enabled) {
 #endif
 
 void set_led(int led_num, int on) {
-  if (led_num == -1) return;
-
+  if (led_num != -1) {
   #ifdef PANDA
     set_gpio_output(GPIOC, led_num, !on);
   #else
     set_gpio_output(GPIOB, led_num, !on);
   #endif
+  }
 }
 
-void set_can_mode(int can, int use_gmlan) {
+void set_can_mode(int can, bool use_gmlan) {
   // connects to CAN2 xcvr or GMLAN xcvr
   if (use_gmlan) {
     if (can == 1) {
@@ -197,7 +164,7 @@ void set_can_mode(int can, int use_gmlan) {
       set_gpio_alternate(GPIOB, 12, GPIO_AF9_CAN2);
       set_gpio_alternate(GPIOB, 13, GPIO_AF9_CAN2);
 #ifdef CAN3
-    } else if (revision == PANDA_REV_C && can == 2) {
+    } else if (can == 2) {
       // A8,A15: disable normal mode
       set_gpio_mode(GPIOA, 8, MODE_INPUT);
       set_gpio_mode(GPIOA, 15, MODE_INPUT);
@@ -206,6 +173,8 @@ void set_can_mode(int can, int use_gmlan) {
       set_gpio_alternate(GPIOB, 3, GPIO_AF11_CAN3);
       set_gpio_alternate(GPIOB, 4, GPIO_AF11_CAN3);
 #endif
+    } else {
+      puts("Invalid CAN: mode setting failed\n");
     }
   } else {
     if (can == 1) {
@@ -218,15 +187,15 @@ void set_can_mode(int can, int use_gmlan) {
       set_gpio_alternate(GPIOB, 6, GPIO_AF9_CAN2);
 #ifdef CAN3
     } else if (can == 2) {
-      if(revision == PANDA_REV_C){
-        // B3,B4: disable gmlan mode
-        set_gpio_mode(GPIOB, 3, MODE_INPUT);
-        set_gpio_mode(GPIOB, 4, MODE_INPUT);
-      }
+      // B3,B4: disable gmlan mode
+      set_gpio_mode(GPIOB, 3, MODE_INPUT);
+      set_gpio_mode(GPIOB, 4, MODE_INPUT);
       // A8,A15: normal mode
       set_gpio_alternate(GPIOA, 8, GPIO_AF11_CAN3);
       set_gpio_alternate(GPIOA, 15, GPIO_AF11_CAN3);
 #endif
+    } else {
+      puts("Invalid CAN: mode setting failed\n");
     }
   }
 }
@@ -239,6 +208,7 @@ void set_can_mode(int can, int use_gmlan) {
 int usb_power_mode = USB_POWER_NONE;
 
 void set_usb_power_mode(int mode) {
+  bool valid_mode = true;
   switch (mode) {
     case USB_POWER_CLIENT:
       // B2,A13: set client mode
@@ -255,8 +225,15 @@ void set_usb_power_mode(int mode) {
       set_gpio_output(GPIOB, 2, 0);
       set_gpio_output(GPIOA, 13, 0);
       break;
+    default:
+      valid_mode = false;
+      puts("Invalid usb power mode\n");
+      break;
+  }
+
+  if (valid_mode) {
+    usb_power_mode = mode;
   }
-  usb_power_mode = mode;
 }
 
 #define ESP_DISABLED 0
@@ -279,13 +256,16 @@ void set_esp_mode(int mode) {
       set_gpio_output(GPIOC, 14, 1);
       set_gpio_output(GPIOC, 5, 0);
       break;
+    default:
+      puts("Invalid esp mode\n");
+      break;
   }
 }
 
 // ********************* big init function *********************
 
 // board specific
-void gpio_init() {
+void gpio_init(void) {
   // pull low to hold ESP in reset??
   // enable OTG out tied to ground
   GPIOA->ODR = 0;
@@ -377,11 +357,7 @@ void gpio_init() {
 
   #ifdef PANDA
     // K-line enable moved from B4->B7 to make room for GMLAN on CAN3
-    if (revision == PANDA_REV_C) {
-      set_gpio_output(GPIOB, 7, 1); // REV C
-    } else {
-      set_gpio_output(GPIOB, 4, 1); // REV AB
-    }
+    set_gpio_output(GPIOB, 7, 1); // REV C
 
     // C12,D2: K-Line setup on UART 5
     set_gpio_alternate(GPIOC, 12, GPIO_AF8_UART5);
@@ -392,16 +368,12 @@ void gpio_init() {
     set_gpio_output(GPIOA, 14, 1);
 
     // C10,C11: L-Line setup on USART 3
-    // LLine now used for relay output
-    set_gpio_output(GPIOC, 10, 1);
-    //set_gpio_alternate(GPIOC, 10, GPIO_AF7_USART3);
+    set_gpio_alternate(GPIOC, 10, GPIO_AF7_USART3);
     set_gpio_alternate(GPIOC, 11, GPIO_AF7_USART3);
     set_gpio_pullup(GPIOC, 11, PULL_UP);
   #endif
 
-  if (revision == PANDA_REV_C) {
-    set_usb_power_mode(USB_POWER_CLIENT);
-  }
+  set_usb_power_mode(USB_POWER_CLIENT);
 }
 
 // ********************* early bringup *********************
@@ -413,7 +385,7 @@ void gpio_init() {
 extern void *g_pfnVectors;
 extern uint32_t enter_bootloader_mode;
 
-void jump_to_bootloader() {
+void jump_to_bootloader(void) {
   // do enter bootloader
   enter_bootloader_mode = 0;
   void (*bootloader)(void) = (void (*)(void)) (*((uint32_t *)0x1fff0004));
@@ -426,11 +398,11 @@ void jump_to_bootloader() {
   NVIC_SystemReset();
 }
 
-void early() {
+void early(void) {
   // after it's been in the bootloader, things are initted differently, so we reset
-  if (enter_bootloader_mode != BOOT_NORMAL &&
-      enter_bootloader_mode != ENTER_BOOTLOADER_MAGIC &&
-      enter_bootloader_mode != ENTER_SOFTLOADER_MAGIC) {
+  if ((enter_bootloader_mode != BOOT_NORMAL) &&
+      (enter_bootloader_mode != ENTER_BOOTLOADER_MAGIC) &&
+      (enter_bootloader_mode != ENTER_SOFTLOADER_MAGIC)) {
     enter_bootloader_mode = BOOT_NORMAL;
     NVIC_SystemReset();
   }
@@ -438,9 +410,13 @@ void early() {
   // if wrong chip, reboot
   volatile unsigned int id = DBGMCU->IDCODE;
   #ifdef STM32F4
-    if ((id&0xFFF) != 0x463) enter_bootloader_mode = ENTER_BOOTLOADER_MAGIC;
+    if ((id & 0xFFFU) != 0x463U) {
+      enter_bootloader_mode = ENTER_BOOTLOADER_MAGIC;
+    }
   #else
-    if ((id&0xFFF) != 0x411) enter_bootloader_mode = ENTER_BOOTLOADER_MAGIC;
+    if ((id & 0xFFFU) != 0x411U) {
+      enter_bootloader_mode = ENTER_BOOTLOADER_MAGIC;
+    }
   #endif
 
   // setup interrupt table

panda/board/inc/stm32f205xx.h

@@ -4,8 +4,8 @@
   * @author  MCD Application Team
   * @version V2.1.2
   * @date    29-June-2016
-  * @brief   CMSIS STM32F205xx Device Peripheral Access Layer Header File. 
-  *          This file contains :  
+  * @brief   CMSIS STM32F205xx Device Peripheral Access Layer Header File.
+  *          This file contains :
   *           - Data structures and the address mapping for all peripherals
   *           - Peripherals registers declarations and bits definition
   *           - Macros to access peripheral’s registers hardware
@@ -47,21 +47,21 @@
 /** @addtogroup stm32f205xx
   * @{
   */
-    
+
 #ifndef __STM32F205xx_H
 #define __STM32F205xx_H
 
 #ifdef __cplusplus
  extern "C" {
 #endif /* __cplusplus */
-  
+
 
 /** @addtogroup Configuration_section_for_CMSIS
   * @{
   */
 
 /**
-  * @brief Configuration of the Cortex-M3 Processor and Core Peripherals 
+  * @brief Configuration of the Cortex-M3 Processor and Core Peripherals
   */
 #define __CM3_REV                 0x0200U  /*!< Core revision r0p1                            */
 #define __MPU_PRESENT             1U       /*!< STM32F2XX provides an MPU                     */
@@ -71,14 +71,14 @@
 /**
   * @}
   */
-   
+
 /** @addtogroup Peripheral_interrupt_number_definition
   * @{
   */
 
 /**
- * @brief STM32F2XX Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
+ * @brief STM32F2XX Interrupt Number Definition, according to the selected device
+ *        in @ref Library_configuration_section
  */
 typedef enum
 {
@@ -126,7 +126,7 @@ typedef enum
   I2C1_EV_IRQn                = 31,     /*!< I2C1 Event Interrupt                                              */
   I2C1_ER_IRQn                = 32,     /*!< I2C1 Error Interrupt                                              */
   I2C2_EV_IRQn                = 33,     /*!< I2C2 Event Interrupt                                              */
-  I2C2_ER_IRQn                = 34,     /*!< I2C2 Error Interrupt                                              */  
+  I2C2_ER_IRQn                = 34,     /*!< I2C2 Error Interrupt                                              */
   SPI1_IRQn                   = 35,     /*!< SPI1 global Interrupt                                             */
   SPI2_IRQn                   = 36,     /*!< SPI2 global Interrupt                                             */
   USART1_IRQn                 = 37,     /*!< USART1 global Interrupt                                           */
@@ -134,7 +134,7 @@ typedef enum
   USART3_IRQn                 = 39,     /*!< USART3 global Interrupt                                           */
   EXTI15_10_IRQn              = 40,     /*!< External Line[15:10] Interrupts                                   */
   RTC_Alarm_IRQn              = 41,     /*!< RTC Alarm (A and B) through EXTI Line Interrupt                   */
-  OTG_FS_WKUP_IRQn            = 42,     /*!< USB OTG FS Wakeup through EXTI line interrupt                     */    
+  OTG_FS_WKUP_IRQn            = 42,     /*!< USB OTG FS Wakeup through EXTI line interrupt                     */
   TIM8_BRK_TIM12_IRQn         = 43,     /*!< TIM8 Break Interrupt and TIM12 global interrupt                   */
   TIM8_UP_TIM13_IRQn          = 44,     /*!< TIM8 Update Interrupt and TIM13 global interrupt                  */
   TIM8_TRG_COM_TIM14_IRQn     = 45,     /*!< TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt */
@@ -181,16 +181,16 @@ typedef enum
 
 /** @addtogroup Peripheral_registers_structures
   * @{
-  */   
+  */
 
-/** 
-  * @brief Analog to Digital Converter  
+/**
+  * @brief Analog to Digital Converter
   */
 
 typedef struct
 {
   __IO uint32_t SR;     /*!< ADC status register,                         Address offset: 0x00 */
-  __IO uint32_t CR1;    /*!< ADC control register 1,                      Address offset: 0x04 */      
+  __IO uint32_t CR1;    /*!< ADC control register 1,                      Address offset: 0x04 */
   __IO uint32_t CR2;    /*!< ADC control register 2,                      Address offset: 0x08 */
   __IO uint32_t SMPR1;  /*!< ADC sample time register 1,                  Address offset: 0x0C */
   __IO uint32_t SMPR2;  /*!< ADC sample time register 2,                  Address offset: 0x10 */
@@ -220,8 +220,8 @@ typedef struct
 } ADC_Common_TypeDef;
 
 
-/** 
-  * @brief Controller Area Network TxMailBox 
+/**
+  * @brief Controller Area Network TxMailBox
   */
 
 typedef struct
@@ -232,10 +232,10 @@ typedef struct
   __IO uint32_t TDHR; /*!< CAN mailbox data high register */
 } CAN_TxMailBox_TypeDef;
 
-/** 
-  * @brief Controller Area Network FIFOMailBox 
+/**
+  * @brief Controller Area Network FIFOMailBox
   */
-  
+
 typedef struct
 {
   __IO uint32_t RIR;  /*!< CAN receive FIFO mailbox identifier register */
@@ -244,20 +244,20 @@ typedef struct
   __IO uint32_t RDHR; /*!< CAN receive FIFO mailbox data high register */
 } CAN_FIFOMailBox_TypeDef;
 
-/** 
-  * @brief Controller Area Network FilterRegister 
+/**
+  * @brief Controller Area Network FilterRegister
   */
-  
+
 typedef struct
 {
   __IO uint32_t FR1; /*!< CAN Filter bank register 1 */
   __IO uint32_t FR2; /*!< CAN Filter bank register 1 */
 } CAN_FilterRegister_TypeDef;
 
-/** 
-  * @brief Controller Area Network 
+/**
+  * @brief Controller Area Network
   */
-  
+
 typedef struct
 {
   __IO uint32_t              MCR;                 /*!< CAN master control register,         Address offset: 0x00          */
@@ -280,12 +280,12 @@ typedef struct
   __IO uint32_t              FFA1R;               /*!< CAN filter FIFO assignment register, Address offset: 0x214         */
   uint32_t                   RESERVED4;           /*!< Reserved, 0x218                                                    */
   __IO uint32_t              FA1R;                /*!< CAN filter activation register,      Address offset: 0x21C         */
-  uint32_t                   RESERVED5[8];        /*!< Reserved, 0x220-0x23F                                              */ 
+  uint32_t                   RESERVED5[8];        /*!< Reserved, 0x220-0x23F                                              */
   CAN_FilterRegister_TypeDef sFilterRegister[28]; /*!< CAN Filter Register,                 Address offset: 0x240-0x31C   */
 } CAN_TypeDef;
 
-/** 
-  * @brief CRC calculation unit 
+/**
+  * @brief CRC calculation unit
   */
 
 typedef struct
@@ -297,7 +297,7 @@ typedef struct
   __IO uint32_t CR;         /*!< CRC Control register,          Address offset: 0x08 */
 } CRC_TypeDef;
 
-/** 
+/**
   * @brief Digital to Analog Converter
   */
 
@@ -319,7 +319,7 @@ typedef struct
   __IO uint32_t SR;       /*!< DAC status register,                                     Address offset: 0x34 */
 } DAC_TypeDef;
 
-/** 
+/**
   * @brief Debug MCU
   */
 
@@ -332,7 +332,7 @@ typedef struct
 }DBGMCU_TypeDef;
 
 
-/** 
+/**
   * @brief DMA Controller
   */
 
@@ -355,7 +355,7 @@ typedef struct
 } DMA_TypeDef;
 
 
-/** 
+/**
   * @brief External Interrupt/Event Controller
   */
 
@@ -369,7 +369,7 @@ typedef struct
   __IO uint32_t PR;     /*!< EXTI Pending register,                   Address offset: 0x14 */
 } EXTI_TypeDef;
 
-/** 
+/**
   * @brief FLASH Registers
   */
 
@@ -384,28 +384,28 @@ typedef struct
 } FLASH_TypeDef;
 
 
-/** 
+/**
   * @brief Flexible Static Memory Controller
   */
 
 typedef struct
 {
-  __IO uint32_t BTCR[8];    /*!< NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR), Address offset: 0x00-1C */   
-} FSMC_Bank1_TypeDef; 
+  __IO uint32_t BTCR[8];    /*!< NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR), Address offset: 0x00-1C */
+} FSMC_Bank1_TypeDef;
 
-/** 
+/**
   * @brief Flexible Static Memory Controller Bank1E
   */
-  
+
 typedef struct
 {
   __IO uint32_t BWTR[7];    /*!< NOR/PSRAM write timing registers, Address offset: 0x104-0x11C */
 } FSMC_Bank1E_TypeDef;
 
-/** 
+/**
   * @brief Flexible Static Memory Controller Bank2
   */
-  
+
 typedef struct
 {
   __IO uint32_t PCR2;       /*!< NAND Flash control register 2,                       Address offset: 0x60 */
@@ -424,10 +424,10 @@ typedef struct
   __IO uint32_t ECCR3;      /*!< NAND Flash ECC result registers 3,                   Address offset: 0x94 */
 } FSMC_Bank2_3_TypeDef;
 
-/** 
+/**
   * @brief Flexible Static Memory Controller Bank4
   */
-  
+
 typedef struct
 {
   __IO uint32_t PCR4;       /*!< PC Card  control register 4,                       Address offset: 0xA0 */
@@ -435,10 +435,10 @@ typedef struct
   __IO uint32_t PMEM4;      /*!< PC Card  Common memory space timing register 4,    Address offset: 0xA8 */
   __IO uint32_t PATT4;      /*!< PC Card  Attribute memory space timing register 4, Address offset: 0xAC */
   __IO uint32_t PIO4;       /*!< PC Card  I/O space timing register 4,              Address offset: 0xB0 */
-} FSMC_Bank4_TypeDef; 
+} FSMC_Bank4_TypeDef;
 
 
-/** 
+/**
   * @brief General Purpose I/O
   */
 
@@ -455,20 +455,20 @@ typedef struct
   __IO uint32_t AFR[2];   /*!< GPIO alternate function registers,     Address offset: 0x20-0x24 */
 } GPIO_TypeDef;
 
-/** 
+/**
   * @brief System configuration controller
   */
-  
+
 typedef struct
 {
   __IO uint32_t MEMRMP;       /*!< SYSCFG memory remap register,                      Address offset: 0x00      */
   __IO uint32_t PMC;          /*!< SYSCFG peripheral mode configuration register,     Address offset: 0x04      */
   __IO uint32_t EXTICR[4];    /*!< SYSCFG external interrupt configuration registers, Address offset: 0x08-0x14 */
-  uint32_t      RESERVED[2];  /*!< Reserved, 0x18-0x1C                                                          */ 
+  uint32_t      RESERVED[2];  /*!< Reserved, 0x18-0x1C                                                          */
   __IO uint32_t CMPCR;        /*!< SYSCFG Compensation cell control register,         Address offset: 0x20      */
 } SYSCFG_TypeDef;
 
-/** 
+/**
   * @brief Inter-integrated Circuit Interface
   */
 
@@ -485,7 +485,7 @@ typedef struct
   __IO uint32_t TRISE;      /*!< I2C TRISE register,         Address offset: 0x20 */
 } I2C_TypeDef;
 
-/** 
+/**
   * @brief Independent WATCHDOG
   */
 
@@ -497,7 +497,7 @@ typedef struct
   __IO uint32_t SR;   /*!< IWDG Status register,    Address offset: 0x0C */
 } IWDG_TypeDef;
 
-/** 
+/**
   * @brief Power Control
   */
 
@@ -507,7 +507,7 @@ typedef struct
   __IO uint32_t CSR;  /*!< PWR power control/status register, Address offset: 0x04 */
 } PWR_TypeDef;
 
-/** 
+/**
   * @brief Reset and Clock Control
   */
 
@@ -546,7 +546,7 @@ typedef struct
 
 } RCC_TypeDef;
 
-/** 
+/**
   * @brief Real-Time Clock
   */
 
@@ -595,7 +595,7 @@ typedef struct
 } RTC_TypeDef;
 
 
-/** 
+/**
   * @brief SD host Interface
   */
 
@@ -623,7 +623,7 @@ typedef struct
   __IO uint32_t FIFO;           /*!< SDIO data FIFO register,        Address offset: 0x80 */
 } SDIO_TypeDef;
 
-/** 
+/**
   * @brief Serial Peripheral Interface
   */
 
@@ -640,7 +640,7 @@ typedef struct
   __IO uint32_t I2SPR;      /*!< SPI_I2S prescaler register,                         Address offset: 0x20 */
 } SPI_TypeDef;
 
-/** 
+/**
   * @brief TIM
   */
 
@@ -669,10 +669,10 @@ typedef struct
   __IO uint32_t OR;          /*!< TIM option register,                 Address offset: 0x50 */
 } TIM_TypeDef;
 
-/** 
+/**
   * @brief Universal Synchronous Asynchronous Receiver Transmitter
   */
- 
+
 typedef struct
 {
   __IO uint32_t SR;         /*!< USART Status register,                   Address offset: 0x00 */
@@ -684,7 +684,7 @@ typedef struct
   __IO uint32_t GTPR;       /*!< USART Guard time and prescaler register, Address offset: 0x18 */
 } USART_TypeDef;
 
-/** 
+/**
   * @brief Window WATCHDOG
   */
 
@@ -696,11 +696,11 @@ typedef struct
 } WWDG_TypeDef;
 
 
-/** 
+/**
   * @brief RNG
   */
-  
-typedef struct 
+
+typedef struct
 {
   __IO uint32_t CR;  /*!< RNG control register, Address offset: 0x00 */
   __IO uint32_t SR;  /*!< RNG status register,  Address offset: 0x04 */
@@ -708,8 +708,8 @@ typedef struct
 } RNG_TypeDef;
 
 
- 
-/** 
+
+/**
   * @brief __USB_OTG_Core_register
   */
 typedef struct
@@ -737,10 +737,10 @@ USB_OTG_GlobalTypeDef;
 
 
 
-/** 
+/**
   * @brief __device_Registers
   */
-typedef struct 
+typedef struct
 {
   __IO uint32_t DCFG;         /*!< dev Configuration Register   Address offset : 0x800 */
   __IO uint32_t DCTL;         /*!< dev Control Register         Address offset : 0x804 */
@@ -757,19 +757,19 @@ typedef struct
   __IO uint32_t DTHRCTL;      /*!< dev thr                      Address offset : 0x830 */
   __IO uint32_t DIEPEMPMSK;   /*!< dev empty msk                Address offset : 0x834 */
   __IO uint32_t DEACHINT;     /*!< dedicated EP interrupt       Address offset : 0x838 */
-  __IO uint32_t DEACHMSK;     /*!< dedicated EP msk             Address offset : 0x83C */  
+  __IO uint32_t DEACHMSK;     /*!< dedicated EP msk             Address offset : 0x83C */
   uint32_t Reserved40;        /*!< dedicated EP mask            Address offset : 0x840 */
   __IO uint32_t DINEP1MSK;    /*!< dedicated EP mask            Address offset : 0x844 */
   uint32_t  Reserved44[15];   /*!< Reserved                     Address offset : 0x844-0x87C */
-  __IO uint32_t DOUTEP1MSK;   /*!< dedicated EP msk             Address offset : 0x884 */   
+  __IO uint32_t DOUTEP1MSK;   /*!< dedicated EP msk             Address offset : 0x884 */
 }
 USB_OTG_DeviceTypeDef;
 
 
-/** 
+/**
   * @brief __IN_Endpoint-Specific_Register
   */
-typedef struct 
+typedef struct
 {
   __IO uint32_t DIEPCTL;        /* dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h     */
   uint32_t Reserved04;          /* Reserved                       900h + (ep_num * 20h) + 04h  */
@@ -783,10 +783,10 @@ typedef struct
 USB_OTG_INEndpointTypeDef;
 
 
-/** 
+/**
   * @brief __OUT_Endpoint-Specific_Registers
   */
-typedef struct 
+typedef struct
 {
   __IO uint32_t DOEPCTL;       /* dev OUT Endpoint Control Reg  B00h + (ep_num * 20h) + 00h*/
   uint32_t Reserved04;         /* Reserved                      B00h + (ep_num * 20h) + 04h*/
@@ -799,10 +799,10 @@ typedef struct
 USB_OTG_OUTEndpointTypeDef;
 
 
-/** 
+/**
   * @brief __Host_Mode_Register_Structures
   */
-typedef struct 
+typedef struct
 {
   __IO uint32_t HCFG;             /* Host Configuration Register    400h*/
   __IO uint32_t HFIR;             /* Host Frame Interval Register   404h*/
@@ -815,7 +815,7 @@ typedef struct
 USB_OTG_HostTypeDef;
 
 
-/** 
+/**
   * @brief __Host_Channel_Specific_Registers
   */
 typedef struct
@@ -830,8 +830,8 @@ typedef struct
 }
 USB_OTG_HostChannelTypeDef;
 
-    
-/** 
+
+/**
   * @brief Peripheral_memory_map
   */
 #define FLASH_BASE            0x08000000U /*!< FLASH(up to 1 MB) base address in the alias region                         */
@@ -965,10 +965,10 @@ USB_OTG_HostChannelTypeDef;
 /**
   * @}
   */
-  
+
 /** @addtogroup Peripheral_declaration
   * @{
-  */  
+  */
 #define TIM2                ((TIM_TypeDef *) TIM2_BASE)
 #define TIM3                ((TIM_TypeDef *) TIM3_BASE)
 #define TIM4                ((TIM_TypeDef *) TIM4_BASE)
@@ -1003,7 +1003,7 @@ USB_OTG_HostChannelTypeDef;
 #define ADC2                ((ADC_TypeDef *) ADC2_BASE)
 #define ADC3                ((ADC_TypeDef *) ADC3_BASE)
 #define SDIO                ((SDIO_TypeDef *) SDIO_BASE)
-#define SPI1                ((SPI_TypeDef *) SPI1_BASE) 
+#define SPI1                ((SPI_TypeDef *) SPI1_BASE)
 #define SYSCFG              ((SYSCFG_TypeDef *) SYSCFG_BASE)
 #define EXTI                ((EXTI_TypeDef *) EXTI_BASE)
 #define TIM9                ((TIM_TypeDef *) TIM9_BASE)
@@ -1038,7 +1038,7 @@ USB_OTG_HostChannelTypeDef;
 #define DMA2_Stream4        ((DMA_Stream_TypeDef *) DMA2_Stream4_BASE)
 #define DMA2_Stream5        ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE)
 #define DMA2_Stream6        ((DMA_Stream_TypeDef *) DMA2_Stream6_BASE)
-#define DMA2_Stream7        ((DMA_Stream_TypeDef *) DMA2_Stream7_BASE)  
+#define DMA2_Stream7        ((DMA_Stream_TypeDef *) DMA2_Stream7_BASE)
 #define RNG                 ((RNG_TypeDef *) RNG_BASE)
 #define FSMC_Bank1          ((FSMC_Bank1_TypeDef *) FSMC_Bank1_R_BASE)
 #define FSMC_Bank1E         ((FSMC_Bank1E_TypeDef *) FSMC_Bank1E_R_BASE)
@@ -1057,11 +1057,11 @@ USB_OTG_HostChannelTypeDef;
 /** @addtogroup Exported_constants
   * @{
   */
-  
+
   /** @addtogroup Peripheral_Registers_Bits_Definition
   * @{
   */
-    
+
 /******************************************************************************/
 /*                         Peripheral Registers_Bits_Definition               */
 /******************************************************************************/
@@ -1104,7 +1104,7 @@ USB_OTG_HostChannelTypeDef;
 #define  ADC_CR1_RES_0                       0x01000000U        /*!<Bit 0 */
 #define  ADC_CR1_RES_1                       0x02000000U        /*!<Bit 1 */
 #define  ADC_CR1_OVRIE                       0x04000000U         /*!<overrun interrupt enable */
-  
+
 /*******************  Bit definition for ADC_CR2 register  ********************/
 #define  ADC_CR2_ADON                        0x00000001U        /*!<A/D Converter ON / OFF */
 #define  ADC_CR2_CONT                        0x00000002U        /*!<Continuous Conversion */
@@ -1337,7 +1337,7 @@ USB_OTG_HostChannelTypeDef;
 #define  ADC_SQR3_SQ6_4                      0x20000000U        /*!<Bit 4 */
 
 /*******************  Bit definition for ADC_JSQR register  *******************/
-#define  ADC_JSQR_JSQ1                       0x0000001FU        /*!<JSQ1[4:0] bits (1st conversion in injected sequence) */  
+#define  ADC_JSQR_JSQ1                       0x0000001FU        /*!<JSQ1[4:0] bits (1st conversion in injected sequence) */
 #define  ADC_JSQR_JSQ1_0                     0x00000001U        /*!<Bit 0 */
 #define  ADC_JSQR_JSQ1_1                     0x00000002U        /*!<Bit 1 */
 #define  ADC_JSQR_JSQ1_2                     0x00000004U        /*!<Bit 2 */
@@ -1407,22 +1407,22 @@ USB_OTG_HostChannelTypeDef;
 #define  ADC_CSR_DOVR3                        ADC_CSR_OVR3
 
 /*******************  Bit definition for ADC_CCR register  ********************/
-#define  ADC_CCR_MULTI                       0x0000001FU        /*!<MULTI[4:0] bits (Multi-ADC mode selection) */  
+#define  ADC_CCR_MULTI                       0x0000001FU        /*!<MULTI[4:0] bits (Multi-ADC mode selection) */
 #define  ADC_CCR_MULTI_0                     0x00000001U        /*!<Bit 0 */
 #define  ADC_CCR_MULTI_1                     0x00000002U        /*!<Bit 1 */
 #define  ADC_CCR_MULTI_2                     0x00000004U        /*!<Bit 2 */
 #define  ADC_CCR_MULTI_3                     0x00000008U        /*!<Bit 3 */
 #define  ADC_CCR_MULTI_4                     0x00000010U        /*!<Bit 4 */
-#define  ADC_CCR_DELAY                       0x00000F00U        /*!<DELAY[3:0] bits (Delay between 2 sampling phases) */  
+#define  ADC_CCR_DELAY                       0x00000F00U        /*!<DELAY[3:0] bits (Delay between 2 sampling phases) */
 #define  ADC_CCR_DELAY_0                     0x00000100U        /*!<Bit 0 */
 #define  ADC_CCR_DELAY_1                     0x00000200U        /*!<Bit 1 */
 #define  ADC_CCR_DELAY_2                     0x00000400U        /*!<Bit 2 */
 #define  ADC_CCR_DELAY_3                     0x00000800U        /*!<Bit 3 */
 #define  ADC_CCR_DDS                         0x00002000U        /*!<DMA disable selection (Multi-ADC mode) */
-#define  ADC_CCR_DMA                         0x0000C000U        /*!<DMA[1:0] bits (Direct Memory Access mode for multimode) */  
+#define  ADC_CCR_DMA                         0x0000C000U        /*!<DMA[1:0] bits (Direct Memory Access mode for multimode) */
 #define  ADC_CCR_DMA_0                       0x00004000U        /*!<Bit 0 */
 #define  ADC_CCR_DMA_1                       0x00008000U        /*!<Bit 1 */
-#define  ADC_CCR_ADCPRE                      0x00030000U        /*!<ADCPRE[1:0] bits (ADC prescaler) */  
+#define  ADC_CCR_ADCPRE                      0x00030000U        /*!<ADCPRE[1:0] bits (ADC prescaler) */
 #define  ADC_CCR_ADCPRE_0                    0x00010000U        /*!<Bit 0 */
 #define  ADC_CCR_ADCPRE_1                    0x00020000U        /*!<Bit 1 */
 #define  ADC_CCR_VBATE                       0x00400000U        /*!<VBAT Enable */
@@ -1603,7 +1603,7 @@ USB_OTG_HostChannelTypeDef;
 #define  CAN_TI2R_EXID                       0x001FFFF8U        /*!<Extended identifier */
 #define  CAN_TI2R_STID                       0xFFE00000U        /*!<Standard Identifier or Extended Identifier */
 
-/*******************  Bit definition for CAN_TDT2R register  ******************/  
+/*******************  Bit definition for CAN_TDT2R register  ******************/
 #define  CAN_TDT2R_DLC                       0x0000000FU        /*!<Data Length Code */
 #define  CAN_TDT2R_TGT                       0x00000100U        /*!<Transmit Global Time */
 #define  CAN_TDT2R_TIME                      0xFFFF0000U        /*!<Message Time Stamp */
@@ -2925,7 +2925,7 @@ USB_OTG_HostChannelTypeDef;
 #define DMA_SxNDT_14                         0x00004000U
 #define DMA_SxNDT_15                         0x00008000U
 
-/********************  Bits definition for DMA_SxFCR register  ****************/ 
+/********************  Bits definition for DMA_SxFCR register  ****************/
 #define DMA_SxFCR_FEIE                       0x00000080U
 #define DMA_SxFCR_FS                         0x00000038U
 #define DMA_SxFCR_FS_0                       0x00000008U
@@ -2936,7 +2936,7 @@ USB_OTG_HostChannelTypeDef;
 #define DMA_SxFCR_FTH_0                      0x00000001U
 #define DMA_SxFCR_FTH_1                      0x00000002U
 
-/********************  Bits definition for DMA_LISR register  *****************/ 
+/********************  Bits definition for DMA_LISR register  *****************/
 #define DMA_LISR_TCIF3                       0x08000000U
 #define DMA_LISR_HTIF3                       0x04000000U
 #define DMA_LISR_TEIF3                       0x02000000U
@@ -2958,7 +2958,7 @@ USB_OTG_HostChannelTypeDef;
 #define DMA_LISR_DMEIF0                      0x00000004U
 #define DMA_LISR_FEIF0                       0x00000001U
 
-/********************  Bits definition for DMA_HISR register  *****************/ 
+/********************  Bits definition for DMA_HISR register  *****************/
 #define DMA_HISR_TCIF7                       0x08000000U
 #define DMA_HISR_HTIF7                       0x04000000U
 #define DMA_HISR_TEIF7                       0x02000000U
@@ -2980,7 +2980,7 @@ USB_OTG_HostChannelTypeDef;
 #define DMA_HISR_DMEIF4                      0x00000004U
 #define DMA_HISR_FEIF4                       0x00000001U
 
-/********************  Bits definition for DMA_LIFCR register  ****************/ 
+/********************  Bits definition for DMA_LIFCR register  ****************/
 #define DMA_LIFCR_CTCIF3                     0x08000000U
 #define DMA_LIFCR_CHTIF3                     0x04000000U
 #define DMA_LIFCR_CTEIF3                     0x02000000U
@@ -3002,7 +3002,7 @@ USB_OTG_HostChannelTypeDef;
 #define DMA_LIFCR_CDMEIF0                    0x00000004U
 #define DMA_LIFCR_CFEIF0                     0x00000001U
 
-/********************  Bits definition for DMA_HIFCR  register  ****************/ 
+/********************  Bits definition for DMA_HIFCR  register  ****************/
 #define DMA_HIFCR_CTCIF7                     0x08000000U
 #define DMA_HIFCR_CHTIF7                     0x04000000U
 #define DMA_HIFCR_CTEIF7                     0x02000000U
@@ -5921,80 +5921,80 @@ USB_OTG_HostChannelTypeDef;
 /******************  Bit definition for SPI_I2SPR register  *******************/
 #define  SPI_I2SPR_I2SDIV                    0x000000FFU            /*!<I2S Linear prescaler         */
 #define  SPI_I2SPR_ODD                       0x00000100U            /*!<Odd factor for the prescaler */
-#define  SPI_I2SPR_MCKOE                     0x00000200U            /*!<Master Clock Output Enable   */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                
-                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  
-/******************************************************************************/                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  
-/*                                                                            */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  
-/*                                 SYSCFG                                     */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  
-/*                                                                            */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  
-/******************************************************************************/                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  
-/******************  Bit definition for SYSCFG_MEMRMP register  ***************/                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  
-#define SYSCFG_MEMRMP_MEM_MODE          0x00000003U /*!<SYSCFG_Memory Remap Config */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  
-#define SYSCFG_MEMRMP_MEM_MODE_0        0x00000001U                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
-#define SYSCFG_MEMRMP_MEM_MODE_1        0x00000002U                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                
-                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  
-/*****************  Bit definition for SYSCFG_EXTICR1 register  ***************/                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  
-#define SYSCFG_EXTICR1_EXTI0            0x0000000FU /*!<EXTI 0 configuration */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                            
-#define SYSCFG_EXTICR1_EXTI1            0x000000F0U /*!<EXTI 1 configuration */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                            
-#define SYSCFG_EXTICR1_EXTI2            0x00000F00U /*!<EXTI 2 configuration */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                            
-#define SYSCFG_EXTICR1_EXTI3            0x0000F000U /*!<EXTI 3 configuration */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                            
-/**                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                               
-  * @brief   EXTI0 configuration                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  
-  */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                              
-#define SYSCFG_EXTICR1_EXTI0_PA         0x00000000U /*!<PA[0] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI0_PB         0x00000001U /*!<PB[0] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI0_PC         0x00000002U /*!<PC[0] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI0_PD         0x00000003U /*!<PD[0] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI0_PE         0x00000004U /*!<PE[0] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI0_PF         0x00000005U /*!<PF[0] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI0_PG         0x00000006U /*!<PG[0] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI0_PH         0x00000007U /*!<PH[0] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI0_PI         0x00000008U /*!<PI[0] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-/**                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                               
-  * @brief   EXTI1 configuration                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  
-  */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                              
-#define SYSCFG_EXTICR1_EXTI1_PA         0x00000000U /*!<PA[1] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI1_PB         0x00000010U /*!<PB[1] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI1_PC         0x00000020U /*!<PC[1] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI1_PD         0x00000030U /*!<PD[1] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI1_PE         0x00000040U /*!<PE[1] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI1_PF         0x00000050) /*!<PF[1] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI1_PG         0x00000060U /*!<PG[1] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI1_PH         0x00000070U /*!<PH[1] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI1_PI         0x00000080U /*!<PI[1] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-/**                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                               
-  * @brief   EXTI2 configuration                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  
-  */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                              
-#define SYSCFG_EXTICR1_EXTI2_PA         0x00000000U /*!<PA[2] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI2_PB         0x00000100U /*!<PB[2] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI2_PC         0x00000200U /*!<PC[2] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI2_PD         0x00000300U /*!<PD[2] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI2_PE         0x00000400U /*!<PE[2] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI2_PF         0x00000500) /*!<PF[2] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI2_PG         0x00000600) /*!<PG[2] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI2_PH         0x00000700U /*!<PH[2] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI2_PI         0x00000800U /*!<PI[2] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-/**                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                               
-  * @brief   EXTI3 configuration                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  
-  */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                              
-#define SYSCFG_EXTICR1_EXTI3_PA         0x00000000U /*!<PA[3] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI3_PB         0x00001000U /*!<PB[3] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI3_PC         0x00002000U /*!<PC[3] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI3_PD         0x00003000U /*!<PD[3] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI3_PE         0x00004000U /*!<PE[3] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI3_PF         0x00005000) /*!<PF[3] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI3_PG         0x00006000U /*!<PG[3] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI3_PH         0x00007000U /*!<PH[3] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-#define SYSCFG_EXTICR1_EXTI3_PI         0x00008000U /*!<PI[3] pin */                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
-                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  
+#define  SPI_I2SPR_MCKOE                     0x00000200U            /*!<Master Clock Output Enable   */
+
+/******************************************************************************/
+/*                                                                            */
+/*                                 SYSCFG                                     */
+/*                                                                            */
+/******************************************************************************/
+/******************  Bit definition for SYSCFG_MEMRMP register  ***************/
+#define SYSCFG_MEMRMP_MEM_MODE          0x00000003U /*!<SYSCFG_Memory Remap Config */
+#define SYSCFG_MEMRMP_MEM_MODE_0        0x00000001U
+#define SYSCFG_MEMRMP_MEM_MODE_1        0x00000002U
+
+/*****************  Bit definition for SYSCFG_EXTICR1 register  ***************/
+#define SYSCFG_EXTICR1_EXTI0            0x0000000FU /*!<EXTI 0 configuration */
+#define SYSCFG_EXTICR1_EXTI1            0x000000F0U /*!<EXTI 1 configuration */
+#define SYSCFG_EXTICR1_EXTI2            0x00000F00U /*!<EXTI 2 configuration */
+#define SYSCFG_EXTICR1_EXTI3            0x0000F000U /*!<EXTI 3 configuration */
+/**
+  * @brief   EXTI0 configuration
+  */
+#define SYSCFG_EXTICR1_EXTI0_PA         0x00000000U /*!<PA[0] pin */
+#define SYSCFG_EXTICR1_EXTI0_PB         0x00000001U /*!<PB[0] pin */
+#define SYSCFG_EXTICR1_EXTI0_PC         0x00000002U /*!<PC[0] pin */
+#define SYSCFG_EXTICR1_EXTI0_PD         0x00000003U /*!<PD[0] pin */
+#define SYSCFG_EXTICR1_EXTI0_PE         0x00000004U /*!<PE[0] pin */
+#define SYSCFG_EXTICR1_EXTI0_PF         0x00000005U /*!<PF[0] pin */
+#define SYSCFG_EXTICR1_EXTI0_PG         0x00000006U /*!<PG[0] pin */
+#define SYSCFG_EXTICR1_EXTI0_PH         0x00000007U /*!<PH[0] pin */
+#define SYSCFG_EXTICR1_EXTI0_PI         0x00000008U /*!<PI[0] pin */
+/**
+  * @brief   EXTI1 configuration
+  */
+#define SYSCFG_EXTICR1_EXTI1_PA         0x00000000U /*!<PA[1] pin */
+#define SYSCFG_EXTICR1_EXTI1_PB         0x00000010U /*!<PB[1] pin */
+#define SYSCFG_EXTICR1_EXTI1_PC         0x00000020U /*!<PC[1] pin */
+#define SYSCFG_EXTICR1_EXTI1_PD         0x00000030U /*!<PD[1] pin */
+#define SYSCFG_EXTICR1_EXTI1_PE         0x00000040U /*!<PE[1] pin */
+#define SYSCFG_EXTICR1_EXTI1_PF         0x00000050) /*!<PF[1] pin */
+#define SYSCFG_EXTICR1_EXTI1_PG         0x00000060U /*!<PG[1] pin */
+#define SYSCFG_EXTICR1_EXTI1_PH         0x00000070U /*!<PH[1] pin */
+#define SYSCFG_EXTICR1_EXTI1_PI         0x00000080U /*!<PI[1] pin */
+/**
+  * @brief   EXTI2 configuration
+  */
+#define SYSCFG_EXTICR1_EXTI2_PA         0x00000000U /*!<PA[2] pin */
+#define SYSCFG_EXTICR1_EXTI2_PB         0x00000100U /*!<PB[2] pin */
+#define SYSCFG_EXTICR1_EXTI2_PC         0x00000200U /*!<PC[2] pin */
+#define SYSCFG_EXTICR1_EXTI2_PD         0x00000300U /*!<PD[2] pin */
+#define SYSCFG_EXTICR1_EXTI2_PE         0x00000400U /*!<PE[2] pin */
+#define SYSCFG_EXTICR1_EXTI2_PF         0x00000500) /*!<PF[2] pin */
+#define SYSCFG_EXTICR1_EXTI2_PG         0x00000600) /*!<PG[2] pin */
+#define SYSCFG_EXTICR1_EXTI2_PH         0x00000700U /*!<PH[2] pin */
+#define SYSCFG_EXTICR1_EXTI2_PI         0x00000800U /*!<PI[2] pin */
+/**
+  * @brief   EXTI3 configuration
+  */
+#define SYSCFG_EXTICR1_EXTI3_PA         0x00000000U /*!<PA[3] pin */
+#define SYSCFG_EXTICR1_EXTI3_PB         0x00001000U /*!<PB[3] pin */
+#define SYSCFG_EXTICR1_EXTI3_PC         0x00002000U /*!<PC[3] pin */
+#define SYSCFG_EXTICR1_EXTI3_PD         0x00003000U /*!<PD[3] pin */
+#define SYSCFG_EXTICR1_EXTI3_PE         0x00004000U /*!<PE[3] pin */
+#define SYSCFG_EXTICR1_EXTI3_PF         0x00005000) /*!<PF[3] pin */
+#define SYSCFG_EXTICR1_EXTI3_PG         0x00006000U /*!<PG[3] pin */
+#define SYSCFG_EXTICR1_EXTI3_PH         0x00007000U /*!<PH[3] pin */
+#define SYSCFG_EXTICR1_EXTI3_PI         0x00008000U /*!<PI[3] pin */
+
 /*****************  Bit definition for SYSCFG_EXTICR2 register  ***************/
 #define SYSCFG_EXTICR2_EXTI4            0x0000000FU /*!<EXTI 4 configuration */
 #define SYSCFG_EXTICR2_EXTI5            0x000000F0U /*!<EXTI 5 configuration */
 #define SYSCFG_EXTICR2_EXTI6            0x00000F00U /*!<EXTI 6 configuration */
 #define SYSCFG_EXTICR2_EXTI7            0x0000F000U /*!<EXTI 7 configuration */
-/** 
-  * @brief   EXTI4 configuration  
-  */ 
+/**
+  * @brief   EXTI4 configuration
+  */
 #define SYSCFG_EXTICR2_EXTI4_PA         0x00000000U /*!<PA[4] pin */
 #define SYSCFG_EXTICR2_EXTI4_PB         0x00000001U /*!<PB[4] pin */
 #define SYSCFG_EXTICR2_EXTI4_PC         0x00000002U /*!<PC[4] pin */
@@ -6004,9 +6004,9 @@ USB_OTG_HostChannelTypeDef;
 #define SYSCFG_EXTICR2_EXTI4_PG         0x00000006U /*!<PG[4] pin */
 #define SYSCFG_EXTICR2_EXTI4_PH         0x00000007U /*!<PH[4] pin */
 #define SYSCFG_EXTICR2_EXTI4_PI         0x00000008U /*!<PI[4] pin */
-/** 
-  * @brief   EXTI5 configuration  
-  */ 
+/**
+  * @brief   EXTI5 configuration
+  */
 #define SYSCFG_EXTICR2_EXTI5_PA         0x00000000U /*!<PA[5] pin */
 #define SYSCFG_EXTICR2_EXTI5_PB         0x00000010U /*!<PB[5] pin */
 #define SYSCFG_EXTICR2_EXTI5_PC         0x00000020U /*!<PC[5] pin */
@@ -6016,9 +6016,9 @@ USB_OTG_HostChannelTypeDef;
 #define SYSCFG_EXTICR2_EXTI5_PG         0x00000060U /*!<PG[5] pin */
 #define SYSCFG_EXTICR2_EXTI5_PH         0x00000070U /*!<PH[5] pin */
 #define SYSCFG_EXTICR2_EXTI5_PI         0x00000080U /*!<PI[5] pin */
-/** 
-  * @brief   EXTI6 configuration  
-  */ 
+/**
+  * @brief   EXTI6 configuration
+  */
 #define SYSCFG_EXTICR2_EXTI6_PA         0x00000000U /*!<PA[6] pin */
 #define SYSCFG_EXTICR2_EXTI6_PB         0x00000100U /*!<PB[6] pin */
 #define SYSCFG_EXTICR2_EXTI6_PC         0x00000200U /*!<PC[6] pin */
@@ -6028,9 +6028,9 @@ USB_OTG_HostChannelTypeDef;
 #define SYSCFG_EXTICR2_EXTI6_PG         0x00000600) /*!<PG[6] pin */
 #define SYSCFG_EXTICR2_EXTI6_PH         0x00000700U /*!<PH[6] pin */
 #define SYSCFG_EXTICR2_EXTI6_PI         0x00000800U /*!<PI[6] pin */
-/** 
-  * @brief   EXTI7 configuration  
-  */ 
+/**
+  * @brief   EXTI7 configuration
+  */
 #define SYSCFG_EXTICR2_EXTI7_PA         0x00000000U /*!<PA[7] pin */
 #define SYSCFG_EXTICR2_EXTI7_PB         0x00001000U /*!<PB[7] pin */
 #define SYSCFG_EXTICR2_EXTI7_PC         0x00002000U /*!<PC[7] pin */
@@ -6046,10 +6046,10 @@ USB_OTG_HostChannelTypeDef;
 #define SYSCFG_EXTICR3_EXTI9            0x000000F0U /*!<EXTI 9 configuration */
 #define SYSCFG_EXTICR3_EXTI10           0x00000F00U /*!<EXTI 10 configuration */
 #define SYSCFG_EXTICR3_EXTI11           0x0000F000U /*!<EXTI 11 configuration */
-           
-/** 
-  * @brief   EXTI8 configuration  
-  */ 
+
+/**
+  * @brief   EXTI8 configuration
+  */
 #define SYSCFG_EXTICR3_EXTI8_PA         0x00000000U /*!<PA[8] pin */
 #define SYSCFG_EXTICR3_EXTI8_PB         0x00000001U /*!<PB[8] pin */
 #define SYSCFG_EXTICR3_EXTI8_PC         0x00000002U /*!<PC[8] pin */
@@ -6059,9 +6059,9 @@ USB_OTG_HostChannelTypeDef;
 #define SYSCFG_EXTICR3_EXTI8_PG         0x00000006U /*!<PG[8] pin */
 #define SYSCFG_EXTICR3_EXTI8_PH         0x00000007U /*!<PH[8] pin */
 #define SYSCFG_EXTICR3_EXTI8_PI         0x00000008U /*!<PI[8] pin */
-/** 
-  * @brief   EXTI9 configuration  
-  */ 
+/**
+  * @brief   EXTI9 configuration
+  */
 #define SYSCFG_EXTICR3_EXTI9_PA         0x00000000U /*!<PA[9] pin */
 #define SYSCFG_EXTICR3_EXTI9_PB         0x00000010U /*!<PB[9] pin */
 #define SYSCFG_EXTICR3_EXTI9_PC         0x00000020U /*!<PC[9] pin */
@@ -6071,9 +6071,9 @@ USB_OTG_HostChannelTypeDef;
 #define SYSCFG_EXTICR3_EXTI9_PG         0x00000060U /*!<PG[9] pin */
 #define SYSCFG_EXTICR3_EXTI9_PH         0x00000070U /*!<PH[9] pin */
 #define SYSCFG_EXTICR3_EXTI9_PI         0x00000080U /*!<PI[9] pin */
-/** 
-  * @brief   EXTI10 configuration  
-  */ 
+/**
+  * @brief   EXTI10 configuration
+  */
 #define SYSCFG_EXTICR3_EXTI10_PA        0x00000000U /*!<PA[10] pin */
 #define SYSCFG_EXTICR3_EXTI10_PB        0x00000100U /*!<PB[10] pin */
 #define SYSCFG_EXTICR3_EXTI10_PC        0x00000200U /*!<PC[10] pin */
@@ -6083,9 +6083,9 @@ USB_OTG_HostChannelTypeDef;
 #define SYSCFG_EXTICR3_EXTI10_PG        0x00000600) /*!<PG[10] pin */
 #define SYSCFG_EXTICR3_EXTI10_PH        0x00000700U /*!<PH[10] pin */
 #define SYSCFG_EXTICR3_EXTI10_PI        0x00000800U /*!<PI[10] pin */
-/** 
-  * @brief   EXTI11 configuration  
-  */ 
+/**
+  * @brief   EXTI11 configuration
+  */
 #define SYSCFG_EXTICR3_EXTI11_PA        0x00000000U /*!<PA[11] pin */
 #define SYSCFG_EXTICR3_EXTI11_PB        0x00001000U /*!<PB[11] pin */
 #define SYSCFG_EXTICR3_EXTI11_PC        0x00002000U /*!<PC[11] pin */
@@ -6101,9 +6101,9 @@ USB_OTG_HostChannelTypeDef;
 #define SYSCFG_EXTICR4_EXTI13           0x000000F0U /*!<EXTI 13 configuration */
 #define SYSCFG_EXTICR4_EXTI14           0x00000F00U /*!<EXTI 14 configuration */
 #define SYSCFG_EXTICR4_EXTI15           0x0000F000U /*!<EXTI 15 configuration */
-/** 
-  * @brief   EXTI12 configuration  
-  */ 
+/**
+  * @brief   EXTI12 configuration
+  */
 #define SYSCFG_EXTICR4_EXTI12_PA        0x00000000U /*!<PA[12] pin */
 #define SYSCFG_EXTICR4_EXTI12_PB        0x00000001U /*!<PB[12] pin */
 #define SYSCFG_EXTICR4_EXTI12_PC        0x00000002U /*!<PC[12] pin */
@@ -6112,9 +6112,9 @@ USB_OTG_HostChannelTypeDef;
 #define SYSCFG_EXTICR4_EXTI12_PF        0x00000005U /*!<PF[12] pin */
 #define SYSCFG_EXTICR4_EXTI12_PG        0x00000006U /*!<PG[12] pin */
 #define SYSCFG_EXTICR3_EXTI12_PH        0x00000007U /*!<PH[12] pin */
-/** 
-  * @brief   EXTI13 configuration  
-  */ 
+/**
+  * @brief   EXTI13 configuration
+  */
 #define SYSCFG_EXTICR4_EXTI13_PA        0x00000000U /*!<PA[13] pin */
 #define SYSCFG_EXTICR4_EXTI13_PB        0x00000010U /*!<PB[13] pin */
 #define SYSCFG_EXTICR4_EXTI13_PC        0x00000020U /*!<PC[13] pin */
@@ -6123,9 +6123,9 @@ USB_OTG_HostChannelTypeDef;
 #define SYSCFG_EXTICR4_EXTI13_PF        0x00000050) /*!<PF[13] pin */
 #define SYSCFG_EXTICR4_EXTI13_PG        0x00000060U /*!<PG[13] pin */
 #define SYSCFG_EXTICR3_EXTI13_PH        0x00000070U /*!<PH[13] pin */
-/** 
-  * @brief   EXTI14 configuration  
-  */ 
+/**
+  * @brief   EXTI14 configuration
+  */
 #define SYSCFG_EXTICR4_EXTI14_PA        0x00000000U /*!<PA[14] pin */
 #define SYSCFG_EXTICR4_EXTI14_PB        0x00000100U /*!<PB[14] pin */
 #define SYSCFG_EXTICR4_EXTI14_PC        0x00000200U /*!<PC[14] pin */
@@ -6134,9 +6134,9 @@ USB_OTG_HostChannelTypeDef;
 #define SYSCFG_EXTICR4_EXTI14_PF        0x00000500) /*!<PF[14] pin */
 #define SYSCFG_EXTICR4_EXTI14_PG        0x00000600) /*!<PG[14] pin */
 #define SYSCFG_EXTICR3_EXTI14_PH        0x00000700U /*!<PH[14] pin */
-/** 
-  * @brief   EXTI15 configuration  
-  */ 
+/**
+  * @brief   EXTI15 configuration
+  */
 #define SYSCFG_EXTICR4_EXTI15_PA        0x00000000U /*!<PA[15] pin */
 #define SYSCFG_EXTICR4_EXTI15_PB        0x00001000U /*!<PB[15] pin */
 #define SYSCFG_EXTICR4_EXTI15_PC        0x00002000U /*!<PC[15] pin */
@@ -6146,7 +6146,7 @@ USB_OTG_HostChannelTypeDef;
 #define SYSCFG_EXTICR4_EXTI15_PG        0x00006000U /*!<PG[15] pin */
 #define SYSCFG_EXTICR3_EXTI15_PH        0x00007000U /*!<PH[15] pin */
 
-/******************  Bit definition for SYSCFG_CMPCR register  ****************/  
+/******************  Bit definition for SYSCFG_CMPCR register  ****************/
 #define SYSCFG_CMPCR_CMP_PD             0x00000001U /*!<Compensation cell ready flag */
 #define SYSCFG_CMPCR_READY              0x00000100U /*!<Compensation cell power-down */
 
@@ -7294,7 +7294,7 @@ USB_OTG_HostChannelTypeDef;
 
 /**
   * @}
-  */ 
+  */
 
 /**
   * @}
@@ -7303,7 +7303,7 @@ USB_OTG_HostChannelTypeDef;
 /** @addtogroup Exported_macros
   * @{
   */
- 
+
 /******************************* ADC Instances ********************************/
 #define IS_ADC_ALL_INSTANCE(INSTANCE) (((INSTANCE) == ADC1) || \
                                        ((INSTANCE) == ADC2) || \
@@ -7312,7 +7312,7 @@ USB_OTG_HostChannelTypeDef;
 /******************************* CAN Instances ********************************/
 #define IS_CAN_ALL_INSTANCE(INSTANCE) (((INSTANCE) == CAN1) || \
                                        ((INSTANCE) == CAN2))
- 
+
 /******************************* CRC Instances ********************************/
 #define IS_CRC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CRC)
 
@@ -7463,7 +7463,7 @@ USB_OTG_HostChannelTypeDef;
                                           ((INSTANCE) == TIM3) || \
                                           ((INSTANCE) == TIM4) || \
                                           ((INSTANCE) == TIM5) || \
-                                          ((INSTANCE) == TIM8)) 
+                                          ((INSTANCE) == TIM8))
 
 /******************** TIM Instances : DMA burst feature ***********************/
 #define IS_TIM_DMABURST_INSTANCE(INSTANCE)  (((INSTANCE) == TIM1) || \
@@ -7614,7 +7614,7 @@ USB_OTG_HostChannelTypeDef;
                                     ((INSTANCE) == USART3) || \
                                     ((INSTANCE) == UART4)  || \
                                     ((INSTANCE) == UART5)  || \
-                                    ((INSTANCE) == USART6))     
+                                    ((INSTANCE) == USART6))
 
 /*********************** PCD Instances ****************************************/
 #define IS_PCD_ALL_INSTANCE(INSTANCE) (((INSTANCE) == USB_OTG_FS) || \
@@ -7646,7 +7646,7 @@ USB_OTG_HostChannelTypeDef;
 
 /**
   * @}
-  */ 
+  */
 
 /**
   * @}

panda/board/inc/stm32f2xx.h

@@ -4,17 +4,17 @@
   * @author  MCD Application Team
   * @version V2.1.2
   * @date    29-June-2016
-  * @brief   CMSIS STM32F2xx Device Peripheral Access Layer Header File. 
+  * @brief   CMSIS STM32F2xx Device Peripheral Access Layer Header File.
   *
   *          The file is the unique include file that the application programmer
   *          is using in the C source code, usually in main.c. This file contains:
   *           - Configuration section that allows to select:
   *              - The STM32F2xx device used in the target application
-  *              - To use or not the peripheral’s drivers in application code(i.e. 
-  *                code will be based on direct access to peripheral’s registers 
-  *                rather than drivers API), this option is controlled by 
+  *              - To use or not the peripheral’s drivers in application code(i.e.
+  *                code will be based on direct access to peripheral’s registers
+  *                rather than drivers API), this option is controlled by
   *                "#define USE_HAL_DRIVER"
-  *  
+  *
   ******************************************************************************
   * @attention
   *
@@ -52,14 +52,14 @@
 /** @addtogroup stm32f2xx
   * @{
   */
-    
+
 #ifndef __STM32F2xx_H
 #define __STM32F2xx_H
 
 #ifdef __cplusplus
  extern "C" {
 #endif /* __cplusplus */
-   
+
 /** @addtogroup Library_configuration_section
   * @{
   */
@@ -70,9 +70,9 @@
 #if !defined (STM32F2)
 #define STM32F2
 #endif /* STM32F2 */
-   
+
 /* Uncomment the line below according to the target STM32 device used in your
-   application 
+   application
   */
 #if !defined (STM32F205xx) && !defined (STM32F215xx) && !defined (STM32F207xx) && !defined (STM32F217xx)
 
@@ -83,17 +83,17 @@
   /* #define STM32F207xx */   /*!< STM32F207VG, STM32F207ZG, STM32F207IG, STM32F207VF, STM32F207ZF, STM32F207IF,
                                    STM32F207VE, STM32F207ZE, STM32F207IE, STM32F207VC, STM32F207ZC and STM32F207IC Devices */
   /* #define STM32F217xx */   /*!< STM32F217VG, STM32F217ZG, STM32F217IG, STM32F217VE, STM32F217ZE and STM32F217IE Devices */
-    
+
 #endif
-   
+
 /*  Tip: To avoid modifying this file each time you need to switch between these
         devices, you can define the device in your toolchain compiler preprocessor.
   */
 #if !defined  (USE_HAL_DRIVER)
 /**
  * @brief Comment the line below if you will not use the peripherals drivers.
-   In this case, these drivers will not be included and the application code will 
-   be based on direct access to peripherals registers 
+   In this case, these drivers will not be included and the application code will
+   be based on direct access to peripherals registers
    */
   /*#define USE_HAL_DRIVER */
 #endif /* USE_HAL_DRIVER */
@@ -136,23 +136,23 @@
 
 /** @addtogroup Exported_types
   * @{
-  */ 
-typedef enum 
+  */
+typedef enum
 {
-  RESET = 0, 
+  RESET = 0,
   SET = !RESET
 } FlagStatus, ITStatus;
 
-typedef enum 
+typedef enum
 {
-  DISABLE = 0, 
+  DISABLE = 0,
   ENABLE = !DISABLE
 } FunctionalState;
 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
 
-typedef enum 
+typedef enum
 {
-  ERROR = 0, 
+  ERROR = 0,
   SUCCESS = !ERROR
 } ErrorStatus;
 
@@ -178,13 +178,13 @@ typedef enum
 
 #define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
 
-#define POSITION_VAL(VAL)     (__CLZ(__RBIT(VAL))) 
+#define POSITION_VAL(VAL)     (__CLZ(__RBIT(VAL)))
 
 
 /**
   * @}
   */
-  
+
 #if defined (USE_HAL_DRIVER)
  #include "stm32f2xx_hal.h"
 #endif /* USE_HAL_DRIVER */
@@ -202,7 +202,7 @@ typedef enum
 /**
   * @}
   */
-  
+
 
 
 

panda/board/inc/stm32f2xx_hal_def.h

@@ -4,8 +4,8 @@
   * @author  MCD Application Team
   * @version V1.1.3
   * @date    29-June-2016
-  * @brief   This file contains HAL common defines, enumeration, macros and 
-  *          structures definitions. 
+  * @brief   This file contains HAL common defines, enumeration, macros and
+  *          structures definitions.
   ******************************************************************************
   * @attention
   *
@@ -51,10 +51,10 @@
 
 /* Exported types ------------------------------------------------------------*/
 
-/** 
-  * @brief  HAL Status structures definition  
-  */  
-typedef enum 
+/**
+  * @brief  HAL Status structures definition
+  */
+typedef enum
 {
   HAL_OK       = 0x00U,
   HAL_ERROR    = 0x01U,
@@ -62,13 +62,13 @@ typedef enum
   HAL_TIMEOUT  = 0x03U
 } HAL_StatusTypeDef;
 
-/** 
-  * @brief  HAL Lock structures definition  
+/**
+  * @brief  HAL Lock structures definition
   */
-typedef enum 
+typedef enum
 {
   HAL_UNLOCKED = 0x00U,
-  HAL_LOCKED   = 0x01U  
+  HAL_LOCKED   = 0x01U
 } HAL_LockTypeDef;
 
 /* Exported macro ------------------------------------------------------------*/
@@ -84,14 +84,14 @@ typedef enum
                           } while(0)
 
 #define UNUSED(x) ((void)(x))
-							  
+
 /** @brief Reset the Handle's State field.
   * @param __HANDLE__: specifies the Peripheral Handle.
-  * @note  This macro can be used for the following purpose: 
+  * @note  This macro can be used for the following purpose:
   *          - When the Handle is declared as local variable; before passing it as parameter
-  *            to HAL_PPP_Init() for the first time, it is mandatory to use this macro 
+  *            to HAL_PPP_Init() for the first time, it is mandatory to use this macro
   *            to set to 0 the Handle's "State" field.
-  *            Otherwise, "State" field may have any random value and the first time the function 
+  *            Otherwise, "State" field may have any random value and the first time the function
   *            HAL_PPP_Init() is called, the low level hardware initialization will be missed
   *            (i.e. HAL_PPP_MspInit() will not be executed).
   *          - When there is a need to reconfigure the low level hardware: instead of calling
@@ -133,34 +133,34 @@ typedef enum
   #endif /* __packed */
 #endif /* __GNUC__ */
 
-  
+
 /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
 #if defined   (__GNUC__)        /* GNU Compiler */
   #ifndef __ALIGN_END
     #define __ALIGN_END    __attribute__ ((aligned (4)))
   #endif /* __ALIGN_END */
-  #ifndef __ALIGN_BEGIN  
+  #ifndef __ALIGN_BEGIN
     #define __ALIGN_BEGIN
   #endif /* __ALIGN_BEGIN */
 #else
   #ifndef __ALIGN_END
     #define __ALIGN_END
   #endif /* __ALIGN_END */
-  #ifndef __ALIGN_BEGIN      
+  #ifndef __ALIGN_BEGIN
     #if defined   (__CC_ARM)      /* ARM Compiler */
-      #define __ALIGN_BEGIN    __align(4)  
+      #define __ALIGN_BEGIN    __align(4)
     #elif defined (__ICCARM__)    /* IAR Compiler */
-      #define __ALIGN_BEGIN 
+      #define __ALIGN_BEGIN
     #endif /* __CC_ARM */
   #endif /* __ALIGN_BEGIN */
 #endif /* __GNUC__ */
 
-/** 
+/**
   * @brief  __NOINLINE definition
-  */ 
+  */
 #if defined ( __CC_ARM   ) || defined   (  __GNUC__  )
-/* ARM & GNUCompiler 
-   ---------------- 
+/* ARM & GNUCompiler
+   ----------------
 */
 #define __NOINLINE __attribute__ ( (noinline) )