George Hotz
34d2ef6447
Merge branch 'master' into precompile_backward
2026-03-17 15:17:41 +08:00
George Hotz
125d987886
no NOOPT
2026-03-17 15:14:25 +08:00
chenyu
6b6d1814ca
update no_vectorized_index [pr] ( #15313 )
...
combine no_vectorized_index and no_vectorized_index_broadcast
2026-03-17 03:05:23 -04:00
George Hotz
c83f2a7154
simpler
2026-03-17 15:01:46 +08:00
George Hotz
32a8b3aaa0
split v not split
2026-03-17 14:57:53 +08:00
George Hotz
39aae38b2a
compact grad
2026-03-17 14:37:40 +08:00
George Hotz
f909d5c983
fix
2026-03-17 14:19:47 +08:00
George Hotz
f7512e9595
cleanups
2026-03-17 14:14:41 +08:00
b1tg
856a839efc
llm: fix qwen3 moe topk renormalization ( #15201 )
2026-03-17 12:57:33 +08:00
chenyu
1283b57b4e
update fix_store_after_hazard ( #15309 )
...
actual gate is just not CONTIGUOUS, also don't need to check against full backward_slice
2026-03-16 23:55:59 -04:00
George Hotz
9f591b42d1
add precompile backward support
2026-03-17 11:40:09 +08:00
Christopher Milan
575b40b93a
determine image shapes before index devectorization ( #15304 )
2026-03-16 23:16:33 -04:00
George Hotz
3ff03be413
call always has tuple ( #15297 )
...
* call always has tuple
* fix pre-commit and simplify
* update
* fix
* move that assert
* tuple
* fix multi
* cleanups
* fix merge
2026-03-17 10:58:46 +08:00
chenyu
1b8b151195
simpler Tensor.assign ( #15302 )
2026-03-16 22:37:25 -04:00
wozeparrot
674c760974
embedded bwd vocab shard ( #15001 )
...
* fix: remove more multi from call
* feat: embedding bwd vocab sharding
* clean: unused import
* clean: don't actually need this pattern
2026-03-16 19:37:16 -07:00
Christopher Milan
62bfd48d95
smarter padding in image_conv2d ( #15289 )
2026-03-16 22:17:48 -04:00
chenyu
e1fab4d2a9
UOp.store is always void [pr] ( #15301 )
2026-03-16 21:58:05 -04:00
chenyu
02afb45f29
remove UOp.assign [pr] ( #15300 )
...
* remove UOp.assign [pr]
it's all store and after, UOp is immutable
* fix test
2026-03-16 21:45:41 -04:00
qazal
33bd33e783
sqtt: add CDNA ops enum, show in viz ( #15140 )
2026-03-17 09:38:42 +09:00
chenyu
3e2b7803e6
view assign replaces at buffer identity ( #15298 )
...
matches what functions capture
2026-03-16 19:58:38 -04:00
qazal
346596cdce
viz: nanoseconds time axis in sqtt ( #15299 )
...
* ui
* secondaryTick is optional
* shader markers data
* instSt infra
* path forward
* details
2026-03-17 07:20:18 +09:00
nimlgen
1bc4cb254c
signed tinygpu as default ( #15296 )
...
* signed tinygpu as default
* f
* no sip
2026-03-16 19:29:41 +08:00
Christopher Milan
0de519c7c2
[pr] fewer simplify calls in image_fixup ( #15283 )
2026-03-16 06:57:52 -04:00
nimlgen
27e29127b5
system: remote prereqs ( #15290 )
...
* x
* new format for apl
* this
* typing
* rpc
* tuple
* linter+new tinygpu
2026-03-16 18:45:41 +08:00
chenyu
837b06c609
style cleanups in allocations.py [pr] ( #15295 )
2026-03-16 05:45:24 -04:00
George Hotz
476276f4b4
support grads on tuples ( #15287 )
...
* support grads on tuples
* simpler
* grad_fxn works
* cleanups
* unused
2026-03-16 17:39:34 +08:00
chenyu
20799df10b
remove Ops.ASSIGN [pr] ( #15294 )
...
goodbye
2026-03-16 05:22:21 -04:00
chenyu
b3378e7022
UOp.assign is store+after [pr] ( #15292 )
2026-03-16 04:51:50 -04:00
George Hotz
2e1c81c23f
allow_implicit to disable implicit params ( #15291 )
...
* allow_implicit to disable implicit params
* get both Tensor and UOp
* no implicits in llm
2026-03-16 16:40:14 +08:00
chenyu
a0d1444790
Tensor.assign is store+after [pr] ( #15288 )
...
* Tensor.assign is store+after [pr]
* put that back
2026-03-16 04:04:55 -04:00
George Hotz
08662bc4ab
add TUPLE/GETTUPLE, simple tests pass ( #15286 )
...
* simple tuple stuff passes
* resolved
2026-03-16 15:06:02 +08:00
nimlgen
e7705fe311
system: pcidev doesn't care about bars ( #15284 )
2026-03-16 14:45:43 +08:00
nimlgen
ff0bcc8de0
system: iface p1 changes ( #15278 )
2026-03-16 10:48:25 +08:00
qazal
4445f50356
viz: variable duration rdna barriers ( #15277 )
...
* viz: variable length rdna barriers
* work
* tiny changes
* simple wave simd test
* small wave sync test
* good multi barrier bug find
* simple fix
* wave_sync asserts
* rdna4 work
* more rdna4
* find more bugs in my model
* it's so much simpler
* wave_sync tests duration
* r4
* should just call this rdna4
2026-03-16 06:06:19 +09:00
qazal
5cd1daa3bc
cdna asm_gemm in one file, remove old rdna3 asm ( #15281 )
2026-03-16 04:32:30 +09:00
chenyu
cd14e8e64b
allocations contiguous is store+after ( #15280 )
2026-03-15 11:58:40 -04:00
qazal
7b6211fdd7
sqtt: remove discover_ops script ( #15279 )
2026-03-15 22:17:06 +09:00
wozeparrot
473e5e4368
feat: make USE_ATOMICS embedding bwd faster ( #15151 )
2026-03-14 21:21:10 -07:00
qazal
3858bfc83d
sqtt: CDNA inst decodes ( #15274 )
...
* sqtt: CDNA inst decodes
* JUMP packets other way
* cdna insts
* r3
* r4
* lds from simd1 and simd2
2026-03-14 21:03:46 +09:00
Christopher Milan
d753c5d7e5
IMAGE=1 image_conv2d pads for bank conflicts ( #15252 )
2026-03-14 07:59:16 -04:00
Christopher Milan
9047249a7c
m.where(x.pad_to(m.shape), Invalid) ranges shrink ( #15275 )
2026-03-14 07:26:36 -04:00
nimlgen
f392c53c66
system: merge remote into pciiface ( #15273 )
...
* system: merge remote into pciiface
* clenaer
* move
* mypy
* fix
2026-03-14 18:44:20 +08:00
chenyu
13eec8fbe8
remove unused assign rules [pr] ( #15268 )
2026-03-14 05:37:49 -04:00
Christopher Milan
dabdc986df
shrink guarded ranges, try 2 ( #15272 )
2026-03-14 04:24:05 -04:00
Christopher Milan
7cf4b16c91
Revert "shrink guarded ranges" ( #15271 )
2026-03-14 03:44:38 -04:00
Christopher Milan
d9951e2f8e
shrink guarded ranges ( #15263 )
2026-03-14 03:38:48 -04:00
qazal
43ffd66fda
viz: oneline inst list ( #15269 )
...
* viz: oneline inst list
* save 5 chars
* gradual padding
2026-03-14 15:37:18 +09:00
George Hotz
86f17468ed
store in spec + USB BOT fix ( #15265 )
...
* move spec to store
* usb bot flag
* Revert "usb bot flag"
This reverts commit 7b8b7824f0 .
* fix assert
2026-03-14 13:25:05 +08:00
George Hotz
06d7cddb33
amd_copy_matmul is cleaner ( #15248 )
...
* amd_copy_matmul is cleaner
* it runs
* replicated stuff
* add tid there
* it runs
* cleanup
* x.src[1]
* flatten
* move that
* keep that assert
2026-03-14 12:56:09 +08:00
chenyu
b3600e4774
don't emit assign in transform_precompiled_call [pr] ( #15262 )
2026-03-13 22:42:35 -04:00