H7 CR3 notes (#1985)

board/gdb.sh

@@ -0,0 +1,3 @@
+#!/bin/bash
+
+gdb-multiarch  --eval-command="target extended-remote localhost:3333"

board/stm32h7/clock.h

@@ -18,6 +18,16 @@ PCLK1: 60MHz (for USART2,3,4,5,7,8)
 */
 
 void clock_init(void) {
+  /*
+    WARNING: PWR->CR3's lower byte can only be written once
+    * subsequent writes will silently fail
+    * only cleared with a full power-on-reset, not soft reset or reset pin
+    * some H7 have a bootrom with a DFU routine that writes (and locks) CR3
+    * if the CR3 config doesn't match the HW, the core will deadlock and require immediately going into DFU from a cold boot
+
+    In a normal bootup, the bootstub will be the first to write this. The app section calls clock_init again, but the CR3 write will silently fail. This is fine for most cases, but caution should be taken that the bootstub and app always write the same config.
+  */
+
   // Set power mode to direct SMPS power supply(depends on the board layout)
 #ifndef STM32H723
   register_set(&(PWR->CR3), PWR_CR3_SMPSEN, 0xFU); // powered only by SMPS