diff --git a/extra/risk.py b/extra/risk.py
index 807502163e..767786e57a 100755
--- a/extra/risk.py
+++ b/extra/risk.py
@@ -152,6 +152,7 @@ binops = {BinaryOps.ADD: riski_add,
           BinaryOps.POW: riski_pow}
 
 @count
+# TODO: add masks to matmul instruction?
 def riski_matmul():
   #print("LLL:\n",regfile[Reg.MATMUL_INPUT],"\n",regfile[Reg.MATMUL_WEIGHTS])
   regfile[Reg.MATMUL_OUTPUT] += \
diff --git a/fpga/build.sh b/fpga/build.sh
index 60395486ab..11e50f31ac 100755
--- a/fpga/build.sh
+++ b/fpga/build.sh
@@ -11,6 +11,7 @@ $BASE/yosys/yosys -p "synth_xilinx -flatten -nowidelut -abc9 -arch xc7 -top top;
 
 # nextpnr-xilinx 0be5cc19f3261101730ce9274720aaf3784f83e2
 # cmake -DARCH=xilinx -DBUILD_GUI=no -DBUILD_PYTHON=no -DUSE_OPENMP=No .
+# git submodule init && git submodule update
 # python3 xilinx/python/bbaexport.py --device xc7a100tcsg324-1 --bba xilinx/xc7a100t.bba
 # ./bbasm -l xilinx/xc7a100t.bba xilinx/xc7a100t.bin
 $BASE/nextpnr-xilinx/nextpnr-xilinx --chipdb $BASE/nextpnr-xilinx/xilinx/xc7a100t.bin --xdc ../src/arty.xdc --json attosoc.json --write attosoc_routed.json --fasm attosoc.fasm