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https://github.com/commaai/agnos-kernel-sdm845.git
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9c8077087e
This is a snapshot of UFS driver (host controller and PHY) taken as of
msm-4.4 commit <98b0bcfa> ("wil6210: fix memory access violation in
wil_memcpy_from/toio_32").
Snapshot is taken of following files:
drivers/scsi/ufs/*
drivers/phy/phy-qcom-ufs*
drivers/phy/Makefile
include/linux/phy/phy-qcom-ufs.h
include/uapi/scsi/ufs/*
include/trace/events/ufs.h
Documentation/scsi/ufs.txt
Documentation/devicetree/bindings/ufs/*
Fixed some of the minor compilation errrors after taking the snapshot.
Change-Id: Ia0c437de30f17f3f5e331b174522e9f6843599c9
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
64 lines
2.0 KiB
C
64 lines
2.0 KiB
C
/*
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* Copyright (c) 2013-2016, Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef PHY_QCOM_UFS_H_
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#define PHY_QCOM_UFS_H_
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#include "phy.h"
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/**
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* ufs_qcom_phy_enable_ref_clk() - Enable the phy
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* ref clock.
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* @phy: reference to a generic phy
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*
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* returns 0 for success, and non-zero for error.
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*/
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int ufs_qcom_phy_enable_ref_clk(struct phy *phy);
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/**
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* ufs_qcom_phy_disable_ref_clk() - Disable the phy
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* ref clock.
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* @phy: reference to a generic phy.
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*/
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void ufs_qcom_phy_disable_ref_clk(struct phy *phy);
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/**
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* ufs_qcom_phy_enable_dev_ref_clk() - Enable the device
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* ref clock.
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* @phy: reference to a generic phy.
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*/
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void ufs_qcom_phy_enable_dev_ref_clk(struct phy *phy);
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/**
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* ufs_qcom_phy_disable_dev_ref_clk() - Disable the device
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* ref clock.
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* @phy: reference to a generic phy.
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*/
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void ufs_qcom_phy_disable_dev_ref_clk(struct phy *phy);
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int ufs_qcom_phy_enable_iface_clk(struct phy *phy);
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void ufs_qcom_phy_disable_iface_clk(struct phy *phy);
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int ufs_qcom_phy_start_serdes(struct phy *phy);
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int ufs_qcom_phy_set_tx_lane_enable(struct phy *phy, u32 tx_lanes);
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int ufs_qcom_phy_ctrl_rx_linecfg(struct phy *generic_phy, bool ctrl);
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int ufs_qcom_phy_calibrate_phy(struct phy *phy, bool is_rate_B);
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int ufs_qcom_phy_is_pcs_ready(struct phy *phy);
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void ufs_qcom_phy_save_controller_version(struct phy *phy,
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u8 major, u16 minor, u16 step);
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const char *ufs_qcom_phy_name(struct phy *phy);
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int ufs_qcom_phy_configure_lpm(struct phy *generic_phy, bool enable);
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void ufs_qcom_phy_dbg_register_dump(struct phy *generic_phy);
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#endif /* PHY_QCOM_UFS_H_ */
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