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https://github.com/commaai/agnos-kernel-sdm845.git
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262e85b1ca
Current usage of spinlock in channel allocation might result in live lock issue. In order to avoid this we move to a per cpu channel allocation scheme. We rely on preemption being disabled when we allocate channel to avoid any conflict. If we end up handling an interrupt which logs when preemption is disabled it is still gauranteed to not interfere with the current logging as the channel id will be freed up before resuming. Change-Id: I91d7fcb4ed9202328e62d5459283927e238f9f66 Signed-off-by: Satyajit Desai <sadesai@codeaurora.org>
112 lines
3.3 KiB
C
112 lines
3.3 KiB
C
#ifndef __LINUX_CORESIGHT_STM_H
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#define __LINUX_CORESIGHT_STM_H
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#include <asm/local.h>
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#include <linux/stm.h>
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#include <linux/bitmap.h>
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#include <uapi/linux/coresight-stm.h>
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#define BYTES_PER_CHANNEL 256
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enum stm_pkt_type {
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STM_PKT_TYPE_DATA = 0x98,
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STM_PKT_TYPE_FLAG = 0xE8,
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STM_PKT_TYPE_TRIG = 0xF8,
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};
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#define stm_channel_off(type, opts) (type & ~opts)
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#define stm_channel_addr(drvdata, ch) (drvdata->chs.base + \
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(ch * BYTES_PER_CHANNEL))
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#define stm_log_inv(entity_id, proto_id, data, size) \
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stm_trace(STM_FLAG_NONE, entity_id, proto_id, data, size)
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#define stm_log_inv_ts(entity_id, proto_id, data, size) \
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stm_trace(STM_FLAG_TIMESTAMPED, entity_id, proto_id, \
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data, size)
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#define stm_log_gtd(entity_id, proto_id, data, size) \
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stm_trace(STM_FLAG_GUARANTEED, entity_id, proto_id, \
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data, size)
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#define stm_log_gtd_ts(entity_id, proto_id, data, size) \
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stm_trace(STM_FLAG_GUARANTEED | STM_OPTION_TIMESTAMPED, \
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entity_id, proto_id, data, size)
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#define stm_log(entity_id, data, size) \
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stm_log_inv_ts(entity_id, 0, data, size)
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/**
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* struct channel_space - central management entity for extended ports
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* @base: memory mapped base address where channels start.
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* @phys: physical base address of channel region.
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* @guaraneed: is the channel delivery guaranteed.
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* @bitmap: channel info for OST packet
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*/
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struct channel_space {
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void __iomem *base;
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phys_addr_t phys;
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unsigned long *guaranteed;
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unsigned long *bitmap;
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};
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/**
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* struct stm_drvdata - specifics associated to an STM component
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* @base: memory mapped base address for this component.
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* @dev: the device entity associated to this component.
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* @atclk: optional clock for the core parts of the STM.
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* @csdev: component vitals needed by the framework.
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* @spinlock: only one at a time pls.
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* @chs: the channels accociated to this STM.
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* @entities currently configured OST entities.
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* @stm: structure associated to the generic STM interface.
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* @mode: this tracer's mode, i.e sysFS, or disabled.
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* @traceid: value of the current ID for this component.
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* @write_bytes: Maximus bytes this STM can write at a time.
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* @stmsper: settings for register STMSPER.
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* @stmspscr: settings for register STMSPSCR.
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* @numsp: the total number of stimulus port support by this STM.
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* @stmheer: settings for register STMHEER.
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* @stmheter: settings for register STMHETER.
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* @stmhebsr: settings for register STMHEBSR.
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* @ch_alloc_fail_count: Number of ch allocation failures over time.
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*/
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struct stm_drvdata {
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void __iomem *base;
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struct device *dev;
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struct clk *atclk;
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struct coresight_device *csdev;
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spinlock_t spinlock;
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struct channel_space chs;
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bool enable;
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DECLARE_BITMAP(entities, OST_ENTITY_MAX);
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struct stm_data stm;
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local_t mode;
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u8 traceid;
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u32 write_bytes;
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u32 stmsper;
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u32 stmspscr;
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u32 numsp;
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u32 stmheer;
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u32 stmheter;
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u32 stmhebsr;
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u32 ch_alloc_fail_count;
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};
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#ifdef CONFIG_CORESIGHT_STM
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extern int stm_trace(uint32_t flags, uint8_t entity_id, uint8_t proto_id,
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const void *data, uint32_t size);
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void stm_send(void *addr, const void *data, u32 size, u8 write_bytes);
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#else
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static inline int stm_trace(uint32_t flags, uint8_t entity_id,
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uint8_t proto_id, const void *data, uint32_t size)
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{
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return 0;
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}
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static inline void stm_send(void *addr, const void *data, u32 size,
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u8 write_bytes) {}
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#endif
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#endif
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