Merge 4.9.61 into android-4.9-o

Changes in 4.9.61
	ALSA: timer: Add missing mutex lock for compat ioctls
	ALSA: seq: Fix nested rwsem annotation for lockdep splat
	cifs: check MaxPathNameComponentLength != 0 before using it
	KEYS: return full count in keyring_read() if buffer is too small
	KEYS: fix out-of-bounds read during ASN.1 parsing
	ASoC: adau17x1: Workaround for noise bug in ADC
	arm64: ensure __dump_instr() checks addr_limit
	arm/arm64: KVM: set right LR register value for 32 bit guest when inject abort
	arm/arm64: kvm: Disable branch profiling in HYP code
	ARM: 8715/1: add a private asm/unaligned.h
	drm/amdgpu: return -ENOENT from uvd 6.0 early init for harvesting
	ocfs2: fstrim: Fix start offset of first cluster group during fstrim
	drm/i915/edp: read edp display control registers unconditionally
	drm/msm: Fix potential buffer overflow issue
	drm/msm: fix an integer overflow test
	tracing/samples: Fix creation and deletion of simple_thread_fn creation
	Fix tracing sample code warning.
	cpufreq: Do not clear real_cpus mask on policy init
	crypto: ccp - Set the AES size field for all modes
	staging: fsl-mc: Add missing header
	IB/mlx5: Assign DSCP for R-RoCE QPs Address Path
	PM / wakeirq: report a wakeup_event on dedicated wekup irq
	scsi: megaraid_sas: Do not set fp_possible if TM capable for non-RW syspdIO, change fp_possible to bool
	mmc: s3cmci: include linux/interrupt.h for tasklet_struct
	mfd: ab8500-sysctrl: Handle probe deferral
	mfd: axp20x: Fix axp288 PEK_DBR and PEK_DBF irqs being swapped
	bnxt_en: Added PCI IDs for BCM57452 and BCM57454 ASICs
	staging: rtl8712u: Fix endian settings for structs describing network packets
	PCI/MSI: Return failure when msix_setup_entries() fails
	net: mvneta: fix build errors when linux/phy*.h is removed from net/dsa.h
	ext4: fix stripe-unaligned allocations
	ext4: do not use stripe_width if it is not set
	net/ena: change driver's default timeouts
	i2c: riic: correctly finish transfers
	drm/amdgpu: when dpm disabled, also need to stop/start vce.
	perf tools: Only increase index if perf_evsel__new_idx() succeeds
	iwlwifi: mvm: use the PROBE_RESP_QUEUE to send deauth to unknown station
	drm/fsl-dcu: check for clk_prepare_enable() error
	clocksource/drivers/arm_arch_timer: Add dt binding for hisilicon-161010101 erratum
	net: phy: dp83867: Recover from "port mirroring" N/A MODE4
	cx231xx: Fix I2C on Internal Master 3 Bus
	ath10k: fix reading sram contents for QCA4019
	clk: sunxi-ng: Check kzalloc() for errors and cleanup error path
	mtd: nand: sunxi: Fix the non-polling case in sunxi_nfc_wait_events()
	gpio: mcp23s08: Select REGMAP/REGMAP_I2C to fix build error
	xen/manage: correct return value check on xenbus_scanf()
	scsi: aacraid: Process Error for response I/O
	platform/x86: intel_mid_thermal: Fix module autoload
	staging: lustre: llite: don't invoke direct_IO for the EOF case
	staging: lustre: hsm: stack overrun in hai_dump_data_field
	staging: lustre: ptlrpc: skip lock if export failed
	staging: lustre: lmv: Error not handled for lmv_find_target
	brcmfmac: check brcmf_bus_get_memdump result for error
	vfs: open() with O_CREAT should not create inodes with unknown ids
	ASoC: Intel: boards: remove .pm_ops in all Atom/DPCM machine drivers
	exynos4-is: fimc-is: Unmap region obtained by of_iomap()
	mei: return error on notification request to a disconnected client
	s390/dasd: check for device error pointer within state change interrupts
	s390/prng: Adjust generation of entropy to produce real 256 bits.
	s390/crypto: Extend key length check for AES-XTS in fips mode.
	bt8xx: fix memory leak
	drm/exynos: g2d: prevent integer overflow in
	PCI: Avoid possible deadlock on pci_lock and p->pi_lock
	powerpc/64: Don't try to use radix MMU under a hypervisor
	xen: don't print error message in case of missing Xenstore entry
	staging: r8712u: Fix Sparse warning in rtl871x_xmit.c
	ARM: dts: mvebu: pl310-cache disable double-linefill
	Linux 4.9.61

Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
2017-11-08 10:49:54 +01:00
81 changed files with 800 additions and 368 deletions

View File

@@ -31,6 +31,12 @@ to deliver its interrupts via SPIs.
This also affects writes to the tval register, due to the implicit This also affects writes to the tval register, due to the implicit
counter read. counter read.
- hisilicon,erratum-161010101 : A boolean property. Indicates the
presence of Hisilicon erratum 161010101, which says that reading the
counters is unreliable in some cases, and reads may return a value 32
beyond the correct value. This also affects writes to the tval
registers, due to the implicit counter read.
** Optional properties: ** Optional properties:
- arm,cpu-registers-not-fw-configured : Firmware does not initialize - arm,cpu-registers-not-fw-configured : Firmware does not initialize

View File

@@ -1,6 +1,6 @@
VERSION = 4 VERSION = 4
PATCHLEVEL = 9 PATCHLEVEL = 9
SUBLEVEL = 60 SUBLEVEL = 61
EXTRAVERSION = EXTRAVERSION =
NAME = Roaring Lionus NAME = Roaring Lionus

View File

@@ -176,9 +176,9 @@
reg = <0x8000 0x1000>; reg = <0x8000 0x1000>;
cache-unified; cache-unified;
cache-level = <2>; cache-level = <2>;
arm,double-linefill-incr = <1>; arm,double-linefill-incr = <0>;
arm,double-linefill-wrap = <0>; arm,double-linefill-wrap = <0>;
arm,double-linefill = <1>; arm,double-linefill = <0>;
prefetch-data = <1>; prefetch-data = <1>;
}; };

View File

@@ -143,9 +143,9 @@
reg = <0x8000 0x1000>; reg = <0x8000 0x1000>;
cache-unified; cache-unified;
cache-level = <2>; cache-level = <2>;
arm,double-linefill-incr = <1>; arm,double-linefill-incr = <0>;
arm,double-linefill-wrap = <0>; arm,double-linefill-wrap = <0>;
arm,double-linefill = <1>; arm,double-linefill = <0>;
prefetch-data = <1>; prefetch-data = <1>;
}; };

View File

@@ -111,9 +111,9 @@
reg = <0x8000 0x1000>; reg = <0x8000 0x1000>;
cache-unified; cache-unified;
cache-level = <2>; cache-level = <2>;
arm,double-linefill-incr = <1>; arm,double-linefill-incr = <0>;
arm,double-linefill-wrap = <0>; arm,double-linefill-wrap = <0>;
arm,double-linefill = <1>; arm,double-linefill = <0>;
prefetch-data = <1>; prefetch-data = <1>;
}; };

View File

@@ -37,4 +37,3 @@ generic-y += termbits.h
generic-y += termios.h generic-y += termios.h
generic-y += timex.h generic-y += timex.h
generic-y += trace_clock.h generic-y += trace_clock.h
generic-y += unaligned.h

View File

@@ -0,0 +1,27 @@
#ifndef __ASM_ARM_UNALIGNED_H
#define __ASM_ARM_UNALIGNED_H
/*
* We generally want to set CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS on ARMv6+,
* but we don't want to use linux/unaligned/access_ok.h since that can lead
* to traps on unaligned stm/ldm or strd/ldrd.
*/
#include <asm/byteorder.h>
#if defined(__LITTLE_ENDIAN)
# include <linux/unaligned/le_struct.h>
# include <linux/unaligned/be_byteshift.h>
# include <linux/unaligned/generic.h>
# define get_unaligned __get_unaligned_le
# define put_unaligned __put_unaligned_le
#elif defined(__BIG_ENDIAN)
# include <linux/unaligned/be_struct.h>
# include <linux/unaligned/le_byteshift.h>
# include <linux/unaligned/generic.h>
# define get_unaligned __get_unaligned_be
# define put_unaligned __put_unaligned_be
#else
# error need to define endianess
#endif
#endif /* __ASM_ARM_UNALIGNED_H */

View File

@@ -227,7 +227,7 @@ void kvm_inject_undefined(struct kvm_vcpu *vcpu)
u32 return_offset = (is_thumb) ? 2 : 4; u32 return_offset = (is_thumb) ? 2 : 4;
kvm_update_psr(vcpu, UND_MODE); kvm_update_psr(vcpu, UND_MODE);
*vcpu_reg(vcpu, 14) = *vcpu_pc(vcpu) - return_offset; *vcpu_reg(vcpu, 14) = *vcpu_pc(vcpu) + return_offset;
/* Branch to exception vector */ /* Branch to exception vector */
*vcpu_pc(vcpu) = exc_vector_base(vcpu) + vect_offset; *vcpu_pc(vcpu) = exc_vector_base(vcpu) + vect_offset;
@@ -239,10 +239,8 @@ void kvm_inject_undefined(struct kvm_vcpu *vcpu)
*/ */
static void inject_abt(struct kvm_vcpu *vcpu, bool is_pabt, unsigned long addr) static void inject_abt(struct kvm_vcpu *vcpu, bool is_pabt, unsigned long addr)
{ {
unsigned long cpsr = *vcpu_cpsr(vcpu);
bool is_thumb = (cpsr & PSR_T_BIT);
u32 vect_offset; u32 vect_offset;
u32 return_offset = (is_thumb) ? 4 : 0; u32 return_offset = (is_pabt) ? 4 : 8;
bool is_lpae; bool is_lpae;
kvm_update_psr(vcpu, ABT_MODE); kvm_update_psr(vcpu, ABT_MODE);

View File

@@ -2,7 +2,7 @@
# Makefile for Kernel-based Virtual Machine module, HYP part # Makefile for Kernel-based Virtual Machine module, HYP part
# #
ccflags-y += -fno-stack-protector ccflags-y += -fno-stack-protector -DDISABLE_BRANCH_PROFILING
KVM=../../../../virt/kvm KVM=../../../../virt/kvm

View File

@@ -112,7 +112,7 @@ static void __dump_instr(const char *lvl, struct pt_regs *regs)
for (i = -4; i < 1; i++) { for (i = -4; i < 1; i++) {
unsigned int val, bad; unsigned int val, bad;
bad = __get_user(val, &((u32 *)addr)[i]); bad = get_user(val, &((u32 *)addr)[i]);
if (!bad) if (!bad)
p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val); p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);

View File

@@ -2,7 +2,7 @@
# Makefile for Kernel-based Virtual Machine module, HYP part # Makefile for Kernel-based Virtual Machine module, HYP part
# #
ccflags-y += -fno-stack-protector ccflags-y += -fno-stack-protector -DDISABLE_BRANCH_PROFILING
KVM=../../../../virt/kvm KVM=../../../../virt/kvm

View File

@@ -33,12 +33,26 @@
#define LOWER_EL_AArch64_VECTOR 0x400 #define LOWER_EL_AArch64_VECTOR 0x400
#define LOWER_EL_AArch32_VECTOR 0x600 #define LOWER_EL_AArch32_VECTOR 0x600
/*
* Table taken from ARMv8 ARM DDI0487B-B, table G1-10.
*/
static const u8 return_offsets[8][2] = {
[0] = { 0, 0 }, /* Reset, unused */
[1] = { 4, 2 }, /* Undefined */
[2] = { 0, 0 }, /* SVC, unused */
[3] = { 4, 4 }, /* Prefetch abort */
[4] = { 8, 8 }, /* Data abort */
[5] = { 0, 0 }, /* HVC, unused */
[6] = { 4, 4 }, /* IRQ, unused */
[7] = { 4, 4 }, /* FIQ, unused */
};
static void prepare_fault32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset) static void prepare_fault32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset)
{ {
unsigned long cpsr; unsigned long cpsr;
unsigned long new_spsr_value = *vcpu_cpsr(vcpu); unsigned long new_spsr_value = *vcpu_cpsr(vcpu);
bool is_thumb = (new_spsr_value & COMPAT_PSR_T_BIT); bool is_thumb = (new_spsr_value & COMPAT_PSR_T_BIT);
u32 return_offset = (is_thumb) ? 4 : 0; u32 return_offset = return_offsets[vect_offset >> 2][is_thumb];
u32 sctlr = vcpu_cp15(vcpu, c1_SCTLR); u32 sctlr = vcpu_cp15(vcpu, c1_SCTLR);
cpsr = mode | COMPAT_PSR_I_BIT; cpsr = mode | COMPAT_PSR_I_BIT;

View File

@@ -42,6 +42,8 @@
#include <linux/memblock.h> #include <linux/memblock.h>
#include <linux/hugetlb.h> #include <linux/hugetlb.h>
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/of_fdt.h>
#include <linux/libfdt.h>
#include <asm/pgalloc.h> #include <asm/pgalloc.h>
#include <asm/page.h> #include <asm/page.h>
@@ -421,6 +423,28 @@ static int __init parse_disable_radix(char *p)
} }
early_param("disable_radix", parse_disable_radix); early_param("disable_radix", parse_disable_radix);
/*
* If we're running under a hypervisor, we currently can't do radix
* since we don't have the code to do the H_REGISTER_PROC_TBL hcall.
* We tell that we're running under a hypervisor by looking for the
* /chosen/ibm,architecture-vec-5 property.
*/
static void early_check_vec5(void)
{
unsigned long root, chosen;
int size;
const u8 *vec5;
root = of_get_flat_dt_root();
chosen = of_get_flat_dt_subnode_by_name(root, "chosen");
if (chosen == -FDT_ERR_NOTFOUND)
return;
vec5 = of_get_flat_dt_prop(chosen, "ibm,architecture-vec-5", &size);
if (!vec5)
return;
cur_cpu_spec->mmu_features &= ~MMU_FTR_TYPE_RADIX;
}
void __init mmu_early_init_devtree(void) void __init mmu_early_init_devtree(void)
{ {
/* Disable radix mode based on kernel command line. */ /* Disable radix mode based on kernel command line. */
@@ -428,6 +452,15 @@ void __init mmu_early_init_devtree(void)
if (disable_radix || !(mfmsr() & MSR_HV)) if (disable_radix || !(mfmsr() & MSR_HV))
cur_cpu_spec->mmu_features &= ~MMU_FTR_TYPE_RADIX; cur_cpu_spec->mmu_features &= ~MMU_FTR_TYPE_RADIX;
/*
* Check /chosen/ibm,architecture-vec-5 if running as a guest.
* When running bare-metal, we can use radix if we like
* even though the ibm,architecture-vec-5 property created by
* skiboot doesn't have the necessary bits set.
*/
if (early_radix_enabled() && !(mfmsr() & MSR_HV))
early_check_vec5();
if (early_radix_enabled()) if (early_radix_enabled())
radix__early_init_devtree(); radix__early_init_devtree();
else else

View File

@@ -28,6 +28,7 @@
#include <linux/cpufeature.h> #include <linux/cpufeature.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <linux/fips.h>
#include <crypto/xts.h> #include <crypto/xts.h>
#include <asm/cpacf.h> #include <asm/cpacf.h>
@@ -501,6 +502,12 @@ static int xts_aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
if (err) if (err)
return err; return err;
/* In fips mode only 128 bit or 256 bit keys are valid */
if (fips_enabled && key_len != 32 && key_len != 64) {
tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
return -EINVAL;
}
/* Pick the correct function code based on the key length */ /* Pick the correct function code based on the key length */
fc = (key_len == 32) ? CPACF_KM_XTS_128 : fc = (key_len == 32) ? CPACF_KM_XTS_128 :
(key_len == 64) ? CPACF_KM_XTS_256 : 0; (key_len == 64) ? CPACF_KM_XTS_256 : 0;

View File

@@ -110,22 +110,30 @@ static const u8 initial_parm_block[32] __initconst = {
/*** helper functions ***/ /*** helper functions ***/
/*
* generate_entropy:
* This algorithm produces 64 bytes of entropy data based on 1024
* individual stckf() invocations assuming that each stckf() value
* contributes 0.25 bits of entropy. So the caller gets 256 bit
* entropy per 64 byte or 4 bits entropy per byte.
*/
static int generate_entropy(u8 *ebuf, size_t nbytes) static int generate_entropy(u8 *ebuf, size_t nbytes)
{ {
int n, ret = 0; int n, ret = 0;
u8 *pg, *h, hash[32]; u8 *pg, *h, hash[64];
pg = (u8 *) __get_free_page(GFP_KERNEL); /* allocate 2 pages */
pg = (u8 *) __get_free_pages(GFP_KERNEL, 1);
if (!pg) { if (!pg) {
prng_errorflag = PRNG_GEN_ENTROPY_FAILED; prng_errorflag = PRNG_GEN_ENTROPY_FAILED;
return -ENOMEM; return -ENOMEM;
} }
while (nbytes) { while (nbytes) {
/* fill page with urandom bytes */ /* fill pages with urandom bytes */
get_random_bytes(pg, PAGE_SIZE); get_random_bytes(pg, 2*PAGE_SIZE);
/* exor page with stckf values */ /* exor pages with 1024 stckf values */
for (n = 0; n < PAGE_SIZE / sizeof(u64); n++) { for (n = 0; n < 2 * PAGE_SIZE / sizeof(u64); n++) {
u64 *p = ((u64 *)pg) + n; u64 *p = ((u64 *)pg) + n;
*p ^= get_tod_clock_fast(); *p ^= get_tod_clock_fast();
} }
@@ -134,8 +142,8 @@ static int generate_entropy(u8 *ebuf, size_t nbytes)
h = hash; h = hash;
else else
h = ebuf; h = ebuf;
/* generate sha256 from this page */ /* hash over the filled pages */
cpacf_kimd(CPACF_KIMD_SHA_256, h, pg, PAGE_SIZE); cpacf_kimd(CPACF_KIMD_SHA_512, h, pg, 2*PAGE_SIZE);
if (n < sizeof(hash)) if (n < sizeof(hash))
memcpy(ebuf, hash, n); memcpy(ebuf, hash, n);
ret += n; ret += n;
@@ -143,7 +151,7 @@ static int generate_entropy(u8 *ebuf, size_t nbytes)
nbytes -= n; nbytes -= n;
} }
free_page((unsigned long)pg); free_pages((unsigned long)pg, 1);
return ret; return ret;
} }
@@ -334,7 +342,7 @@ static int __init prng_sha512_selftest(void)
static int __init prng_sha512_instantiate(void) static int __init prng_sha512_instantiate(void)
{ {
int ret, datalen; int ret, datalen;
u8 seed[64]; u8 seed[64 + 32 + 16];
pr_debug("prng runs in SHA-512 mode " pr_debug("prng runs in SHA-512 mode "
"with chunksize=%d and reseed_limit=%u\n", "with chunksize=%d and reseed_limit=%u\n",
@@ -357,12 +365,12 @@ static int __init prng_sha512_instantiate(void)
if (ret) if (ret)
goto outfree; goto outfree;
/* generate initial seed bytestring, first 48 bytes of entropy */ /* generate initial seed bytestring, with 256 + 128 bits entropy */
ret = generate_entropy(seed, 48); ret = generate_entropy(seed, 64 + 32);
if (ret != 48) if (ret != 64 + 32)
goto outfree; goto outfree;
/* followed by 16 bytes of unique nonce */ /* followed by 16 bytes of unique nonce */
get_tod_clock_ext(seed + 48); get_tod_clock_ext(seed + 64 + 32);
/* initial seed of the ppno drng */ /* initial seed of the ppno drng */
cpacf_ppno(CPACF_PPNO_SHA512_DRNG_SEED, cpacf_ppno(CPACF_PPNO_SHA512_DRNG_SEED,
@@ -395,9 +403,9 @@ static void prng_sha512_deinstantiate(void)
static int prng_sha512_reseed(void) static int prng_sha512_reseed(void)
{ {
int ret; int ret;
u8 seed[32]; u8 seed[64];
/* generate 32 bytes of fresh entropy */ /* fetch 256 bits of fresh entropy */
ret = generate_entropy(seed, sizeof(seed)); ret = generate_entropy(seed, sizeof(seed));
if (ret != sizeof(seed)) if (ret != sizeof(seed))
return ret; return ret;

View File

@@ -141,6 +141,13 @@ static irqreturn_t handle_threaded_wake_irq(int irq, void *_wirq)
struct wake_irq *wirq = _wirq; struct wake_irq *wirq = _wirq;
int res; int res;
/* Maybe abort suspend? */
if (irqd_is_wakeup_set(irq_get_irq_data(irq))) {
pm_wakeup_event(wirq->dev, 0);
return IRQ_HANDLED;
}
/* We don't want RPM_ASYNC or RPM_NOWAIT here */ /* We don't want RPM_ASYNC or RPM_NOWAIT here */
res = pm_runtime_resume(wirq->dev); res = pm_runtime_resume(wirq->dev);
if (res < 0) if (res < 0)

View File

@@ -70,6 +70,11 @@ int sunxi_ccu_probe(struct device_node *node, void __iomem *reg,
goto err_clk_unreg; goto err_clk_unreg;
reset = kzalloc(sizeof(*reset), GFP_KERNEL); reset = kzalloc(sizeof(*reset), GFP_KERNEL);
if (!reset) {
ret = -ENOMEM;
goto err_alloc_reset;
}
reset->rcdev.of_node = node; reset->rcdev.of_node = node;
reset->rcdev.ops = &ccu_reset_ops; reset->rcdev.ops = &ccu_reset_ops;
reset->rcdev.owner = THIS_MODULE; reset->rcdev.owner = THIS_MODULE;
@@ -85,6 +90,16 @@ int sunxi_ccu_probe(struct device_node *node, void __iomem *reg,
return 0; return 0;
err_of_clk_unreg: err_of_clk_unreg:
kfree(reset);
err_alloc_reset:
of_clk_del_provider(node);
err_clk_unreg: err_clk_unreg:
while (--i >= 0) {
struct clk_hw *hw = desc->hw_clks->hws[i];
if (!hw)
continue;
clk_hw_unregister(hw);
}
return ret; return ret;
} }

View File

@@ -1234,8 +1234,6 @@ static int cpufreq_online(unsigned int cpu)
if (new_policy) { if (new_policy) {
/* related_cpus should at least include policy->cpus. */ /* related_cpus should at least include policy->cpus. */
cpumask_copy(policy->related_cpus, policy->cpus); cpumask_copy(policy->related_cpus, policy->cpus);
/* Clear mask of registered CPUs */
cpumask_clear(policy->real_cpus);
} }
/* /*

View File

@@ -278,8 +278,7 @@ static int ccp5_perform_aes(struct ccp_op *op)
CCP_AES_ENCRYPT(&function) = op->u.aes.action; CCP_AES_ENCRYPT(&function) = op->u.aes.action;
CCP_AES_MODE(&function) = op->u.aes.mode; CCP_AES_MODE(&function) = op->u.aes.mode;
CCP_AES_TYPE(&function) = op->u.aes.type; CCP_AES_TYPE(&function) = op->u.aes.type;
if (op->u.aes.mode == CCP_AES_MODE_CFB) CCP_AES_SIZE(&function) = op->u.aes.size;
CCP_AES_SIZE(&function) = 0x7f;
CCP5_CMD_FUNCTION(&desc) = function.raw; CCP5_CMD_FUNCTION(&desc) = function.raw;

View File

@@ -470,6 +470,7 @@ struct ccp_aes_op {
enum ccp_aes_type type; enum ccp_aes_type type;
enum ccp_aes_mode mode; enum ccp_aes_mode mode;
enum ccp_aes_action action; enum ccp_aes_action action;
unsigned int size;
}; };
struct ccp_xts_aes_op { struct ccp_xts_aes_op {

View File

@@ -692,6 +692,14 @@ static int ccp_run_aes_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd)
goto e_ctx; goto e_ctx;
} }
} }
switch (aes->mode) {
case CCP_AES_MODE_CFB: /* CFB128 only */
case CCP_AES_MODE_CTR:
op.u.aes.size = AES_BLOCK_SIZE * BITS_PER_BYTE - 1;
break;
default:
op.u.aes.size = 0;
}
/* Prepare the input and output data workareas. For in-place /* Prepare the input and output data workareas. For in-place
* operations we need to set the dma direction to BIDIRECTIONAL * operations we need to set the dma direction to BIDIRECTIONAL

View File

@@ -1187,6 +1187,8 @@ config GPIO_MCP23S08
tristate "Microchip MCP23xxx I/O expander" tristate "Microchip MCP23xxx I/O expander"
depends on OF_GPIO depends on OF_GPIO
select GPIOLIB_IRQCHIP select GPIOLIB_IRQCHIP
select REGMAP_I2C if I2C
select REGMAP if SPI_MASTER
help help
SPI/I2C driver for Microchip MCP23S08/MCP23S17/MCP23008/MCP23017 SPI/I2C driver for Microchip MCP23S08/MCP23S17/MCP23008/MCP23017
I/O expanders. I/O expanders.

View File

@@ -315,6 +315,10 @@ static void amdgpu_vce_idle_work_handler(struct work_struct *work)
amdgpu_dpm_enable_vce(adev, false); amdgpu_dpm_enable_vce(adev, false);
} else { } else {
amdgpu_asic_set_vce_clocks(adev, 0, 0); amdgpu_asic_set_vce_clocks(adev, 0, 0);
amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
AMD_PG_STATE_GATE);
amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
AMD_CG_STATE_GATE);
} }
} else { } else {
schedule_delayed_work(&adev->vce.idle_work, VCE_IDLE_TIMEOUT); schedule_delayed_work(&adev->vce.idle_work, VCE_IDLE_TIMEOUT);
@@ -340,6 +344,11 @@ void amdgpu_vce_ring_begin_use(struct amdgpu_ring *ring)
amdgpu_dpm_enable_vce(adev, true); amdgpu_dpm_enable_vce(adev, true);
} else { } else {
amdgpu_asic_set_vce_clocks(adev, 53300, 40000); amdgpu_asic_set_vce_clocks(adev, 53300, 40000);
amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
AMD_CG_STATE_UNGATE);
amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
AMD_PG_STATE_UNGATE);
} }
} }
mutex_unlock(&adev->vce.idle_mutex); mutex_unlock(&adev->vce.idle_mutex);

View File

@@ -89,6 +89,10 @@ static int uvd_v6_0_early_init(void *handle)
{ {
struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_device *adev = (struct amdgpu_device *)handle;
if (!(adev->flags & AMD_IS_APU) &&
(RREG32_SMC(ixCC_HARVEST_FUSES) & CC_HARVEST_FUSES__UVD_DISABLE_MASK))
return -ENOENT;
uvd_v6_0_set_ring_funcs(adev); uvd_v6_0_set_ring_funcs(adev);
uvd_v6_0_set_irq_funcs(adev); uvd_v6_0_set_irq_funcs(adev);

View File

@@ -1193,6 +1193,17 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
if (!node) if (!node)
return -ENOMEM; return -ENOMEM;
/*
* To avoid an integer overflow for the later size computations, we
* enforce a maximum number of submitted commands here. This limit is
* sufficient for all conceivable usage cases of the G2D.
*/
if (req->cmd_nr > G2D_CMDLIST_DATA_NUM ||
req->cmd_buf_nr > G2D_CMDLIST_DATA_NUM) {
dev_err(dev, "number of submitted G2D commands exceeds limit\n");
return -EINVAL;
}
node->event = NULL; node->event = NULL;
if (req->event_type != G2D_EVENT_NOT) { if (req->event_type != G2D_EVENT_NOT) {
@@ -1250,7 +1261,11 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF; cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF;
} }
/* Check size of cmdlist: last 2 is about G2D_BITBLT_START */ /*
* Check the size of cmdlist. The 2 that is added last comes from
* the implicit G2D_BITBLT_START that is appended once we have
* checked all the submitted commands.
*/
size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2; size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;
if (size > G2D_CMDLIST_DATA_NUM) { if (size > G2D_CMDLIST_DATA_NUM) {
dev_err(dev, "cmdlist size is too big\n"); dev_err(dev, "cmdlist size is too big\n");

View File

@@ -89,9 +89,13 @@ struct fsl_tcon *fsl_tcon_init(struct device *dev)
goto err_node_put; goto err_node_put;
} }
of_node_put(np); ret = clk_prepare_enable(tcon->ipg_clk);
clk_prepare_enable(tcon->ipg_clk); if (ret) {
dev_err(dev, "Couldn't enable the TCON clock\n");
goto err_node_put;
}
of_node_put(np);
dev_info(dev, "Using TCON in bypass mode\n"); dev_info(dev, "Using TCON in bypass mode\n");
return tcon; return tcon;

View File

@@ -3558,9 +3558,16 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
dev_priv->psr.psr2_support ? "supported" : "not supported"); dev_priv->psr.psr2_support ? "supported" : "not supported");
} }
/* Read the eDP Display control capabilities registers */ /*
if ((intel_dp->dpcd[DP_EDP_CONFIGURATION_CAP] & DP_DPCD_DISPLAY_CONTROL_CAPABLE) && * Read the eDP display control registers.
drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_DPCD_REV, *
* Do this independent of DP_DPCD_DISPLAY_CONTROL_CAPABLE bit in
* DP_EDP_CONFIGURATION_CAP, because some buggy displays do not have it
* set, but require eDP 1.4+ detection (e.g. for supported link rates
* method). The display control registers should read zero if they're
* not supported anyway.
*/
if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_DPCD_REV,
intel_dp->edp_dpcd, sizeof(intel_dp->edp_dpcd)) == intel_dp->edp_dpcd, sizeof(intel_dp->edp_dpcd)) ==
sizeof(intel_dp->edp_dpcd)) sizeof(intel_dp->edp_dpcd))
DRM_DEBUG_KMS("EDP DPCD : %*ph\n", (int) sizeof(intel_dp->edp_dpcd), DRM_DEBUG_KMS("EDP DPCD : %*ph\n", (int) sizeof(intel_dp->edp_dpcd),

View File

@@ -31,11 +31,14 @@
#define BO_PINNED 0x2000 #define BO_PINNED 0x2000
static struct msm_gem_submit *submit_create(struct drm_device *dev, static struct msm_gem_submit *submit_create(struct drm_device *dev,
struct msm_gpu *gpu, int nr_bos, int nr_cmds) struct msm_gpu *gpu, uint32_t nr_bos, uint32_t nr_cmds)
{ {
struct msm_gem_submit *submit; struct msm_gem_submit *submit;
int sz = sizeof(*submit) + (nr_bos * sizeof(submit->bos[0])) + uint64_t sz = sizeof(*submit) + ((u64)nr_bos * sizeof(submit->bos[0])) +
(nr_cmds * sizeof(*submit->cmd)); ((u64)nr_cmds * sizeof(submit->cmd[0]));
if (sz > SIZE_MAX)
return NULL;
submit = kmalloc(sz, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY); submit = kmalloc(sz, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
if (!submit) if (!submit)

View File

@@ -80,6 +80,7 @@
#define ICIER_TEIE 0x40 #define ICIER_TEIE 0x40
#define ICIER_RIE 0x20 #define ICIER_RIE 0x20
#define ICIER_NAKIE 0x10 #define ICIER_NAKIE 0x10
#define ICIER_SPIE 0x08
#define ICSR2_NACKF 0x10 #define ICSR2_NACKF 0x10
@@ -216,11 +217,10 @@ static irqreturn_t riic_tend_isr(int irq, void *data)
return IRQ_NONE; return IRQ_NONE;
} }
if (riic->is_last || riic->err) if (riic->is_last || riic->err) {
riic_clear_set_bit(riic, 0, ICIER_SPIE, RIIC_ICIER);
writeb(ICCR2_SP, riic->base + RIIC_ICCR2); writeb(ICCR2_SP, riic->base + RIIC_ICCR2);
}
writeb(0, riic->base + RIIC_ICIER);
complete(&riic->msg_done);
return IRQ_HANDLED; return IRQ_HANDLED;
} }
@@ -240,13 +240,13 @@ static irqreturn_t riic_rdrf_isr(int irq, void *data)
if (riic->bytes_left == 1) { if (riic->bytes_left == 1) {
/* STOP must come before we set ACKBT! */ /* STOP must come before we set ACKBT! */
if (riic->is_last) if (riic->is_last) {
riic_clear_set_bit(riic, 0, ICIER_SPIE, RIIC_ICIER);
writeb(ICCR2_SP, riic->base + RIIC_ICCR2); writeb(ICCR2_SP, riic->base + RIIC_ICCR2);
}
riic_clear_set_bit(riic, 0, ICMR3_ACKBT, RIIC_ICMR3); riic_clear_set_bit(riic, 0, ICMR3_ACKBT, RIIC_ICMR3);
writeb(0, riic->base + RIIC_ICIER);
complete(&riic->msg_done);
} else { } else {
riic_clear_set_bit(riic, ICMR3_ACKBT, 0, RIIC_ICMR3); riic_clear_set_bit(riic, ICMR3_ACKBT, 0, RIIC_ICMR3);
} }
@@ -259,6 +259,21 @@ static irqreturn_t riic_rdrf_isr(int irq, void *data)
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static irqreturn_t riic_stop_isr(int irq, void *data)
{
struct riic_dev *riic = data;
/* read back registers to confirm writes have fully propagated */
writeb(0, riic->base + RIIC_ICSR2);
readb(riic->base + RIIC_ICSR2);
writeb(0, riic->base + RIIC_ICIER);
readb(riic->base + RIIC_ICIER);
complete(&riic->msg_done);
return IRQ_HANDLED;
}
static u32 riic_func(struct i2c_adapter *adap) static u32 riic_func(struct i2c_adapter *adap)
{ {
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
@@ -326,6 +341,7 @@ static struct riic_irq_desc riic_irqs[] = {
{ .res_num = 0, .isr = riic_tend_isr, .name = "riic-tend" }, { .res_num = 0, .isr = riic_tend_isr, .name = "riic-tend" },
{ .res_num = 1, .isr = riic_rdrf_isr, .name = "riic-rdrf" }, { .res_num = 1, .isr = riic_rdrf_isr, .name = "riic-rdrf" },
{ .res_num = 2, .isr = riic_tdre_isr, .name = "riic-tdre" }, { .res_num = 2, .isr = riic_tdre_isr, .name = "riic-tdre" },
{ .res_num = 3, .isr = riic_stop_isr, .name = "riic-stop" },
{ .res_num = 5, .isr = riic_tend_isr, .name = "riic-nack" }, { .res_num = 5, .isr = riic_tend_isr, .name = "riic-nack" },
}; };

View File

@@ -325,6 +325,27 @@ __be16 mlx5_get_roce_udp_sport(struct mlx5_ib_dev *dev, u8 port_num,
return cpu_to_be16(MLX5_CAP_ROCE(dev->mdev, r_roce_min_src_udp_port)); return cpu_to_be16(MLX5_CAP_ROCE(dev->mdev, r_roce_min_src_udp_port));
} }
int mlx5_get_roce_gid_type(struct mlx5_ib_dev *dev, u8 port_num,
int index, enum ib_gid_type *gid_type)
{
struct ib_gid_attr attr;
union ib_gid gid;
int ret;
ret = ib_get_cached_gid(&dev->ib_dev, port_num, index, &gid, &attr);
if (ret)
return ret;
if (!attr.ndev)
return -ENODEV;
dev_put(attr.ndev);
*gid_type = attr.gid_type;
return 0;
}
static int mlx5_use_mad_ifc(struct mlx5_ib_dev *dev) static int mlx5_use_mad_ifc(struct mlx5_ib_dev *dev)
{ {
if (MLX5_CAP_GEN(dev->mdev, port_type) == MLX5_CAP_PORT_TYPE_IB) if (MLX5_CAP_GEN(dev->mdev, port_type) == MLX5_CAP_PORT_TYPE_IB)

View File

@@ -892,6 +892,8 @@ int mlx5_ib_set_vf_guid(struct ib_device *device, int vf, u8 port,
__be16 mlx5_get_roce_udp_sport(struct mlx5_ib_dev *dev, u8 port_num, __be16 mlx5_get_roce_udp_sport(struct mlx5_ib_dev *dev, u8 port_num,
int index); int index);
int mlx5_get_roce_gid_type(struct mlx5_ib_dev *dev, u8 port_num,
int index, enum ib_gid_type *gid_type);
/* GSI QP helper functions */ /* GSI QP helper functions */
struct ib_qp *mlx5_ib_gsi_create_qp(struct ib_pd *pd, struct ib_qp *mlx5_ib_gsi_create_qp(struct ib_pd *pd,

View File

@@ -2226,6 +2226,7 @@ static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
{ {
enum rdma_link_layer ll = rdma_port_get_link_layer(&dev->ib_dev, port); enum rdma_link_layer ll = rdma_port_get_link_layer(&dev->ib_dev, port);
int err; int err;
enum ib_gid_type gid_type;
if (attr_mask & IB_QP_PKEY_INDEX) if (attr_mask & IB_QP_PKEY_INDEX)
path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index :
@@ -2244,10 +2245,16 @@ static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
if (ll == IB_LINK_LAYER_ETHERNET) { if (ll == IB_LINK_LAYER_ETHERNET) {
if (!(ah->ah_flags & IB_AH_GRH)) if (!(ah->ah_flags & IB_AH_GRH))
return -EINVAL; return -EINVAL;
err = mlx5_get_roce_gid_type(dev, port, ah->grh.sgid_index,
&gid_type);
if (err)
return err;
memcpy(path->rmac, ah->dmac, sizeof(ah->dmac)); memcpy(path->rmac, ah->dmac, sizeof(ah->dmac));
path->udp_sport = mlx5_get_roce_udp_sport(dev, port, path->udp_sport = mlx5_get_roce_udp_sport(dev, port,
ah->grh.sgid_index); ah->grh.sgid_index);
path->dci_cfi_prio_sl = (ah->sl & 0x7) << 4; path->dci_cfi_prio_sl = (ah->sl & 0x7) << 4;
if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP)
path->ecn_dscp = (ah->grh.traffic_class >> 2) & 0x3f;
} else { } else {
path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0;
path->fl_free_ar |= path->fl_free_ar |=

View File

@@ -680,6 +680,7 @@ static void frontend_init(struct dvb_bt8xx_card *card, u32 type)
/* DST is not a frontend, attaching the ASIC */ /* DST is not a frontend, attaching the ASIC */
if (dvb_attach(dst_attach, state, &card->dvb_adapter) == NULL) { if (dvb_attach(dst_attach, state, &card->dvb_adapter) == NULL) {
pr_err("%s: Could not find a Twinhan DST\n", __func__); pr_err("%s: Could not find a Twinhan DST\n", __func__);
kfree(state);
break; break;
} }
/* Attach other DST peripherals if any */ /* Attach other DST peripherals if any */

View File

@@ -825,12 +825,13 @@ static int fimc_is_probe(struct platform_device *pdev)
is->irq = irq_of_parse_and_map(dev->of_node, 0); is->irq = irq_of_parse_and_map(dev->of_node, 0);
if (!is->irq) { if (!is->irq) {
dev_err(dev, "no irq found\n"); dev_err(dev, "no irq found\n");
return -EINVAL; ret = -EINVAL;
goto err_iounmap;
} }
ret = fimc_is_get_clocks(is); ret = fimc_is_get_clocks(is);
if (ret < 0) if (ret < 0)
return ret; goto err_iounmap;
platform_set_drvdata(pdev, is); platform_set_drvdata(pdev, is);
@@ -891,6 +892,8 @@ err_irq:
free_irq(is->irq, is); free_irq(is->irq, is);
err_clk: err_clk:
fimc_is_put_clocks(is); fimc_is_put_clocks(is);
err_iounmap:
iounmap(is->pmu_regs);
return ret; return ret;
} }
@@ -947,6 +950,7 @@ static int fimc_is_remove(struct platform_device *pdev)
fimc_is_unregister_subdevs(is); fimc_is_unregister_subdevs(is);
vb2_dma_contig_clear_max_seg_size(dev); vb2_dma_contig_clear_max_seg_size(dev);
fimc_is_put_clocks(is); fimc_is_put_clocks(is);
iounmap(is->pmu_regs);
fimc_is_debugfs_remove(is); fimc_is_debugfs_remove(is);
release_firmware(is->fw.f_w); release_firmware(is->fw.f_w);
fimc_is_free_cpu_memory(is); fimc_is_free_cpu_memory(is);

View File

@@ -356,7 +356,12 @@ int cx231xx_send_vendor_cmd(struct cx231xx *dev,
*/ */
if ((ven_req->wLength > 4) && ((ven_req->bRequest == 0x4) || if ((ven_req->wLength > 4) && ((ven_req->bRequest == 0x4) ||
(ven_req->bRequest == 0x5) || (ven_req->bRequest == 0x5) ||
(ven_req->bRequest == 0x6))) { (ven_req->bRequest == 0x6) ||
/* Internal Master 3 Bus can send
* and receive only 4 bytes per time
*/
(ven_req->bRequest == 0x2))) {
unsend_size = 0; unsend_size = 0;
pdata = ven_req->pBuff; pdata = ven_req->pBuff;

View File

@@ -98,7 +98,7 @@ int ab8500_sysctrl_read(u16 reg, u8 *value)
u8 bank; u8 bank;
if (sysctrl_dev == NULL) if (sysctrl_dev == NULL)
return -EINVAL; return -EPROBE_DEFER;
bank = (reg >> 8); bank = (reg >> 8);
if (!valid_bank(bank)) if (!valid_bank(bank))
@@ -114,11 +114,13 @@ int ab8500_sysctrl_write(u16 reg, u8 mask, u8 value)
u8 bank; u8 bank;
if (sysctrl_dev == NULL) if (sysctrl_dev == NULL)
return -EINVAL; return -EPROBE_DEFER;
bank = (reg >> 8); bank = (reg >> 8);
if (!valid_bank(bank)) if (!valid_bank(bank)) {
pr_err("invalid bank\n");
return -EINVAL; return -EINVAL;
}
return abx500_mask_and_set_register_interruptible(sysctrl_dev, bank, return abx500_mask_and_set_register_interruptible(sysctrl_dev, bank,
(u8)(reg & 0xFF), mask, value); (u8)(reg & 0xFF), mask, value);
@@ -145,9 +147,15 @@ static int ab8500_sysctrl_remove(struct platform_device *pdev)
return 0; return 0;
} }
static const struct of_device_id ab8500_sysctrl_match[] = {
{ .compatible = "stericsson,ab8500-sysctrl", },
{}
};
static struct platform_driver ab8500_sysctrl_driver = { static struct platform_driver ab8500_sysctrl_driver = {
.driver = { .driver = {
.name = "ab8500-sysctrl", .name = "ab8500-sysctrl",
.of_match_table = ab8500_sysctrl_match,
}, },
.probe = ab8500_sysctrl_probe, .probe = ab8500_sysctrl_probe,
.remove = ab8500_sysctrl_remove, .remove = ab8500_sysctrl_remove,

View File

@@ -205,14 +205,14 @@ static struct resource axp22x_pek_resources[] = {
static struct resource axp288_power_button_resources[] = { static struct resource axp288_power_button_resources[] = {
{ {
.name = "PEK_DBR", .name = "PEK_DBR",
.start = AXP288_IRQ_POKN, .start = AXP288_IRQ_POKP,
.end = AXP288_IRQ_POKN, .end = AXP288_IRQ_POKP,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
{ {
.name = "PEK_DBF", .name = "PEK_DBF",
.start = AXP288_IRQ_POKP, .start = AXP288_IRQ_POKN,
.end = AXP288_IRQ_POKP, .end = AXP288_IRQ_POKN,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
}; };

View File

@@ -1320,6 +1320,9 @@ int mei_cl_notify_request(struct mei_cl *cl,
return -EOPNOTSUPP; return -EOPNOTSUPP;
} }
if (!mei_cl_is_connected(cl))
return -ENODEV;
rets = pm_runtime_get(dev->dev); rets = pm_runtime_get(dev->dev);
if (rets < 0 && rets != -EINPROGRESS) { if (rets < 0 && rets != -EINPROGRESS) {
pm_runtime_put_noidle(dev->dev); pm_runtime_put_noidle(dev->dev);

View File

@@ -21,6 +21,7 @@
#include <linux/debugfs.h> #include <linux/debugfs.h>
#include <linux/seq_file.h> #include <linux/seq_file.h>
#include <linux/gpio.h> #include <linux/gpio.h>
#include <linux/interrupt.h>
#include <linux/irq.h> #include <linux/irq.h>
#include <linux/io.h> #include <linux/io.h>

View File

@@ -320,6 +320,10 @@ static int sunxi_nfc_wait_events(struct sunxi_nfc *nfc, u32 events,
ret = wait_for_completion_timeout(&nfc->complete, ret = wait_for_completion_timeout(&nfc->complete,
msecs_to_jiffies(timeout_ms)); msecs_to_jiffies(timeout_ms));
if (!ret)
ret = -ETIMEDOUT;
else
ret = 0;
writel(0, nfc->regs + NFC_REG_INT); writel(0, nfc->regs + NFC_REG_INT);
} else { } else {

View File

@@ -36,9 +36,9 @@
/*****************************************************************************/ /*****************************************************************************/
/* Timeout in micro-sec */ /* Timeout in micro-sec */
#define ADMIN_CMD_TIMEOUT_US (1000000) #define ADMIN_CMD_TIMEOUT_US (3000000)
#define ENA_ASYNC_QUEUE_DEPTH 4 #define ENA_ASYNC_QUEUE_DEPTH 16
#define ENA_ADMIN_QUEUE_DEPTH 32 #define ENA_ADMIN_QUEUE_DEPTH 32
#define MIN_ENA_VER (((ENA_COMMON_SPEC_VERSION_MAJOR) << \ #define MIN_ENA_VER (((ENA_COMMON_SPEC_VERSION_MAJOR) << \

View File

@@ -100,7 +100,7 @@
/* Number of queues to check for missing queues per timer service */ /* Number of queues to check for missing queues per timer service */
#define ENA_MONITORED_TX_QUEUES 4 #define ENA_MONITORED_TX_QUEUES 4
/* Max timeout packets before device reset */ /* Max timeout packets before device reset */
#define MAX_NUM_OF_TIMEOUTED_PACKETS 32 #define MAX_NUM_OF_TIMEOUTED_PACKETS 128
#define ENA_TX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1)) #define ENA_TX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1))
@@ -116,9 +116,9 @@
#define ENA_IO_IRQ_IDX(q) (ENA_IO_IRQ_FIRST_IDX + (q)) #define ENA_IO_IRQ_IDX(q) (ENA_IO_IRQ_FIRST_IDX + (q))
/* ENA device should send keep alive msg every 1 sec. /* ENA device should send keep alive msg every 1 sec.
* We wait for 3 sec just to be on the safe side. * We wait for 6 sec just to be on the safe side.
*/ */
#define ENA_DEVICE_KALIVE_TIMEOUT (3 * HZ) #define ENA_DEVICE_KALIVE_TIMEOUT (6 * HZ)
#define ENA_MMIO_DISABLE_REG_READ BIT(0) #define ENA_MMIO_DISABLE_REG_READ BIT(0)

View File

@@ -97,6 +97,8 @@ enum board_idx {
BCM57407_NPAR, BCM57407_NPAR,
BCM57414_NPAR, BCM57414_NPAR,
BCM57416_NPAR, BCM57416_NPAR,
BCM57452,
BCM57454,
NETXTREME_E_VF, NETXTREME_E_VF,
NETXTREME_C_VF, NETXTREME_C_VF,
}; };
@@ -131,6 +133,8 @@ static const struct {
{ "Broadcom BCM57407 NetXtreme-E Ethernet Partition" }, { "Broadcom BCM57407 NetXtreme-E Ethernet Partition" },
{ "Broadcom BCM57414 NetXtreme-E Ethernet Partition" }, { "Broadcom BCM57414 NetXtreme-E Ethernet Partition" },
{ "Broadcom BCM57416 NetXtreme-E Ethernet Partition" }, { "Broadcom BCM57416 NetXtreme-E Ethernet Partition" },
{ "Broadcom BCM57452 NetXtreme-E 10Gb/25Gb/40Gb/50Gb Ethernet" },
{ "Broadcom BCM57454 NetXtreme-E 10Gb/25Gb/40Gb/50Gb/100Gb Ethernet" },
{ "Broadcom NetXtreme-E Ethernet Virtual Function" }, { "Broadcom NetXtreme-E Ethernet Virtual Function" },
{ "Broadcom NetXtreme-C Ethernet Virtual Function" }, { "Broadcom NetXtreme-C Ethernet Virtual Function" },
}; };
@@ -166,6 +170,8 @@ static const struct pci_device_id bnxt_pci_tbl[] = {
{ PCI_VDEVICE(BROADCOM, 0x16ed), .driver_data = BCM57414_NPAR }, { PCI_VDEVICE(BROADCOM, 0x16ed), .driver_data = BCM57414_NPAR },
{ PCI_VDEVICE(BROADCOM, 0x16ee), .driver_data = BCM57416_NPAR }, { PCI_VDEVICE(BROADCOM, 0x16ee), .driver_data = BCM57416_NPAR },
{ PCI_VDEVICE(BROADCOM, 0x16ef), .driver_data = BCM57416_NPAR }, { PCI_VDEVICE(BROADCOM, 0x16ef), .driver_data = BCM57416_NPAR },
{ PCI_VDEVICE(BROADCOM, 0x16f1), .driver_data = BCM57452 },
{ PCI_VDEVICE(BROADCOM, 0x1614), .driver_data = BCM57454 },
#ifdef CONFIG_BNXT_SRIOV #ifdef CONFIG_BNXT_SRIOV
{ PCI_VDEVICE(BROADCOM, 0x16c1), .driver_data = NETXTREME_E_VF }, { PCI_VDEVICE(BROADCOM, 0x16c1), .driver_data = NETXTREME_E_VF },
{ PCI_VDEVICE(BROADCOM, 0x16cb), .driver_data = NETXTREME_C_VF }, { PCI_VDEVICE(BROADCOM, 0x16cb), .driver_data = NETXTREME_C_VF },

View File

@@ -28,6 +28,7 @@
#include <linux/of_mdio.h> #include <linux/of_mdio.h>
#include <linux/of_net.h> #include <linux/of_net.h>
#include <linux/phy.h> #include <linux/phy.h>
#include <linux/phy_fixed.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/skbuff.h> #include <linux/skbuff.h>
#include <net/hwbm.h> #include <net/hwbm.h>

View File

@@ -33,6 +33,7 @@
/* Extended Registers */ /* Extended Registers */
#define DP83867_RGMIICTL 0x0032 #define DP83867_RGMIICTL 0x0032
#define DP83867_STRAP_STS1 0x006E
#define DP83867_RGMIIDCTL 0x0086 #define DP83867_RGMIIDCTL 0x0086
#define DP83867_SW_RESET BIT(15) #define DP83867_SW_RESET BIT(15)
@@ -56,9 +57,13 @@
#define DP83867_RGMII_TX_CLK_DELAY_EN BIT(1) #define DP83867_RGMII_TX_CLK_DELAY_EN BIT(1)
#define DP83867_RGMII_RX_CLK_DELAY_EN BIT(0) #define DP83867_RGMII_RX_CLK_DELAY_EN BIT(0)
/* STRAP_STS1 bits */
#define DP83867_STRAP_STS1_RESERVED BIT(11)
/* PHY CTRL bits */ /* PHY CTRL bits */
#define DP83867_PHYCR_FIFO_DEPTH_SHIFT 14 #define DP83867_PHYCR_FIFO_DEPTH_SHIFT 14
#define DP83867_PHYCR_FIFO_DEPTH_MASK (3 << 14) #define DP83867_PHYCR_FIFO_DEPTH_MASK (3 << 14)
#define DP83867_PHYCR_RESERVED_MASK BIT(11)
/* RGMIIDCTL bits */ /* RGMIIDCTL bits */
#define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4 #define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4
@@ -141,7 +146,7 @@ static int dp83867_of_init(struct phy_device *phydev)
static int dp83867_config_init(struct phy_device *phydev) static int dp83867_config_init(struct phy_device *phydev)
{ {
struct dp83867_private *dp83867; struct dp83867_private *dp83867;
int ret, val; int ret, val, bs;
u16 delay; u16 delay;
if (!phydev->priv) { if (!phydev->priv) {
@@ -164,6 +169,22 @@ static int dp83867_config_init(struct phy_device *phydev)
return val; return val;
val &= ~DP83867_PHYCR_FIFO_DEPTH_MASK; val &= ~DP83867_PHYCR_FIFO_DEPTH_MASK;
val |= (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT); val |= (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT);
/* The code below checks if "port mirroring" N/A MODE4 has been
* enabled during power on bootstrap.
*
* Such N/A mode enabled by mistake can put PHY IC in some
* internal testing mode and disable RGMII transmission.
*
* In this particular case one needs to check STRAP_STS1
* register's bit 11 (marked as RESERVED).
*/
bs = phy_read_mmd_indirect(phydev, DP83867_STRAP_STS1,
DP83867_DEVADDR);
if (bs & DP83867_STRAP_STS1_RESERVED)
val &= ~DP83867_PHYCR_RESERVED_MASK;
ret = phy_write(phydev, MII_DP83867_PHYCTRL, val); ret = phy_write(phydev, MII_DP83867_PHYCTRL, val);
if (ret) if (ret)
return ret; return ret;

View File

@@ -33,6 +33,9 @@ static const struct of_device_id ath10k_ahb_of_match[] = {
MODULE_DEVICE_TABLE(of, ath10k_ahb_of_match); MODULE_DEVICE_TABLE(of, ath10k_ahb_of_match);
#define QCA4019_SRAM_ADDR 0x000C0000
#define QCA4019_SRAM_LEN 0x00040000 /* 256 kb */
static inline struct ath10k_ahb *ath10k_ahb_priv(struct ath10k *ar) static inline struct ath10k_ahb *ath10k_ahb_priv(struct ath10k *ar)
{ {
return &((struct ath10k_pci *)ar->drv_priv)->ahb[0]; return &((struct ath10k_pci *)ar->drv_priv)->ahb[0];
@@ -699,6 +702,25 @@ out:
return ret; return ret;
} }
static u32 ath10k_ahb_qca4019_targ_cpu_to_ce_addr(struct ath10k *ar, u32 addr)
{
u32 val = 0, region = addr & 0xfffff;
val = ath10k_pci_read32(ar, PCIE_BAR_REG_ADDRESS);
if (region >= QCA4019_SRAM_ADDR && region <=
(QCA4019_SRAM_ADDR + QCA4019_SRAM_LEN)) {
/* SRAM contents for QCA4019 can be directly accessed and
* no conversions are required
*/
val |= region;
} else {
val |= 0x100000 | region;
}
return val;
}
static const struct ath10k_hif_ops ath10k_ahb_hif_ops = { static const struct ath10k_hif_ops ath10k_ahb_hif_ops = {
.tx_sg = ath10k_pci_hif_tx_sg, .tx_sg = ath10k_pci_hif_tx_sg,
.diag_read = ath10k_pci_hif_diag_read, .diag_read = ath10k_pci_hif_diag_read,
@@ -766,6 +788,7 @@ static int ath10k_ahb_probe(struct platform_device *pdev)
ar_pci->mem_len = ar_ahb->mem_len; ar_pci->mem_len = ar_ahb->mem_len;
ar_pci->ar = ar; ar_pci->ar = ar;
ar_pci->bus_ops = &ath10k_ahb_bus_ops; ar_pci->bus_ops = &ath10k_ahb_bus_ops;
ar_pci->targ_cpu_to_ce_addr = ath10k_ahb_qca4019_targ_cpu_to_ce_addr;
ret = ath10k_pci_setup_resource(ar); ret = ath10k_pci_setup_resource(ar);
if (ret) { if (ret) {

View File

@@ -840,29 +840,33 @@ void ath10k_pci_rx_replenish_retry(unsigned long ptr)
ath10k_pci_rx_post(ar); ath10k_pci_rx_post(ar);
} }
static u32 ath10k_pci_qca988x_targ_cpu_to_ce_addr(struct ath10k *ar, u32 addr)
{
u32 val = 0, region = addr & 0xfffff;
val = (ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + CORE_CTRL_ADDRESS)
& 0x7ff) << 21;
val |= 0x100000 | region;
return val;
}
static u32 ath10k_pci_qca99x0_targ_cpu_to_ce_addr(struct ath10k *ar, u32 addr)
{
u32 val = 0, region = addr & 0xfffff;
val = ath10k_pci_read32(ar, PCIE_BAR_REG_ADDRESS);
val |= 0x100000 | region;
return val;
}
static u32 ath10k_pci_targ_cpu_to_ce_addr(struct ath10k *ar, u32 addr) static u32 ath10k_pci_targ_cpu_to_ce_addr(struct ath10k *ar, u32 addr)
{ {
u32 val = 0; struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
switch (ar->hw_rev) { if (WARN_ON_ONCE(!ar_pci->targ_cpu_to_ce_addr))
case ATH10K_HW_QCA988X: return -ENOTSUPP;
case ATH10K_HW_QCA9887:
case ATH10K_HW_QCA6174:
case ATH10K_HW_QCA9377:
val = (ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
CORE_CTRL_ADDRESS) &
0x7ff) << 21;
break;
case ATH10K_HW_QCA9888:
case ATH10K_HW_QCA99X0:
case ATH10K_HW_QCA9984:
case ATH10K_HW_QCA4019:
val = ath10k_pci_read32(ar, PCIE_BAR_REG_ADDRESS);
break;
}
val |= 0x100000 | (addr & 0xfffff); return ar_pci->targ_cpu_to_ce_addr(ar, addr);
return val;
} }
/* /*
@@ -3171,6 +3175,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
bool pci_ps; bool pci_ps;
int (*pci_soft_reset)(struct ath10k *ar); int (*pci_soft_reset)(struct ath10k *ar);
int (*pci_hard_reset)(struct ath10k *ar); int (*pci_hard_reset)(struct ath10k *ar);
u32 (*targ_cpu_to_ce_addr)(struct ath10k *ar, u32 addr);
switch (pci_dev->device) { switch (pci_dev->device) {
case QCA988X_2_0_DEVICE_ID: case QCA988X_2_0_DEVICE_ID:
@@ -3178,12 +3183,14 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
pci_ps = false; pci_ps = false;
pci_soft_reset = ath10k_pci_warm_reset; pci_soft_reset = ath10k_pci_warm_reset;
pci_hard_reset = ath10k_pci_qca988x_chip_reset; pci_hard_reset = ath10k_pci_qca988x_chip_reset;
targ_cpu_to_ce_addr = ath10k_pci_qca988x_targ_cpu_to_ce_addr;
break; break;
case QCA9887_1_0_DEVICE_ID: case QCA9887_1_0_DEVICE_ID:
hw_rev = ATH10K_HW_QCA9887; hw_rev = ATH10K_HW_QCA9887;
pci_ps = false; pci_ps = false;
pci_soft_reset = ath10k_pci_warm_reset; pci_soft_reset = ath10k_pci_warm_reset;
pci_hard_reset = ath10k_pci_qca988x_chip_reset; pci_hard_reset = ath10k_pci_qca988x_chip_reset;
targ_cpu_to_ce_addr = ath10k_pci_qca988x_targ_cpu_to_ce_addr;
break; break;
case QCA6164_2_1_DEVICE_ID: case QCA6164_2_1_DEVICE_ID:
case QCA6174_2_1_DEVICE_ID: case QCA6174_2_1_DEVICE_ID:
@@ -3191,30 +3198,35 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
pci_ps = true; pci_ps = true;
pci_soft_reset = ath10k_pci_warm_reset; pci_soft_reset = ath10k_pci_warm_reset;
pci_hard_reset = ath10k_pci_qca6174_chip_reset; pci_hard_reset = ath10k_pci_qca6174_chip_reset;
targ_cpu_to_ce_addr = ath10k_pci_qca988x_targ_cpu_to_ce_addr;
break; break;
case QCA99X0_2_0_DEVICE_ID: case QCA99X0_2_0_DEVICE_ID:
hw_rev = ATH10K_HW_QCA99X0; hw_rev = ATH10K_HW_QCA99X0;
pci_ps = false; pci_ps = false;
pci_soft_reset = ath10k_pci_qca99x0_soft_chip_reset; pci_soft_reset = ath10k_pci_qca99x0_soft_chip_reset;
pci_hard_reset = ath10k_pci_qca99x0_chip_reset; pci_hard_reset = ath10k_pci_qca99x0_chip_reset;
targ_cpu_to_ce_addr = ath10k_pci_qca99x0_targ_cpu_to_ce_addr;
break; break;
case QCA9984_1_0_DEVICE_ID: case QCA9984_1_0_DEVICE_ID:
hw_rev = ATH10K_HW_QCA9984; hw_rev = ATH10K_HW_QCA9984;
pci_ps = false; pci_ps = false;
pci_soft_reset = ath10k_pci_qca99x0_soft_chip_reset; pci_soft_reset = ath10k_pci_qca99x0_soft_chip_reset;
pci_hard_reset = ath10k_pci_qca99x0_chip_reset; pci_hard_reset = ath10k_pci_qca99x0_chip_reset;
targ_cpu_to_ce_addr = ath10k_pci_qca99x0_targ_cpu_to_ce_addr;
break; break;
case QCA9888_2_0_DEVICE_ID: case QCA9888_2_0_DEVICE_ID:
hw_rev = ATH10K_HW_QCA9888; hw_rev = ATH10K_HW_QCA9888;
pci_ps = false; pci_ps = false;
pci_soft_reset = ath10k_pci_qca99x0_soft_chip_reset; pci_soft_reset = ath10k_pci_qca99x0_soft_chip_reset;
pci_hard_reset = ath10k_pci_qca99x0_chip_reset; pci_hard_reset = ath10k_pci_qca99x0_chip_reset;
targ_cpu_to_ce_addr = ath10k_pci_qca99x0_targ_cpu_to_ce_addr;
break; break;
case QCA9377_1_0_DEVICE_ID: case QCA9377_1_0_DEVICE_ID:
hw_rev = ATH10K_HW_QCA9377; hw_rev = ATH10K_HW_QCA9377;
pci_ps = true; pci_ps = true;
pci_soft_reset = NULL; pci_soft_reset = NULL;
pci_hard_reset = ath10k_pci_qca6174_chip_reset; pci_hard_reset = ath10k_pci_qca6174_chip_reset;
targ_cpu_to_ce_addr = ath10k_pci_qca988x_targ_cpu_to_ce_addr;
break; break;
default: default:
WARN_ON(1); WARN_ON(1);
@@ -3241,6 +3253,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
ar_pci->bus_ops = &ath10k_pci_bus_ops; ar_pci->bus_ops = &ath10k_pci_bus_ops;
ar_pci->pci_soft_reset = pci_soft_reset; ar_pci->pci_soft_reset = pci_soft_reset;
ar_pci->pci_hard_reset = pci_hard_reset; ar_pci->pci_hard_reset = pci_hard_reset;
ar_pci->targ_cpu_to_ce_addr = targ_cpu_to_ce_addr;
ar->id.vendor = pdev->vendor; ar->id.vendor = pdev->vendor;
ar->id.device = pdev->device; ar->id.device = pdev->device;

View File

@@ -238,6 +238,11 @@ struct ath10k_pci {
/* Chip specific pci full reset function */ /* Chip specific pci full reset function */
int (*pci_hard_reset)(struct ath10k *ar); int (*pci_hard_reset)(struct ath10k *ar);
/* chip specific methods for converting target CPU virtual address
* space to CE address space
*/
u32 (*targ_cpu_to_ce_addr)(struct ath10k *ar, u32 addr);
/* Keep this entry in the last, memory for struct ath10k_ahb is /* Keep this entry in the last, memory for struct ath10k_ahb is
* allocated (ahb support enabled case) in the continuation of * allocated (ahb support enabled case) in the continuation of
* this struct. * this struct.

View File

@@ -32,16 +32,25 @@ static int brcmf_debug_create_memdump(struct brcmf_bus *bus, const void *data,
{ {
void *dump; void *dump;
size_t ramsize; size_t ramsize;
int err;
ramsize = brcmf_bus_get_ramsize(bus); ramsize = brcmf_bus_get_ramsize(bus);
if (ramsize) { if (!ramsize)
dump = vzalloc(len + ramsize); return -ENOTSUPP;
if (!dump)
return -ENOMEM; dump = vzalloc(len + ramsize);
memcpy(dump, data, len); if (!dump)
brcmf_bus_get_memdump(bus, dump + len, ramsize); return -ENOMEM;
dev_coredumpv(bus->dev, dump, len + ramsize, GFP_KERNEL);
memcpy(dump, data, len);
err = brcmf_bus_get_memdump(bus, dump + len, ramsize);
if (err) {
vfree(dump);
return err;
} }
dev_coredumpv(bus->dev, dump, len + ramsize, GFP_KERNEL);
return 0; return 0;
} }

View File

@@ -499,15 +499,17 @@ static int iwl_mvm_get_ctrl_vif_queue(struct iwl_mvm *mvm,
switch (info->control.vif->type) { switch (info->control.vif->type) {
case NL80211_IFTYPE_AP: case NL80211_IFTYPE_AP:
/* /*
* handle legacy hostapd as well, where station may be added * Handle legacy hostapd as well, where station may be added
* only after assoc. * only after assoc. Take care of the case where we send a
* deauth to a station that we don't have.
*/ */
if (ieee80211_is_probe_resp(fc) || ieee80211_is_auth(fc)) if (ieee80211_is_probe_resp(fc) || ieee80211_is_auth(fc) ||
ieee80211_is_deauth(fc))
return IWL_MVM_DQA_AP_PROBE_RESP_QUEUE; return IWL_MVM_DQA_AP_PROBE_RESP_QUEUE;
if (info->hw_queue == info->control.vif->cab_queue) if (info->hw_queue == info->control.vif->cab_queue)
return info->hw_queue; return info->hw_queue;
WARN_ON_ONCE(1); WARN_ONCE(1, "fc=0x%02x", le16_to_cpu(fc));
return IWL_MVM_DQA_AP_PROBE_RESP_QUEUE; return IWL_MVM_DQA_AP_PROBE_RESP_QUEUE;
case NL80211_IFTYPE_P2P_DEVICE: case NL80211_IFTYPE_P2P_DEVICE:
if (ieee80211_is_mgmt(fc)) if (ieee80211_is_mgmt(fc))

View File

@@ -672,8 +672,9 @@ void pci_cfg_access_unlock(struct pci_dev *dev)
WARN_ON(!dev->block_cfg_access); WARN_ON(!dev->block_cfg_access);
dev->block_cfg_access = 0; dev->block_cfg_access = 0;
wake_up_all(&pci_cfg_wait);
raw_spin_unlock_irqrestore(&pci_lock, flags); raw_spin_unlock_irqrestore(&pci_lock, flags);
wake_up_all(&pci_cfg_wait);
} }
EXPORT_SYMBOL_GPL(pci_cfg_access_unlock); EXPORT_SYMBOL_GPL(pci_cfg_access_unlock);

View File

@@ -730,7 +730,7 @@ static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
ret = 0; ret = 0;
out: out:
kfree(masks); kfree(masks);
return 0; return ret;
} }
static void msix_program_entries(struct pci_dev *dev, static void msix_program_entries(struct pci_dev *dev,

View File

@@ -550,6 +550,7 @@ static const struct platform_device_id therm_id_table[] = {
{ "msic_thermal", 1 }, { "msic_thermal", 1 },
{ } { }
}; };
MODULE_DEVICE_TABLE(platform, therm_id_table);
static struct platform_driver mid_thermal_driver = { static struct platform_driver mid_thermal_driver = {
.driver = { .driver = {

View File

@@ -1704,8 +1704,11 @@ void dasd_int_handler(struct ccw_device *cdev, unsigned long intparm,
/* check for for attention message */ /* check for for attention message */
if (scsw_dstat(&irb->scsw) & DEV_STAT_ATTENTION) { if (scsw_dstat(&irb->scsw) & DEV_STAT_ATTENTION) {
device = dasd_device_from_cdev_locked(cdev); device = dasd_device_from_cdev_locked(cdev);
device->discipline->check_attention(device, irb->esw.esw1.lpum); if (!IS_ERR(device)) {
dasd_put_device(device); device->discipline->check_attention(device,
irb->esw.esw1.lpum);
dasd_put_device(device);
}
} }
if (!cqr) if (!cqr)

View File

@@ -2954,16 +2954,11 @@ static void aac_srb_callback(void *context, struct fib * fibptr)
return; return;
BUG_ON(fibptr == NULL); BUG_ON(fibptr == NULL);
dev = fibptr->dev; dev = fibptr->dev;
scsi_dma_unmap(scsicmd);
/* expose physical device if expose_physicald flag is on */
if (scsicmd->cmnd[0] == INQUIRY && !(scsicmd->cmnd[1] & 0x01)
&& expose_physicals > 0)
aac_expose_phy_device(scsicmd);
srbreply = (struct aac_srb_reply *) fib_data(fibptr); srbreply = (struct aac_srb_reply *) fib_data(fibptr);
scsicmd->sense_buffer[0] = '\0'; /* Initialize sense valid flag to false */ scsicmd->sense_buffer[0] = '\0'; /* Initialize sense valid flag to false */
if (fibptr->flags & FIB_CONTEXT_FLAG_FASTRESP) { if (fibptr->flags & FIB_CONTEXT_FLAG_FASTRESP) {
@@ -2976,158 +2971,176 @@ static void aac_srb_callback(void *context, struct fib * fibptr)
*/ */
scsi_set_resid(scsicmd, scsi_bufflen(scsicmd) scsi_set_resid(scsicmd, scsi_bufflen(scsicmd)
- le32_to_cpu(srbreply->data_xfer_length)); - le32_to_cpu(srbreply->data_xfer_length));
/* }
* First check the fib status
*/
if (le32_to_cpu(srbreply->status) != ST_OK) {
int len;
printk(KERN_WARNING "aac_srb_callback: srb failed, status = %d\n", le32_to_cpu(srbreply->status)); scsi_dma_unmap(scsicmd);
len = min_t(u32, le32_to_cpu(srbreply->sense_data_size),
SCSI_SENSE_BUFFERSIZE); /* expose physical device if expose_physicald flag is on */
if (scsicmd->cmnd[0] == INQUIRY && !(scsicmd->cmnd[1] & 0x01)
&& expose_physicals > 0)
aac_expose_phy_device(scsicmd);
/*
* First check the fib status
*/
if (le32_to_cpu(srbreply->status) != ST_OK) {
int len;
pr_warn("aac_srb_callback: srb failed, status = %d\n",
le32_to_cpu(srbreply->status));
len = min_t(u32, le32_to_cpu(srbreply->sense_data_size),
SCSI_SENSE_BUFFERSIZE);
scsicmd->result = DID_ERROR << 16
| COMMAND_COMPLETE << 8
| SAM_STAT_CHECK_CONDITION;
memcpy(scsicmd->sense_buffer,
srbreply->sense_data, len);
}
/*
* Next check the srb status
*/
switch ((le32_to_cpu(srbreply->srb_status))&0x3f) {
case SRB_STATUS_ERROR_RECOVERY:
case SRB_STATUS_PENDING:
case SRB_STATUS_SUCCESS:
scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
break;
case SRB_STATUS_DATA_OVERRUN:
switch (scsicmd->cmnd[0]) {
case READ_6:
case WRITE_6:
case READ_10:
case WRITE_10:
case READ_12:
case WRITE_12:
case READ_16:
case WRITE_16:
if (le32_to_cpu(srbreply->data_xfer_length)
< scsicmd->underflow)
pr_warn("aacraid: SCSI CMD underflow\n");
else
pr_warn("aacraid: SCSI CMD Data Overrun\n");
scsicmd->result = DID_ERROR << 16 scsicmd->result = DID_ERROR << 16
| COMMAND_COMPLETE << 8 | COMMAND_COMPLETE << 8;
| SAM_STAT_CHECK_CONDITION; break;
memcpy(scsicmd->sense_buffer, case INQUIRY:
srbreply->sense_data, len); scsicmd->result = DID_OK << 16
} | COMMAND_COMPLETE << 8;
break;
/* default:
* Next check the srb status
*/
switch ((le32_to_cpu(srbreply->srb_status))&0x3f) {
case SRB_STATUS_ERROR_RECOVERY:
case SRB_STATUS_PENDING:
case SRB_STATUS_SUCCESS:
scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8; scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
break; break;
case SRB_STATUS_DATA_OVERRUN: }
switch (scsicmd->cmnd[0]) { break;
case READ_6: case SRB_STATUS_ABORTED:
case WRITE_6: scsicmd->result = DID_ABORT << 16 | ABORT << 8;
case READ_10: break;
case WRITE_10: case SRB_STATUS_ABORT_FAILED:
case READ_12: /*
case WRITE_12: * Not sure about this one - but assuming the
case READ_16: * hba was trying to abort for some reason
case WRITE_16: */
if (le32_to_cpu(srbreply->data_xfer_length) scsicmd->result = DID_ERROR << 16 | ABORT << 8;
< scsicmd->underflow) break;
printk(KERN_WARNING"aacraid: SCSI CMD underflow\n"); case SRB_STATUS_PARITY_ERROR:
else scsicmd->result = DID_PARITY << 16
printk(KERN_WARNING"aacraid: SCSI CMD Data Overrun\n"); | MSG_PARITY_ERROR << 8;
scsicmd->result = DID_ERROR << 16 break;
| COMMAND_COMPLETE << 8; case SRB_STATUS_NO_DEVICE:
break; case SRB_STATUS_INVALID_PATH_ID:
case INQUIRY: { case SRB_STATUS_INVALID_TARGET_ID:
scsicmd->result = DID_OK << 16 case SRB_STATUS_INVALID_LUN:
| COMMAND_COMPLETE << 8; case SRB_STATUS_SELECTION_TIMEOUT:
break; scsicmd->result = DID_NO_CONNECT << 16
} | COMMAND_COMPLETE << 8;
default: break;
scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
break;
}
break;
case SRB_STATUS_ABORTED:
scsicmd->result = DID_ABORT << 16 | ABORT << 8;
break;
case SRB_STATUS_ABORT_FAILED:
/*
* Not sure about this one - but assuming the
* hba was trying to abort for some reason
*/
scsicmd->result = DID_ERROR << 16 | ABORT << 8;
break;
case SRB_STATUS_PARITY_ERROR:
scsicmd->result = DID_PARITY << 16
| MSG_PARITY_ERROR << 8;
break;
case SRB_STATUS_NO_DEVICE:
case SRB_STATUS_INVALID_PATH_ID:
case SRB_STATUS_INVALID_TARGET_ID:
case SRB_STATUS_INVALID_LUN:
case SRB_STATUS_SELECTION_TIMEOUT:
scsicmd->result = DID_NO_CONNECT << 16
| COMMAND_COMPLETE << 8;
break;
case SRB_STATUS_COMMAND_TIMEOUT: case SRB_STATUS_COMMAND_TIMEOUT:
case SRB_STATUS_TIMEOUT: case SRB_STATUS_TIMEOUT:
scsicmd->result = DID_TIME_OUT << 16 scsicmd->result = DID_TIME_OUT << 16
| COMMAND_COMPLETE << 8; | COMMAND_COMPLETE << 8;
break; break;
case SRB_STATUS_BUSY: case SRB_STATUS_BUSY:
scsicmd->result = DID_BUS_BUSY << 16 scsicmd->result = DID_BUS_BUSY << 16
| COMMAND_COMPLETE << 8; | COMMAND_COMPLETE << 8;
break; break;
case SRB_STATUS_BUS_RESET: case SRB_STATUS_BUS_RESET:
scsicmd->result = DID_RESET << 16 scsicmd->result = DID_RESET << 16
| COMMAND_COMPLETE << 8; | COMMAND_COMPLETE << 8;
break; break;
case SRB_STATUS_MESSAGE_REJECTED: case SRB_STATUS_MESSAGE_REJECTED:
scsicmd->result = DID_ERROR << 16 scsicmd->result = DID_ERROR << 16
| MESSAGE_REJECT << 8; | MESSAGE_REJECT << 8;
break; break;
case SRB_STATUS_REQUEST_FLUSHED: case SRB_STATUS_REQUEST_FLUSHED:
case SRB_STATUS_ERROR: case SRB_STATUS_ERROR:
case SRB_STATUS_INVALID_REQUEST: case SRB_STATUS_INVALID_REQUEST:
case SRB_STATUS_REQUEST_SENSE_FAILED: case SRB_STATUS_REQUEST_SENSE_FAILED:
case SRB_STATUS_NO_HBA: case SRB_STATUS_NO_HBA:
case SRB_STATUS_UNEXPECTED_BUS_FREE: case SRB_STATUS_UNEXPECTED_BUS_FREE:
case SRB_STATUS_PHASE_SEQUENCE_FAILURE: case SRB_STATUS_PHASE_SEQUENCE_FAILURE:
case SRB_STATUS_BAD_SRB_BLOCK_LENGTH: case SRB_STATUS_BAD_SRB_BLOCK_LENGTH:
case SRB_STATUS_DELAYED_RETRY: case SRB_STATUS_DELAYED_RETRY:
case SRB_STATUS_BAD_FUNCTION: case SRB_STATUS_BAD_FUNCTION:
case SRB_STATUS_NOT_STARTED: case SRB_STATUS_NOT_STARTED:
case SRB_STATUS_NOT_IN_USE: case SRB_STATUS_NOT_IN_USE:
case SRB_STATUS_FORCE_ABORT: case SRB_STATUS_FORCE_ABORT:
case SRB_STATUS_DOMAIN_VALIDATION_FAIL: case SRB_STATUS_DOMAIN_VALIDATION_FAIL:
default: default:
#ifdef AAC_DETAILED_STATUS_INFO #ifdef AAC_DETAILED_STATUS_INFO
printk(KERN_INFO "aacraid: SRB ERROR(%u) %s scsi cmd 0x%x - scsi status 0x%x\n", pr_info("aacraid: SRB ERROR(%u) %s scsi cmd 0x%x -scsi status 0x%x\n",
le32_to_cpu(srbreply->srb_status) & 0x3F, le32_to_cpu(srbreply->srb_status) & 0x3F,
aac_get_status_string( aac_get_status_string(
le32_to_cpu(srbreply->srb_status) & 0x3F), le32_to_cpu(srbreply->srb_status) & 0x3F),
scsicmd->cmnd[0], scsicmd->cmnd[0],
le32_to_cpu(srbreply->scsi_status)); le32_to_cpu(srbreply->scsi_status));
#endif #endif
if ((scsicmd->cmnd[0] == ATA_12) /*
|| (scsicmd->cmnd[0] == ATA_16)) { * When the CC bit is SET by the host in ATA pass thru CDB,
if (scsicmd->cmnd[2] & (0x01 << 5)) { * driver is supposed to return DID_OK
scsicmd->result = DID_OK << 16 *
| COMMAND_COMPLETE << 8; * When the CC bit is RESET by the host, driver should
break; * return DID_ERROR
} else { */
scsicmd->result = DID_ERROR << 16 if ((scsicmd->cmnd[0] == ATA_12)
| COMMAND_COMPLETE << 8; || (scsicmd->cmnd[0] == ATA_16)) {
break;
} if (scsicmd->cmnd[2] & (0x01 << 5)) {
scsicmd->result = DID_OK << 16
| COMMAND_COMPLETE << 8;
break;
} else { } else {
scsicmd->result = DID_ERROR << 16 scsicmd->result = DID_ERROR << 16
| COMMAND_COMPLETE << 8; | COMMAND_COMPLETE << 8;
break; break;
} }
} } else {
if (le32_to_cpu(srbreply->scsi_status) scsicmd->result = DID_ERROR << 16
== SAM_STAT_CHECK_CONDITION) { | COMMAND_COMPLETE << 8;
int len; break;
scsicmd->result |= SAM_STAT_CHECK_CONDITION;
len = min_t(u32, le32_to_cpu(srbreply->sense_data_size),
SCSI_SENSE_BUFFERSIZE);
#ifdef AAC_DETAILED_STATUS_INFO
printk(KERN_WARNING "aac_srb_callback: check condition, status = %d len=%d\n",
le32_to_cpu(srbreply->status), len);
#endif
memcpy(scsicmd->sense_buffer,
srbreply->sense_data, len);
} }
} }
if (le32_to_cpu(srbreply->scsi_status)
== SAM_STAT_CHECK_CONDITION) {
int len;
scsicmd->result |= SAM_STAT_CHECK_CONDITION;
len = min_t(u32, le32_to_cpu(srbreply->sense_data_size),
SCSI_SENSE_BUFFERSIZE);
#ifdef AAC_DETAILED_STATUS_INFO
pr_warn("aac_srb_callback: check condition, status = %d len=%d\n",
le32_to_cpu(srbreply->status), len);
#endif
memcpy(scsicmd->sense_buffer,
srbreply->sense_data, len);
}
/* /*
* OR in the scsi status (already shifted up a bit) * OR in the scsi status (already shifted up a bit)
*/ */

View File

@@ -1960,7 +1960,8 @@ static void megasas_build_ld_nonrw_fusion(struct megasas_instance *instance,
*/ */
static void static void
megasas_build_syspd_fusion(struct megasas_instance *instance, megasas_build_syspd_fusion(struct megasas_instance *instance,
struct scsi_cmnd *scmd, struct megasas_cmd_fusion *cmd, u8 fp_possible) struct scsi_cmnd *scmd, struct megasas_cmd_fusion *cmd,
bool fp_possible)
{ {
u32 device_id; u32 device_id;
struct MPI2_RAID_SCSI_IO_REQUEST *io_request; struct MPI2_RAID_SCSI_IO_REQUEST *io_request;
@@ -2064,6 +2065,8 @@ megasas_build_io_fusion(struct megasas_instance *instance,
u16 sge_count; u16 sge_count;
u8 cmd_type; u8 cmd_type;
struct MPI2_RAID_SCSI_IO_REQUEST *io_request = cmd->io_request; struct MPI2_RAID_SCSI_IO_REQUEST *io_request = cmd->io_request;
struct MR_PRIV_DEVICE *mr_device_priv_data;
mr_device_priv_data = scp->device->hostdata;
/* Zero out some fields so they don't get reused */ /* Zero out some fields so they don't get reused */
memset(io_request->LUN, 0x0, 8); memset(io_request->LUN, 0x0, 8);
@@ -2092,12 +2095,14 @@ megasas_build_io_fusion(struct megasas_instance *instance,
megasas_build_ld_nonrw_fusion(instance, scp, cmd); megasas_build_ld_nonrw_fusion(instance, scp, cmd);
break; break;
case READ_WRITE_SYSPDIO: case READ_WRITE_SYSPDIO:
megasas_build_syspd_fusion(instance, scp, cmd, true);
break;
case NON_READ_WRITE_SYSPDIO: case NON_READ_WRITE_SYSPDIO:
if (instance->secure_jbod_support && if (instance->secure_jbod_support ||
(cmd_type == NON_READ_WRITE_SYSPDIO)) mr_device_priv_data->is_tm_capable)
megasas_build_syspd_fusion(instance, scp, cmd, 0); megasas_build_syspd_fusion(instance, scp, cmd, false);
else else
megasas_build_syspd_fusion(instance, scp, cmd, 1); megasas_build_syspd_fusion(instance, scp, cmd, true);
break; break;
default: default:
break; break;

View File

@@ -17,6 +17,7 @@
#include <linux/irqdomain.h> #include <linux/irqdomain.h>
#include <linux/msi.h> #include <linux/msi.h>
#include "../include/mc-bus.h" #include "../include/mc-bus.h"
#include "fsl-mc-private.h"
/* /*
* Generate a unique ID identifying the interrupt (only used within the MSI * Generate a unique ID identifying the interrupt (only used within the MSI

View File

@@ -17,6 +17,7 @@
#include <linux/of.h> #include <linux/of.h>
#include <linux/of_irq.h> #include <linux/of_irq.h>
#include "../include/mc-bus.h" #include "../include/mc-bus.h"
#include "fsl-mc-private.h"
static struct irq_chip its_msi_irq_chip = { static struct irq_chip its_msi_irq_chip = {
.name = "fsl-mc-bus-msi", .name = "fsl-mc-bus-msi",

View File

@@ -1213,23 +1213,21 @@ struct hsm_action_item {
* \retval buffer * \retval buffer
*/ */
static inline char *hai_dump_data_field(struct hsm_action_item *hai, static inline char *hai_dump_data_field(struct hsm_action_item *hai,
char *buffer, int len) char *buffer, size_t len)
{ {
int i, sz, data_len; int i, data_len;
char *ptr; char *ptr;
ptr = buffer; ptr = buffer;
sz = len;
data_len = hai->hai_len - sizeof(*hai); data_len = hai->hai_len - sizeof(*hai);
for (i = 0 ; (i < data_len) && (sz > 0) ; i++) { for (i = 0; (i < data_len) && (len > 2); i++) {
int cnt; snprintf(ptr, 3, "%02X", (unsigned char)hai->hai_data[i]);
ptr += 2;
cnt = snprintf(ptr, sz, "%.2X", len -= 2;
(unsigned char)hai->hai_data[i]);
ptr += cnt;
sz -= cnt;
} }
*ptr = '\0'; *ptr = '\0';
return buffer; return buffer;
} }

View File

@@ -546,6 +546,13 @@ struct ldlm_lock *__ldlm_handle2lock(const struct lustre_handle *handle,
if (!lock) if (!lock)
return NULL; return NULL;
if (lock->l_export && lock->l_export->exp_failed) {
CDEBUG(D_INFO, "lock export failed: lock %p, exp %p\n",
lock, lock->l_export);
LDLM_LOCK_PUT(lock);
return NULL;
}
/* It's unlikely but possible that someone marked the lock as /* It's unlikely but possible that someone marked the lock as
* destroyed after we did handle2object on it * destroyed after we did handle2object on it
*/ */

View File

@@ -354,6 +354,10 @@ static ssize_t ll_direct_IO_26(struct kiocb *iocb, struct iov_iter *iter)
if (!lli->lli_has_smd) if (!lli->lli_has_smd)
return -EBADF; return -EBADF;
/* Check EOF by ourselves */
if (iov_iter_rw(iter) == READ && file_offset >= i_size_read(inode))
return 0;
/* FIXME: io smaller than PAGE_SIZE is broken on ia64 ??? */ /* FIXME: io smaller than PAGE_SIZE is broken on ia64 ??? */
if ((file_offset & ~PAGE_MASK) || (count & ~PAGE_MASK)) if ((file_offset & ~PAGE_MASK) || (count & ~PAGE_MASK))
return -EINVAL; return -EINVAL;

View File

@@ -744,16 +744,18 @@ static int lmv_hsm_req_count(struct lmv_obd *lmv,
/* count how many requests must be sent to the given target */ /* count how many requests must be sent to the given target */
for (i = 0; i < hur->hur_request.hr_itemcount; i++) { for (i = 0; i < hur->hur_request.hr_itemcount; i++) {
curr_tgt = lmv_find_target(lmv, &hur->hur_user_item[i].hui_fid); curr_tgt = lmv_find_target(lmv, &hur->hur_user_item[i].hui_fid);
if (IS_ERR(curr_tgt))
return PTR_ERR(curr_tgt);
if (obd_uuid_equals(&curr_tgt->ltd_uuid, &tgt_mds->ltd_uuid)) if (obd_uuid_equals(&curr_tgt->ltd_uuid, &tgt_mds->ltd_uuid))
nr++; nr++;
} }
return nr; return nr;
} }
static void lmv_hsm_req_build(struct lmv_obd *lmv, static int lmv_hsm_req_build(struct lmv_obd *lmv,
struct hsm_user_request *hur_in, struct hsm_user_request *hur_in,
const struct lmv_tgt_desc *tgt_mds, const struct lmv_tgt_desc *tgt_mds,
struct hsm_user_request *hur_out) struct hsm_user_request *hur_out)
{ {
int i, nr_out; int i, nr_out;
struct lmv_tgt_desc *curr_tgt; struct lmv_tgt_desc *curr_tgt;
@@ -764,6 +766,8 @@ static void lmv_hsm_req_build(struct lmv_obd *lmv,
for (i = 0; i < hur_in->hur_request.hr_itemcount; i++) { for (i = 0; i < hur_in->hur_request.hr_itemcount; i++) {
curr_tgt = lmv_find_target(lmv, curr_tgt = lmv_find_target(lmv,
&hur_in->hur_user_item[i].hui_fid); &hur_in->hur_user_item[i].hui_fid);
if (IS_ERR(curr_tgt))
return PTR_ERR(curr_tgt);
if (obd_uuid_equals(&curr_tgt->ltd_uuid, &tgt_mds->ltd_uuid)) { if (obd_uuid_equals(&curr_tgt->ltd_uuid, &tgt_mds->ltd_uuid)) {
hur_out->hur_user_item[nr_out] = hur_out->hur_user_item[nr_out] =
hur_in->hur_user_item[i]; hur_in->hur_user_item[i];
@@ -773,6 +777,8 @@ static void lmv_hsm_req_build(struct lmv_obd *lmv,
hur_out->hur_request.hr_itemcount = nr_out; hur_out->hur_request.hr_itemcount = nr_out;
memcpy(hur_data(hur_out), hur_data(hur_in), memcpy(hur_data(hur_out), hur_data(hur_in),
hur_in->hur_request.hr_data_len); hur_in->hur_request.hr_data_len);
return 0;
} }
static int lmv_hsm_ct_unregister(struct lmv_obd *lmv, unsigned int cmd, int len, static int lmv_hsm_ct_unregister(struct lmv_obd *lmv, unsigned int cmd, int len,
@@ -1052,15 +1058,17 @@ static int lmv_iocontrol(unsigned int cmd, struct obd_export *exp,
} else { } else {
/* split fid list to their respective MDS */ /* split fid list to their respective MDS */
for (i = 0; i < count; i++) { for (i = 0; i < count; i++) {
unsigned int nr, reqlen;
int rc1;
struct hsm_user_request *req; struct hsm_user_request *req;
size_t reqlen;
int nr, rc1;
tgt = lmv->tgts[i]; tgt = lmv->tgts[i];
if (!tgt || !tgt->ltd_exp) if (!tgt || !tgt->ltd_exp)
continue; continue;
nr = lmv_hsm_req_count(lmv, hur, tgt); nr = lmv_hsm_req_count(lmv, hur, tgt);
if (nr < 0)
return nr;
if (nr == 0) /* nothing for this MDS */ if (nr == 0) /* nothing for this MDS */
continue; continue;
@@ -1072,10 +1080,13 @@ static int lmv_iocontrol(unsigned int cmd, struct obd_export *exp,
if (!req) if (!req)
return -ENOMEM; return -ENOMEM;
lmv_hsm_req_build(lmv, hur, tgt, req); rc1 = lmv_hsm_req_build(lmv, hur, tgt, req);
if (rc1 < 0)
goto hsm_req_err;
rc1 = obd_iocontrol(cmd, tgt->ltd_exp, reqlen, rc1 = obd_iocontrol(cmd, tgt->ltd_exp, reqlen,
req, uarg); req, uarg);
hsm_req_err:
if (rc1 != 0 && rc == 0) if (rc1 != 0 && rc == 0)
rc = rc1; rc = rc1;
kvfree(req); kvfree(req);

View File

@@ -1264,20 +1264,15 @@ static int ptlrpc_server_hpreq_init(struct ptlrpc_service_part *svcpt,
*/ */
if (req->rq_ops->hpreq_check) { if (req->rq_ops->hpreq_check) {
rc = req->rq_ops->hpreq_check(req); rc = req->rq_ops->hpreq_check(req);
/** if (rc == -ESTALE) {
* XXX: Out of all current req->rq_status = rc;
* ptlrpc_hpreq_ops::hpreq_check(), only ptlrpc_error(req);
* ldlm_cancel_hpreq_check() can return an error code; }
* other functions assert in similar places, which seems /** can only return error,
* odd. What also does not seem right is that handlers * 0 for normal request,
* for those RPCs do not assert on the same checks, but * or 1 for high priority request
* rather handle the error cases. e.g. see
* ost_rw_hpreq_check(), and ost_brw_read(),
* ost_brw_write().
*/ */
if (rc < 0) LASSERT(rc <= 1);
return rc;
LASSERT(rc == 0 || rc == 1);
} }
spin_lock_bh(&req->rq_export->exp_rpc_lock); spin_lock_bh(&req->rq_export->exp_rpc_lock);

View File

@@ -138,51 +138,51 @@ struct ieee_ibss_seq {
}; };
struct ieee80211_hdr { struct ieee80211_hdr {
u16 frame_ctl; __le16 frame_ctl;
u16 duration_id; __le16 duration_id;
u8 addr1[ETH_ALEN]; u8 addr1[ETH_ALEN];
u8 addr2[ETH_ALEN]; u8 addr2[ETH_ALEN];
u8 addr3[ETH_ALEN]; u8 addr3[ETH_ALEN];
u16 seq_ctl; __le16 seq_ctl;
u8 addr4[ETH_ALEN]; u8 addr4[ETH_ALEN];
} __packed; } __packed __aligned(2);
struct ieee80211_hdr_3addr { struct ieee80211_hdr_3addr {
u16 frame_ctl; __le16 frame_ctl;
u16 duration_id; __le16 duration_id;
u8 addr1[ETH_ALEN]; u8 addr1[ETH_ALEN];
u8 addr2[ETH_ALEN]; u8 addr2[ETH_ALEN];
u8 addr3[ETH_ALEN]; u8 addr3[ETH_ALEN];
u16 seq_ctl; __le16 seq_ctl;
} __packed; } __packed __aligned(2);
struct ieee80211_hdr_qos { struct ieee80211_hdr_qos {
u16 frame_ctl; __le16 frame_ctl;
u16 duration_id; __le16 duration_id;
u8 addr1[ETH_ALEN]; u8 addr1[ETH_ALEN];
u8 addr2[ETH_ALEN]; u8 addr2[ETH_ALEN];
u8 addr3[ETH_ALEN]; u8 addr3[ETH_ALEN];
u16 seq_ctl; __le16 seq_ctl;
u8 addr4[ETH_ALEN]; u8 addr4[ETH_ALEN];
u16 qc; __le16 qc;
} __packed; } __packed __aligned(2);
struct ieee80211_hdr_3addr_qos { struct ieee80211_hdr_3addr_qos {
u16 frame_ctl; __le16 frame_ctl;
u16 duration_id; __le16 duration_id;
u8 addr1[ETH_ALEN]; u8 addr1[ETH_ALEN];
u8 addr2[ETH_ALEN]; u8 addr2[ETH_ALEN];
u8 addr3[ETH_ALEN]; u8 addr3[ETH_ALEN];
u16 seq_ctl; __le16 seq_ctl;
u16 qc; __le16 qc;
} __packed; } __packed;
struct eapol { struct eapol {
u8 snap[6]; u8 snap[6];
u16 ethertype; __be16 ethertype;
u8 version; u8 version;
u8 type; u8 type;
u16 length; __le16 length;
} __packed; } __packed;
enum eap_type { enum eap_type {
@@ -514,13 +514,13 @@ struct ieee80211_security {
*/ */
struct ieee80211_header_data { struct ieee80211_header_data {
u16 frame_ctl; __le16 frame_ctl;
u16 duration_id; __le16 duration_id;
u8 addr1[6]; u8 addr1[6];
u8 addr2[6]; u8 addr2[6];
u8 addr3[6]; u8 addr3[6];
u16 seq_ctrl; __le16 seq_ctrl;
}; } __packed __aligned(2);
#define BEACON_PROBE_SSID_ID_POSITION 12 #define BEACON_PROBE_SSID_ID_POSITION 12
@@ -552,18 +552,18 @@ struct ieee80211_info_element {
/* /*
* These are the data types that can make up management packets * These are the data types that can make up management packets
* *
u16 auth_algorithm; __le16 auth_algorithm;
u16 auth_sequence; __le16 auth_sequence;
u16 beacon_interval; __le16 beacon_interval;
u16 capability; __le16 capability;
u8 current_ap[ETH_ALEN]; u8 current_ap[ETH_ALEN];
u16 listen_interval; __le16 listen_interval;
struct { struct {
u16 association_id:14, reserved:2; u16 association_id:14, reserved:2;
} __packed; } __packed;
u32 time_stamp[2]; __le32 time_stamp[2];
u16 reason; __le16 reason;
u16 status; __le16 status;
*/ */
#define IEEE80211_DEFAULT_TX_ESSID "Penguin" #define IEEE80211_DEFAULT_TX_ESSID "Penguin"
@@ -571,16 +571,16 @@ struct ieee80211_info_element {
struct ieee80211_authentication { struct ieee80211_authentication {
struct ieee80211_header_data header; struct ieee80211_header_data header;
u16 algorithm; __le16 algorithm;
u16 transaction; __le16 transaction;
u16 status; __le16 status;
} __packed; } __packed;
struct ieee80211_probe_response { struct ieee80211_probe_response {
struct ieee80211_header_data header; struct ieee80211_header_data header;
u32 time_stamp[2]; __le32 time_stamp[2];
u16 beacon_interval; __le16 beacon_interval;
u16 capability; __le16 capability;
struct ieee80211_info_element info_element; struct ieee80211_info_element info_element;
} __packed; } __packed;
@@ -590,16 +590,16 @@ struct ieee80211_probe_request {
struct ieee80211_assoc_request_frame { struct ieee80211_assoc_request_frame {
struct ieee80211_hdr_3addr header; struct ieee80211_hdr_3addr header;
u16 capability; __le16 capability;
u16 listen_interval; __le16 listen_interval;
struct ieee80211_info_element_hdr info_element; struct ieee80211_info_element_hdr info_element;
} __packed; } __packed;
struct ieee80211_assoc_response_frame { struct ieee80211_assoc_response_frame {
struct ieee80211_hdr_3addr header; struct ieee80211_hdr_3addr header;
u16 capability; __le16 capability;
u16 status; __le16 status;
u16 aid; __le16 aid;
} __packed; } __packed;
struct ieee80211_txb { struct ieee80211_txb {

View File

@@ -344,7 +344,8 @@ sint r8712_update_attrib(struct _adapter *padapter, _pkt *pkt,
* some settings above. * some settings above.
*/ */
if (check_fwstate(pmlmepriv, WIFI_MP_STATE)) if (check_fwstate(pmlmepriv, WIFI_MP_STATE))
pattrib->priority = (txdesc.txdw1 >> QSEL_SHT) & 0x1f; pattrib->priority =
(le32_to_cpu(txdesc.txdw1) >> QSEL_SHT) & 0x1f;
return _SUCCESS; return _SUCCESS;
} }
@@ -485,7 +486,7 @@ static sint make_wlanhdr(struct _adapter *padapter, u8 *hdr,
struct ieee80211_hdr *pwlanhdr = (struct ieee80211_hdr *)hdr; struct ieee80211_hdr *pwlanhdr = (struct ieee80211_hdr *)hdr;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct qos_priv *pqospriv = &pmlmepriv->qospriv; struct qos_priv *pqospriv = &pmlmepriv->qospriv;
u16 *fctrl = &pwlanhdr->frame_ctl; __le16 *fctrl = &pwlanhdr->frame_ctl;
memset(hdr, 0, WLANHDR_OFFSET); memset(hdr, 0, WLANHDR_OFFSET);
SetFrameSubType(fctrl, pattrib->subtype); SetFrameSubType(fctrl, pattrib->subtype);
@@ -574,7 +575,7 @@ static sint r8712_put_snap(u8 *data, u16 h_proto)
snap->oui[0] = oui[0]; snap->oui[0] = oui[0];
snap->oui[1] = oui[1]; snap->oui[1] = oui[1];
snap->oui[2] = oui[2]; snap->oui[2] = oui[2];
*(u16 *)(data + SNAP_SIZE) = htons(h_proto); *(__be16 *)(data + SNAP_SIZE) = htons(h_proto);
return SNAP_SIZE + sizeof(u16); return SNAP_SIZE + sizeof(u16);
} }

View File

@@ -277,8 +277,16 @@ static void sysrq_handler(struct xenbus_watch *watch, const char **vec,
err = xenbus_transaction_start(&xbt); err = xenbus_transaction_start(&xbt);
if (err) if (err)
return; return;
if (!xenbus_scanf(xbt, "control", "sysrq", "%c", &sysrq_key)) { err = xenbus_scanf(xbt, "control", "sysrq", "%c", &sysrq_key);
pr_err("Unable to read sysrq code in control/sysrq\n"); if (err < 0) {
/*
* The Xenstore watch fires directly after registering it and
* after a suspend/resume cycle. So ENOENT is no error but
* might happen in those cases.
*/
if (err != -ENOENT)
pr_err("Error %d reading sysrq code in control/sysrq\n",
err);
xenbus_transaction_end(xbt, 1); xenbus_transaction_end(xbt, 1);
return; return;
} }

View File

@@ -193,7 +193,8 @@ check_name(struct dentry *direntry, struct cifs_tcon *tcon)
struct cifs_sb_info *cifs_sb = CIFS_SB(direntry->d_sb); struct cifs_sb_info *cifs_sb = CIFS_SB(direntry->d_sb);
int i; int i;
if (unlikely(direntry->d_name.len > if (unlikely(tcon->fsAttrInfo.MaxPathNameComponentLength &&
direntry->d_name.len >
le32_to_cpu(tcon->fsAttrInfo.MaxPathNameComponentLength))) le32_to_cpu(tcon->fsAttrInfo.MaxPathNameComponentLength)))
return -ENAMETOOLONG; return -ENAMETOOLONG;
@@ -509,7 +510,7 @@ cifs_atomic_open(struct inode *inode, struct dentry *direntry,
rc = check_name(direntry, tcon); rc = check_name(direntry, tcon);
if (rc) if (rc)
goto out_free_xid; goto out;
server = tcon->ses->server; server = tcon->ses->server;

View File

@@ -2136,8 +2136,10 @@ ext4_mb_regular_allocator(struct ext4_allocation_context *ac)
* We search using buddy data only if the order of the request * We search using buddy data only if the order of the request
* is greater than equal to the sbi_s_mb_order2_reqs * is greater than equal to the sbi_s_mb_order2_reqs
* You can tune it via /sys/fs/ext4/<partition>/mb_order2_req * You can tune it via /sys/fs/ext4/<partition>/mb_order2_req
* We also support searching for power-of-two requests only for
* requests upto maximum buddy size we have constructed.
*/ */
if (i >= sbi->s_mb_order2_reqs) { if (i >= sbi->s_mb_order2_reqs && i <= sb->s_blocksize_bits + 2) {
/* /*
* This should tell if fe_len is exactly power of 2 * This should tell if fe_len is exactly power of 2
*/ */
@@ -2207,7 +2209,7 @@ repeat:
} }
ac->ac_groups_scanned++; ac->ac_groups_scanned++;
if (cr == 0 && ac->ac_2order < sb->s_blocksize_bits+2) if (cr == 0)
ext4_mb_simple_scan_group(ac, &e4b); ext4_mb_simple_scan_group(ac, &e4b);
else if (cr == 1 && sbi->s_stripe && else if (cr == 1 && sbi->s_stripe &&
!(ac->ac_g_ex.fe_len % sbi->s_stripe)) !(ac->ac_g_ex.fe_len % sbi->s_stripe))

View File

@@ -2628,9 +2628,9 @@ static unsigned long ext4_get_stripe_size(struct ext4_sb_info *sbi)
if (sbi->s_stripe && sbi->s_stripe <= sbi->s_blocks_per_group) if (sbi->s_stripe && sbi->s_stripe <= sbi->s_blocks_per_group)
ret = sbi->s_stripe; ret = sbi->s_stripe;
else if (stripe_width <= sbi->s_blocks_per_group) else if (stripe_width && stripe_width <= sbi->s_blocks_per_group)
ret = stripe_width; ret = stripe_width;
else if (stride <= sbi->s_blocks_per_group) else if (stride && stride <= sbi->s_blocks_per_group)
ret = stride; ret = stride;
else else
ret = 0; ret = 0;

View File

@@ -3002,10 +3002,16 @@ static inline int open_to_namei_flags(int flag)
static int may_o_create(const struct path *dir, struct dentry *dentry, umode_t mode) static int may_o_create(const struct path *dir, struct dentry *dentry, umode_t mode)
{ {
struct user_namespace *s_user_ns;
int error = security_path_mknod(dir, dentry, mode, 0); int error = security_path_mknod(dir, dentry, mode, 0);
if (error) if (error)
return error; return error;
s_user_ns = dir->dentry->d_sb->s_user_ns;
if (!kuid_has_mapping(s_user_ns, current_fsuid()) ||
!kgid_has_mapping(s_user_ns, current_fsgid()))
return -EOVERFLOW;
error = inode_permission2(dir->mnt, dir->dentry->d_inode, MAY_WRITE | MAY_EXEC); error = inode_permission2(dir->mnt, dir->dentry->d_inode, MAY_WRITE | MAY_EXEC);
if (error) if (error)
return error; return error;

View File

@@ -7310,13 +7310,24 @@ out:
static int ocfs2_trim_extent(struct super_block *sb, static int ocfs2_trim_extent(struct super_block *sb,
struct ocfs2_group_desc *gd, struct ocfs2_group_desc *gd,
u32 start, u32 count) u64 group, u32 start, u32 count)
{ {
u64 discard, bcount; u64 discard, bcount;
struct ocfs2_super *osb = OCFS2_SB(sb);
bcount = ocfs2_clusters_to_blocks(sb, count); bcount = ocfs2_clusters_to_blocks(sb, count);
discard = le64_to_cpu(gd->bg_blkno) + discard = ocfs2_clusters_to_blocks(sb, start);
ocfs2_clusters_to_blocks(sb, start);
/*
* For the first cluster group, the gd->bg_blkno is not at the start
* of the group, but at an offset from the start. If we add it while
* calculating discard for first group, we will wrongly start fstrim a
* few blocks after the desried start block and the range can cross
* over into the next cluster group. So, add it only if this is not
* the first cluster group.
*/
if (group != osb->first_cluster_group_blkno)
discard += le64_to_cpu(gd->bg_blkno);
trace_ocfs2_trim_extent(sb, (unsigned long long)discard, bcount); trace_ocfs2_trim_extent(sb, (unsigned long long)discard, bcount);
@@ -7324,7 +7335,7 @@ static int ocfs2_trim_extent(struct super_block *sb,
} }
static int ocfs2_trim_group(struct super_block *sb, static int ocfs2_trim_group(struct super_block *sb,
struct ocfs2_group_desc *gd, struct ocfs2_group_desc *gd, u64 group,
u32 start, u32 max, u32 minbits) u32 start, u32 max, u32 minbits)
{ {
int ret = 0, count = 0, next; int ret = 0, count = 0, next;
@@ -7343,7 +7354,7 @@ static int ocfs2_trim_group(struct super_block *sb,
next = ocfs2_find_next_bit(bitmap, max, start); next = ocfs2_find_next_bit(bitmap, max, start);
if ((next - start) >= minbits) { if ((next - start) >= minbits) {
ret = ocfs2_trim_extent(sb, gd, ret = ocfs2_trim_extent(sb, gd, group,
start, next - start); start, next - start);
if (ret < 0) { if (ret < 0) {
mlog_errno(ret); mlog_errno(ret);
@@ -7441,7 +7452,8 @@ int ocfs2_trim_fs(struct super_block *sb, struct fstrim_range *range)
} }
gd = (struct ocfs2_group_desc *)gd_bh->b_data; gd = (struct ocfs2_group_desc *)gd_bh->b_data;
cnt = ocfs2_trim_group(sb, gd, first_bit, last_bit, minlen); cnt = ocfs2_trim_group(sb, gd, group,
first_bit, last_bit, minlen);
brelse(gd_bh); brelse(gd_bh);
gd_bh = NULL; gd_bh = NULL;
if (cnt < 0) { if (cnt < 0) {

View File

@@ -284,6 +284,9 @@ next_op:
if (unlikely(len > datalen - dp)) if (unlikely(len > datalen - dp))
goto data_overrun_error; goto data_overrun_error;
} }
} else {
if (unlikely(len > datalen - dp))
goto data_overrun_error;
} }
if (flags & FLAG_CONS) { if (flags & FLAG_CONS) {

View File

@@ -78,28 +78,36 @@ static int simple_thread_fn(void *arg)
} }
static DEFINE_MUTEX(thread_mutex); static DEFINE_MUTEX(thread_mutex);
static int simple_thread_cnt;
void foo_bar_reg(void) void foo_bar_reg(void)
{ {
mutex_lock(&thread_mutex);
if (simple_thread_cnt++)
goto out;
pr_info("Starting thread for foo_bar_fn\n"); pr_info("Starting thread for foo_bar_fn\n");
/* /*
* We shouldn't be able to start a trace when the module is * We shouldn't be able to start a trace when the module is
* unloading (there's other locks to prevent that). But * unloading (there's other locks to prevent that). But
* for consistency sake, we still take the thread_mutex. * for consistency sake, we still take the thread_mutex.
*/ */
mutex_lock(&thread_mutex);
simple_tsk_fn = kthread_run(simple_thread_fn, NULL, "event-sample-fn"); simple_tsk_fn = kthread_run(simple_thread_fn, NULL, "event-sample-fn");
out:
mutex_unlock(&thread_mutex); mutex_unlock(&thread_mutex);
} }
void foo_bar_unreg(void) void foo_bar_unreg(void)
{ {
pr_info("Killing thread for foo_bar_fn\n");
/* protect against module unloading */
mutex_lock(&thread_mutex); mutex_lock(&thread_mutex);
if (--simple_thread_cnt)
goto out;
pr_info("Killing thread for foo_bar_fn\n");
if (simple_tsk_fn) if (simple_tsk_fn)
kthread_stop(simple_tsk_fn); kthread_stop(simple_tsk_fn);
simple_tsk_fn = NULL; simple_tsk_fn = NULL;
out:
mutex_unlock(&thread_mutex); mutex_unlock(&thread_mutex);
} }

View File

@@ -452,34 +452,33 @@ static long keyring_read(const struct key *keyring,
char __user *buffer, size_t buflen) char __user *buffer, size_t buflen)
{ {
struct keyring_read_iterator_context ctx; struct keyring_read_iterator_context ctx;
unsigned long nr_keys; long ret;
int ret;
kenter("{%d},,%zu", key_serial(keyring), buflen); kenter("{%d},,%zu", key_serial(keyring), buflen);
if (buflen & (sizeof(key_serial_t) - 1)) if (buflen & (sizeof(key_serial_t) - 1))
return -EINVAL; return -EINVAL;
nr_keys = keyring->keys.nr_leaves_on_tree; /* Copy as many key IDs as fit into the buffer */
if (nr_keys == 0) if (buffer && buflen) {
return 0; ctx.buffer = (key_serial_t __user *)buffer;
ctx.buflen = buflen;
/* Calculate how much data we could return */ ctx.count = 0;
if (!buffer || !buflen) ret = assoc_array_iterate(&keyring->keys,
return nr_keys * sizeof(key_serial_t); keyring_read_iterator, &ctx);
if (ret < 0) {
/* Copy the IDs of the subscribed keys into the buffer */ kleave(" = %ld [iterate]", ret);
ctx.buffer = (key_serial_t __user *)buffer; return ret;
ctx.buflen = buflen; }
ctx.count = 0;
ret = assoc_array_iterate(&keyring->keys, keyring_read_iterator, &ctx);
if (ret < 0) {
kleave(" = %d [iterate]", ret);
return ret;
} }
kleave(" = %zu [ok]", ctx.count); /* Return the size of the buffer needed */
return ctx.count; ret = keyring->keys.nr_leaves_on_tree * sizeof(key_serial_t);
if (ret <= buflen)
kleave("= %ld [ok]", ret);
else
kleave("= %ld [buffer too small]", ret);
return ret;
} }
/* /*

View File

@@ -663,7 +663,7 @@ static int deliver_to_subscribers(struct snd_seq_client *client,
if (atomic) if (atomic)
read_lock(&grp->list_lock); read_lock(&grp->list_lock);
else else
down_read(&grp->list_mutex); down_read_nested(&grp->list_mutex, hop);
list_for_each_entry(subs, &grp->list_head, src_list) { list_for_each_entry(subs, &grp->list_head, src_list) {
/* both ports ready? */ /* both ports ready? */
if (atomic_read(&subs->ref_count) != 2) if (atomic_read(&subs->ref_count) != 2)

View File

@@ -133,7 +133,8 @@ enum {
#endif /* CONFIG_X86_X32 */ #endif /* CONFIG_X86_X32 */
}; };
static long snd_timer_user_ioctl_compat(struct file *file, unsigned int cmd, unsigned long arg) static long __snd_timer_user_ioctl_compat(struct file *file, unsigned int cmd,
unsigned long arg)
{ {
void __user *argp = compat_ptr(arg); void __user *argp = compat_ptr(arg);
@@ -153,7 +154,7 @@ static long snd_timer_user_ioctl_compat(struct file *file, unsigned int cmd, uns
case SNDRV_TIMER_IOCTL_PAUSE: case SNDRV_TIMER_IOCTL_PAUSE:
case SNDRV_TIMER_IOCTL_PAUSE_OLD: case SNDRV_TIMER_IOCTL_PAUSE_OLD:
case SNDRV_TIMER_IOCTL_NEXT_DEVICE: case SNDRV_TIMER_IOCTL_NEXT_DEVICE:
return snd_timer_user_ioctl(file, cmd, (unsigned long)argp); return __snd_timer_user_ioctl(file, cmd, (unsigned long)argp);
case SNDRV_TIMER_IOCTL_GPARAMS32: case SNDRV_TIMER_IOCTL_GPARAMS32:
return snd_timer_user_gparams_compat(file, argp); return snd_timer_user_gparams_compat(file, argp);
case SNDRV_TIMER_IOCTL_INFO32: case SNDRV_TIMER_IOCTL_INFO32:
@@ -167,3 +168,15 @@ static long snd_timer_user_ioctl_compat(struct file *file, unsigned int cmd, uns
} }
return -ENOIOCTLCMD; return -ENOIOCTLCMD;
} }
static long snd_timer_user_ioctl_compat(struct file *file, unsigned int cmd,
unsigned long arg)
{
struct snd_timer_user *tu = file->private_data;
long ret;
mutex_lock(&tu->ioctl_lock);
ret = __snd_timer_user_ioctl_compat(file, cmd, arg);
mutex_unlock(&tu->ioctl_lock);
return ret;
}

View File

@@ -91,6 +91,27 @@ static int adau17x1_pll_event(struct snd_soc_dapm_widget *w,
return 0; return 0;
} }
static int adau17x1_adc_fixup(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
struct adau *adau = snd_soc_codec_get_drvdata(codec);
/*
* If we are capturing, toggle the ADOSR bit in Converter Control 0 to
* avoid losing SNR (workaround from ADI). This must be done after
* the ADC(s) have been enabled. According to the data sheet, it is
* normally illegal to set this bit when the sampling rate is 96 kHz,
* but according to ADI it is acceptable for this workaround.
*/
regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
ADAU17X1_CONVERTER0_ADOSR, ADAU17X1_CONVERTER0_ADOSR);
regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
ADAU17X1_CONVERTER0_ADOSR, 0);
return 0;
}
static const char * const adau17x1_mono_stereo_text[] = { static const char * const adau17x1_mono_stereo_text[] = {
"Stereo", "Stereo",
"Mono Left Channel (L+R)", "Mono Left Channel (L+R)",
@@ -122,7 +143,8 @@ static const struct snd_soc_dapm_widget adau17x1_dapm_widgets[] = {
SND_SOC_DAPM_MUX("Right DAC Mode Mux", SND_SOC_NOPM, 0, 0, SND_SOC_DAPM_MUX("Right DAC Mode Mux", SND_SOC_NOPM, 0, 0,
&adau17x1_dac_mode_mux), &adau17x1_dac_mode_mux),
SND_SOC_DAPM_ADC("Left Decimator", NULL, ADAU17X1_ADC_CONTROL, 0, 0), SND_SOC_DAPM_ADC_E("Left Decimator", NULL, ADAU17X1_ADC_CONTROL, 0, 0,
adau17x1_adc_fixup, SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_ADC("Right Decimator", NULL, ADAU17X1_ADC_CONTROL, 1, 0), SND_SOC_DAPM_ADC("Right Decimator", NULL, ADAU17X1_ADC_CONTROL, 1, 0),
SND_SOC_DAPM_DAC("Left DAC", NULL, ADAU17X1_DAC_CONTROL0, 0, 0), SND_SOC_DAPM_DAC("Left DAC", NULL, ADAU17X1_DAC_CONTROL0, 0, 0),
SND_SOC_DAPM_DAC("Right DAC", NULL, ADAU17X1_DAC_CONTROL0, 1, 0), SND_SOC_DAPM_DAC("Right DAC", NULL, ADAU17X1_DAC_CONTROL0, 1, 0),

View File

@@ -129,5 +129,7 @@ bool adau17x1_has_dsp(struct adau *adau);
#define ADAU17X1_CONVERTER0_CONVSR_MASK 0x7 #define ADAU17X1_CONVERTER0_CONVSR_MASK 0x7
#define ADAU17X1_CONVERTER0_ADOSR BIT(3)
#endif #endif

View File

@@ -807,7 +807,6 @@ static int snd_byt_rt5640_mc_probe(struct platform_device *pdev)
static struct platform_driver snd_byt_rt5640_mc_driver = { static struct platform_driver snd_byt_rt5640_mc_driver = {
.driver = { .driver = {
.name = "bytcr_rt5640", .name = "bytcr_rt5640",
.pm = &snd_soc_pm_ops,
}, },
.probe = snd_byt_rt5640_mc_probe, .probe = snd_byt_rt5640_mc_probe,
}; };

View File

@@ -317,7 +317,6 @@ static int snd_byt_rt5651_mc_probe(struct platform_device *pdev)
static struct platform_driver snd_byt_rt5651_mc_driver = { static struct platform_driver snd_byt_rt5651_mc_driver = {
.driver = { .driver = {
.name = "bytcr_rt5651", .name = "bytcr_rt5651",
.pm = &snd_soc_pm_ops,
}, },
.probe = snd_byt_rt5651_mc_probe, .probe = snd_byt_rt5651_mc_probe,
}; };

View File

@@ -309,10 +309,11 @@ __add_event(struct list_head *list, int *idx,
event_attr_init(attr); event_attr_init(attr);
evsel = perf_evsel__new_idx(attr, (*idx)++); evsel = perf_evsel__new_idx(attr, *idx);
if (!evsel) if (!evsel)
return NULL; return NULL;
(*idx)++;
evsel->cpus = cpu_map__get(cpus); evsel->cpus = cpu_map__get(cpus);
evsel->own_cpus = cpu_map__get(cpus); evsel->own_cpus = cpu_map__get(cpus);