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https://github.com/firestar5683/StarPilot.git
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firestar5683
22a8575199
Keep official openpilot ancestry and dependency licenses. Store resources directly in Git, remove LFS setup requirements, and leave the downloadable big model outside the source tree.
59 lines
1.7 KiB
C
59 lines
1.7 KiB
C
#pragma once
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#define PWM_COUNTER_OVERFLOW 4800U // To get ~25kHz
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// TODO: Implement for 32-bit timers
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void pwm_init(TIM_TypeDef *TIM, uint8_t channel){
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// Enable timer and auto-reload
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register_set(&(TIM->CR1), TIM_CR1_CEN | TIM_CR1_ARPE, 0x3FU);
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// Set channel as PWM mode 1 and enable output
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switch(channel){
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case 1U:
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register_set_bits(&(TIM->CCMR1), (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1PE));
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register_set_bits(&(TIM->CCER), TIM_CCER_CC1E);
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break;
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case 2U:
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register_set_bits(&(TIM->CCMR1), (TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2PE));
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register_set_bits(&(TIM->CCER), TIM_CCER_CC2E);
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break;
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case 3U:
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register_set_bits(&(TIM->CCMR2), (TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3PE));
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register_set_bits(&(TIM->CCER), TIM_CCER_CC3E);
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break;
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case 4U:
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register_set_bits(&(TIM->CCMR2), (TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4PE));
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register_set_bits(&(TIM->CCER), TIM_CCER_CC4E);
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break;
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default:
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break;
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}
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// Set max counter value
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register_set(&(TIM->ARR), PWM_COUNTER_OVERFLOW, 0xFFFFU);
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// Update registers and clear counter
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TIM->EGR |= TIM_EGR_UG;
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}
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void pwm_set(TIM_TypeDef *TIM, uint8_t channel, uint8_t percentage){
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uint16_t comp_value = (((uint16_t) percentage * PWM_COUNTER_OVERFLOW) / 100U);
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switch(channel){
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case 1U:
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register_set(&(TIM->CCR1), comp_value, 0xFFFFU);
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break;
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case 2U:
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register_set(&(TIM->CCR2), comp_value, 0xFFFFU);
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break;
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case 3U:
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register_set(&(TIM->CCR3), comp_value, 0xFFFFU);
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break;
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case 4U:
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register_set(&(TIM->CCR4), comp_value, 0xFFFFU);
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break;
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default:
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break;
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}
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}
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