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https://github.com/firestar5683/StarPilot.git
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22a8575199
Keep official openpilot ancestry and dependency licenses. Store resources directly in Git, remove LFS setup requirements, and leave the downloadable big model outside the source tree.
395 lines
19 KiB
C
395 lines
19 KiB
C
/*
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* File: BLDC_controller.h
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*
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* Code generated for Simulink model 'BLDC_controller'.
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*
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* Model version : 1.1297
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* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
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* C/C++ source code generated on : Sun Mar 6 11:02:11 2022
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*
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* Target selection: ert.tlc
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* Embedded hardware selection: ARM Compatible->ARM Cortex
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* Emulation hardware selection:
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* Differs from embedded hardware (MATLAB Host)
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* Code generation objectives:
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* 1. Execution efficiency
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* 2. RAM efficiency
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* Validation result: Not run
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*/
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#ifndef RTW_HEADER_BLDC_controller_h_
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#define RTW_HEADER_BLDC_controller_h_
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#include "rtwtypes.h"
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#ifndef BLDC_controller_COMMON_INCLUDES_
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# define BLDC_controller_COMMON_INCLUDES_
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#include "rtwtypes.h"
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#endif /* BLDC_controller_COMMON_INCLUDES_ */
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/* Macros for accessing real-time model data structure */
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/* Forward declaration for rtModel */
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typedef struct tag_RTM RT_MODEL;
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/* Block signals and states (auto storage) for system '<S13>/Counter' */
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typedef struct {
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int16_T UnitDelay_DSTATE; /* '<S18>/UnitDelay' */
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} DW_Counter;
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/* Block signals and states (auto storage) for system '<S50>/Low_Pass_Filter' */
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typedef struct {
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int32_T UnitDelay1_DSTATE[2]; /* '<S56>/UnitDelay1' */
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} DW_Low_Pass_Filter;
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/* Block signals and states (auto storage) for system '<S25>/Counter' */
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typedef struct {
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uint16_T UnitDelay_DSTATE; /* '<S30>/UnitDelay' */
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} DW_Counter_b;
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/* Block signals and states (auto storage) for system '<S21>/either_edge' */
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typedef struct {
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boolean_T UnitDelay_DSTATE; /* '<S26>/UnitDelay' */
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} DW_either_edge;
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/* Block signals and states (auto storage) for system '<S20>/Debounce_Filter' */
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typedef struct {
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DW_either_edge either_edge_p; /* '<S21>/either_edge' */
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DW_Counter_b Counter_e; /* '<S24>/Counter' */
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DW_Counter_b Counter_n1; /* '<S25>/Counter' */
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boolean_T UnitDelay_DSTATE; /* '<S21>/UnitDelay' */
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} DW_Debounce_Filter;
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/* Block signals and states (auto storage) for system '<S83>/I_backCalc_fixdt' */
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typedef struct {
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int32_T UnitDelay_DSTATE; /* '<S88>/UnitDelay' */
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int32_T UnitDelay_DSTATE_m; /* '<S90>/UnitDelay' */
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} DW_I_backCalc_fixdt;
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/* Block signals and states (auto storage) for system '<S63>/PI_clamp_fixdt' */
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typedef struct {
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int32_T ResettableDelay_DSTATE; /* '<S77>/Resettable Delay' */
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uint8_T icLoad; /* '<S77>/Resettable Delay' */
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boolean_T UnitDelay1_DSTATE; /* '<S74>/UnitDelay1' */
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} DW_PI_clamp_fixdt;
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/* Block signals and states (auto storage) for system '<S61>/PI_clamp_fixdt' */
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typedef struct {
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int32_T ResettableDelay_DSTATE; /* '<S67>/Resettable Delay' */
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uint8_T icLoad; /* '<S67>/Resettable Delay' */
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boolean_T UnitDelay1_DSTATE; /* '<S65>/UnitDelay1' */
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} DW_PI_clamp_fixdt_m;
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/* Block signals and states (auto storage) for system '<S62>/PI_clamp_fixdt' */
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typedef struct {
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int16_T ResettableDelay_DSTATE; /* '<S72>/Resettable Delay' */
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uint8_T icLoad; /* '<S72>/Resettable Delay' */
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boolean_T UnitDelay1_DSTATE; /* '<S69>/UnitDelay1' */
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} DW_PI_clamp_fixdt_g;
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/* Block signals and states (auto storage) for system '<Root>' */
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typedef struct {
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DW_PI_clamp_fixdt_g PI_clamp_fixdt_kh;/* '<S62>/PI_clamp_fixdt' */
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DW_PI_clamp_fixdt_m PI_clamp_fixdt_l4;/* '<S61>/PI_clamp_fixdt' */
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DW_PI_clamp_fixdt PI_clamp_fixdt_i; /* '<S63>/PI_clamp_fixdt' */
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DW_I_backCalc_fixdt I_backCalc_fixdt_j;/* '<S82>/I_backCalc_fixdt' */
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DW_I_backCalc_fixdt I_backCalc_fixdt1;/* '<S83>/I_backCalc_fixdt1' */
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DW_I_backCalc_fixdt I_backCalc_fixdt_i;/* '<S83>/I_backCalc_fixdt' */
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DW_either_edge either_edge_i; /* '<S20>/either_edge' */
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DW_Debounce_Filter Debounce_Filter_k;/* '<S20>/Debounce_Filter' */
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DW_Low_Pass_Filter Low_Pass_Filter_m;/* '<S50>/Low_Pass_Filter' */
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DW_Counter Counter_e; /* '<S13>/Counter' */
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int32_T Divide1; /* '<S81>/Divide1' */
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int32_T UnitDelay_DSTATE; /* '<S40>/UnitDelay' */
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int16_T Gain4_e[3]; /* '<S57>/Gain4' */
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int16_T DataTypeConversion[2]; /* '<S56>/Data Type Conversion' */
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int16_T z_counterRawPrev; /* '<S17>/z_counterRawPrev' */
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int16_T Merge; /* '<S59>/Merge' */
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int16_T Switch1; /* '<S78>/Switch1' */
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int16_T Vd_max1; /* '<S80>/Vd_max1' */
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int16_T Gain3; /* '<S80>/Gain3' */
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int16_T Vq_max_M1; /* '<S80>/Vq_max_M1' */
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int16_T Gain5; /* '<S80>/Gain5' */
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int16_T i_max; /* '<S80>/i_max' */
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int16_T Divide1_n; /* '<S80>/Divide1' */
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int16_T Gain1; /* '<S80>/Gain1' */
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int16_T Gain4; /* '<S80>/Gain4' */
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int16_T Switch2_i; /* '<S87>/Switch2' */
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int16_T Switch2_o; /* '<S93>/Switch2' */
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int16_T Switch2_a; /* '<S91>/Switch2' */
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int16_T Divide3; /* '<S42>/Divide3' */
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int16_T Merge1; /* '<S33>/Merge1' */
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int16_T Abs1; /* '<S5>/Abs1' */
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int16_T Abs5_h; /* '<S50>/Abs5' */
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int16_T Divide11; /* '<S17>/Divide11' */
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int16_T r_sin_M1; /* '<S52>/r_sin_M1' */
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int16_T r_cos_M1; /* '<S52>/r_cos_M1' */
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int16_T UnitDelay3_DSTATE; /* '<S13>/UnitDelay3' */
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int16_T UnitDelay4_DSTATE; /* '<S17>/UnitDelay4' */
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int16_T UnitDelay2_DSTATE; /* '<S17>/UnitDelay2' */
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int16_T UnitDelay3_DSTATE_o; /* '<S17>/UnitDelay3' */
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int16_T UnitDelay5_DSTATE; /* '<S17>/UnitDelay5' */
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int16_T UnitDelay4_DSTATE_e; /* '<S13>/UnitDelay4' */
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int16_T UnitDelay4_DSTATE_eu; /* '<S8>/UnitDelay4' */
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int8_T Switch2_e; /* '<S12>/Switch2' */
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int8_T UnitDelay2_DSTATE_b; /* '<S12>/UnitDelay2' */
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int8_T If1_ActiveSubsystem; /* '<S7>/If1' */
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int8_T If2_ActiveSubsystem; /* '<S7>/If2' */
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int8_T If1_ActiveSubsystem_j; /* '<S47>/If1' */
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int8_T SwitchCase_ActiveSubsystem; /* '<S59>/Switch Case' */
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int8_T If1_ActiveSubsystem_a; /* '<S59>/If1' */
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int8_T If1_ActiveSubsystem_o; /* '<S48>/If1' */
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int8_T SwitchCase_ActiveSubsystem_d; /* '<S80>/Switch Case' */
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int8_T If2_ActiveSubsystem_f; /* '<S33>/If2' */
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int8_T If2_ActiveSubsystem_a; /* '<S45>/If2' */
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uint8_T z_ctrlMod; /* '<S5>/F03_02_Control_Mode_Manager' */
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uint8_T UnitDelay3_DSTATE_fy; /* '<S10>/UnitDelay3' */
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uint8_T UnitDelay1_DSTATE; /* '<S10>/UnitDelay1' */
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uint8_T UnitDelay2_DSTATE_f; /* '<S10>/UnitDelay2' */
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uint8_T UnitDelay_DSTATE_e; /* '<S20>/UnitDelay' */
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uint8_T is_active_c1_BLDC_controller;/* '<S5>/F03_02_Control_Mode_Manager' */
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uint8_T is_c1_BLDC_controller; /* '<S5>/F03_02_Control_Mode_Manager' */
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uint8_T is_ACTIVE; /* '<S5>/F03_02_Control_Mode_Manager' */
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boolean_T Merge_p; /* '<S21>/Merge' */
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boolean_T dz_cntTrnsDet; /* '<S17>/dz_cntTrnsDet' */
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boolean_T UnitDelay2_DSTATE_c; /* '<S2>/UnitDelay2' */
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boolean_T UnitDelay5_DSTATE_m; /* '<S2>/UnitDelay5' */
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boolean_T UnitDelay6_DSTATE; /* '<S2>/UnitDelay6' */
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boolean_T UnitDelay_DSTATE_b; /* '<S39>/UnitDelay' */
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boolean_T UnitDelay1_DSTATE_n; /* '<S17>/UnitDelay1' */
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boolean_T n_commDeacv_Mode; /* '<S13>/n_commDeacv' */
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boolean_T dz_cntTrnsDet_Mode; /* '<S17>/dz_cntTrnsDet' */
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} DW;
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/* Constant parameters (auto storage) */
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typedef struct {
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/* Computed Parameter: r_sin_M1_Table
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* Referenced by: '<S52>/r_sin_M1'
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*/
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int16_T r_sin_M1_Table[181];
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/* Computed Parameter: r_cos_M1_Table
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* Referenced by: '<S52>/r_cos_M1'
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*/
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int16_T r_cos_M1_Table[181];
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/* Computed Parameter: r_sin3PhaA_M1_Table
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* Referenced by: '<S96>/r_sin3PhaA_M1'
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*/
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int16_T r_sin3PhaA_M1_Table[181];
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/* Computed Parameter: r_sin3PhaB_M1_Table
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* Referenced by: '<S96>/r_sin3PhaB_M1'
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*/
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int16_T r_sin3PhaB_M1_Table[181];
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/* Computed Parameter: r_sin3PhaC_M1_Table
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* Referenced by: '<S96>/r_sin3PhaC_M1'
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*/
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int16_T r_sin3PhaC_M1_Table[181];
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/* Computed Parameter: iq_maxSca_M1_Table
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* Referenced by: '<S80>/iq_maxSca_M1'
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*/
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uint16_T iq_maxSca_M1_Table[50];
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/* Computed Parameter: z_commutMap_M1_table
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* Referenced by: '<S94>/z_commutMap_M1'
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*/
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int8_T z_commutMap_M1_table[18];
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/* Computed Parameter: vec_hallToPos_Value
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* Referenced by: '<S11>/vec_hallToPos'
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*/
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int8_T vec_hallToPos_Value[8];
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} ConstP;
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/* External inputs (root inport signals with auto storage) */
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typedef struct {
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boolean_T b_motEna; /* '<Root>/b_motEna' */
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uint8_T z_ctrlModReq; /* '<Root>/z_ctrlModReq' */
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int16_T r_inpTgt; /* '<Root>/r_inpTgt' */
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uint8_T b_hallA; /* '<Root>/b_hallA ' */
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uint8_T b_hallB; /* '<Root>/b_hallB' */
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uint8_T b_hallC; /* '<Root>/b_hallC' */
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int16_T i_phaAB; /* '<Root>/i_phaAB' */
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int16_T i_phaBC; /* '<Root>/i_phaBC' */
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int16_T i_DCLink; /* '<Root>/i_DCLink' */
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int16_T a_mechAngle; /* '<Root>/a_mechAngle' */
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} ExtU;
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/* External outputs (root outports fed by signals with auto storage) */
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typedef struct {
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int16_T DC_phaA; /* '<Root>/DC_phaA' */
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int16_T DC_phaB; /* '<Root>/DC_phaB' */
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int16_T DC_phaC; /* '<Root>/DC_phaC' */
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uint8_T z_errCode; /* '<Root>/z_errCode' */
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int16_T n_mot; /* '<Root>/n_mot' */
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int16_T a_elecAngle; /* '<Root>/a_elecAngle' */
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int16_T iq; /* '<Root>/iq' */
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int16_T id; /* '<Root>/id' */
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} ExtY;
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/* Parameters (auto storage) */
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struct P_ {
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int32_T dV_openRate; /* Variable: dV_openRate
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* Referenced by: '<S37>/dV_openRate'
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*/
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int16_T dz_cntTrnsDetHi; /* Variable: dz_cntTrnsDetHi
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* Referenced by: '<S17>/dz_cntTrnsDet'
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*/
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int16_T dz_cntTrnsDetLo; /* Variable: dz_cntTrnsDetLo
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* Referenced by: '<S17>/dz_cntTrnsDet'
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*/
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int16_T n_cruiseMotTgt; /* Variable: n_cruiseMotTgt
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* Referenced by: '<S61>/n_cruiseMotTgt'
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*/
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int16_T z_maxCntRst; /* Variable: z_maxCntRst
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* Referenced by:
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* '<S13>/Counter'
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* '<S13>/z_maxCntRst'
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* '<S13>/z_maxCntRst2'
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* '<S13>/UnitDelay3'
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* '<S17>/z_counter'
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*/
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uint16_T cf_speedCoef; /* Variable: cf_speedCoef
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* Referenced by: '<S17>/cf_speedCoef'
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*/
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uint16_T t_errDequal; /* Variable: t_errDequal
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* Referenced by: '<S20>/t_errDequal'
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*/
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uint16_T t_errQual; /* Variable: t_errQual
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* Referenced by: '<S20>/t_errQual'
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*/
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int16_T Vd_max; /* Variable: Vd_max
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* Referenced by:
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* '<S36>/Vd_max'
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* '<S80>/Vd_max1'
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*/
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int16_T Vq_max_M1[46]; /* Variable: Vq_max_M1
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* Referenced by: '<S80>/Vq_max_M1'
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*/
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int16_T Vq_max_XA[46]; /* Variable: Vq_max_XA
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* Referenced by: '<S80>/Vq_max_XA'
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*/
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int16_T a_phaAdvMax; /* Variable: a_phaAdvMax
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* Referenced by: '<S42>/a_phaAdvMax'
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*/
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int16_T i_max; /* Variable: i_max
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* Referenced by:
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* '<S36>/i_max'
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* '<S80>/i_max'
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*/
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int16_T id_fieldWeakMax; /* Variable: id_fieldWeakMax
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* Referenced by: '<S42>/id_fieldWeakMax'
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*/
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int16_T n_commAcvLo; /* Variable: n_commAcvLo
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* Referenced by: '<S13>/n_commDeacv'
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*/
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int16_T n_commDeacvHi; /* Variable: n_commDeacvHi
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* Referenced by: '<S13>/n_commDeacv'
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*/
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int16_T n_fieldWeakAuthHi; /* Variable: n_fieldWeakAuthHi
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* Referenced by: '<S42>/n_fieldWeakAuthHi'
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*/
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int16_T n_fieldWeakAuthLo; /* Variable: n_fieldWeakAuthLo
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* Referenced by: '<S42>/n_fieldWeakAuthLo'
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*/
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int16_T n_max; /* Variable: n_max
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* Referenced by:
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* '<S36>/n_max'
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* '<S80>/n_max1'
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*/
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int16_T n_stdStillDet; /* Variable: n_stdStillDet
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* Referenced by: '<S13>/n_stdStillDet'
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*/
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int16_T r_errInpTgtThres; /* Variable: r_errInpTgtThres
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* Referenced by: '<S20>/r_errInpTgtThres'
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*/
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int16_T r_fieldWeakHi; /* Variable: r_fieldWeakHi
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* Referenced by: '<S42>/r_fieldWeakHi'
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*/
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int16_T r_fieldWeakLo; /* Variable: r_fieldWeakLo
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* Referenced by: '<S42>/r_fieldWeakLo'
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*/
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uint16_T cf_KbLimProt; /* Variable: cf_KbLimProt
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* Referenced by:
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* '<S82>/cf_KbLimProt'
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* '<S83>/cf_KbLimProt'
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*/
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uint16_T cf_idKp; /* Variable: cf_idKp
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* Referenced by: '<S63>/cf_idKp1'
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*/
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uint16_T cf_iqKp; /* Variable: cf_iqKp
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* Referenced by: '<S62>/cf_iqKp'
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*/
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uint16_T cf_nKp; /* Variable: cf_nKp
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* Referenced by: '<S61>/cf_nKp'
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*/
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uint16_T cf_currFilt; /* Variable: cf_currFilt
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* Referenced by: '<S50>/cf_currFilt'
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*/
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uint16_T cf_idKi; /* Variable: cf_idKi
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* Referenced by: '<S63>/cf_idKi1'
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*/
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uint16_T cf_iqKi; /* Variable: cf_iqKi
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* Referenced by: '<S62>/cf_iqKi'
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*/
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uint16_T cf_iqKiLimProt; /* Variable: cf_iqKiLimProt
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* Referenced by:
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* '<S81>/cf_iqKiLimProt'
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* '<S83>/cf_iqKiLimProt'
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*/
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uint16_T cf_nKi; /* Variable: cf_nKi
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* Referenced by: '<S61>/cf_nKi'
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*/
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uint16_T cf_nKiLimProt; /* Variable: cf_nKiLimProt
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* Referenced by:
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* '<S82>/cf_nKiLimProt'
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* '<S83>/cf_nKiLimProt'
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*/
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uint8_T n_polePairs; /* Variable: n_polePairs
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* Referenced by: '<S15>/n_polePairs'
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*/
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uint8_T z_ctrlTypSel; /* Variable: z_ctrlTypSel
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* Referenced by: '<S1>/z_ctrlTypSel'
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*/
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uint8_T z_selPhaCurMeasABC; /* Variable: z_selPhaCurMeasABC
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* Referenced by: '<S49>/z_selPhaCurMeasABC'
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*/
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boolean_T b_angleMeasEna; /* Variable: b_angleMeasEna
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* Referenced by:
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* '<S3>/b_angleMeasEna'
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* '<S13>/b_angleMeasEna'
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*/
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boolean_T b_cruiseCtrlEna; /* Variable: b_cruiseCtrlEna
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* Referenced by: '<S1>/b_cruiseCtrlEna'
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*/
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boolean_T b_diagEna; /* Variable: b_diagEna
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* Referenced by: '<S4>/b_diagEna'
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*/
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boolean_T b_fieldWeakEna; /* Variable: b_fieldWeakEna
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* Referenced by:
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* '<S6>/b_fieldWeakEna'
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* '<S97>/b_fieldWeakEna'
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*/
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};
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/* Parameters (auto storage) */
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typedef struct P_ P;
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/* Real-time Model Data Structure */
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struct tag_RTM {
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P *defaultParam;
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ExtU *inputs;
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ExtY *outputs;
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DW *dwork;
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};
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/* Constant parameters (auto storage) */
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extern const ConstP rtConstP;
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/* Model entry point functions */
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extern void BLDC_controller_initialize(RT_MODEL *const rtM);
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extern void BLDC_controller_step(RT_MODEL *const rtM);
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#endif
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